/[gxemul]/trunk/src/devices/dev_sh4.c
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revision 41 by dpavlin, Mon Oct 8 16:22:11 2007 UTC revision 42 by dpavlin, Mon Oct 8 16:22:32 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *     *  
27   *   *
28   *  $Id: dev_sh4.c,v 1.48 2007/05/01 04:03:09 debug Exp $   *  $Id: dev_sh4.c,v 1.50 2007/06/15 19:57:34 debug Exp $
29   *     *  
30   *  SH4 processor specific memory mapped registers (0xf0000000 - 0xffffffff).   *  COMMENT: SH4-specific memory mapped registers (0xf0000000 - 0xffffffff)
31   *   *
32   *  TODO: Among other things:   *  TODO: Among other things:
33   *   *
# Line 173  struct sh4_data { Line 173  struct sh4_data {
173   */   */
174  static void sh4_timer_tick(struct timer *t, void *extra)  static void sh4_timer_tick(struct timer *t, void *extra)
175  {  {
176          struct sh4_data *d = (struct sh4_data *) extra;          struct sh4_data *d = extra;
177          int i;          int i;
178    
179          /*  Fake RAM refresh:  */          /*  Fake RAM refresh:  */
# Line 259  static void scif_reassert_interrupts(str Line 259  static void scif_reassert_interrupts(str
259    
260  DEVICE_TICK(sh4)  DEVICE_TICK(sh4)
261  {  {
262          struct sh4_data *d = (struct sh4_data *) extra;          struct sh4_data *d = extra;
263          unsigned int i;          unsigned int i;
264    
265          /*          /*
# Line 679  DEVICE_ACCESS(sh4_utlb_da1) Line 679  DEVICE_ACCESS(sh4_utlb_da1)
679    
680  DEVICE_ACCESS(sh4_pcic)  DEVICE_ACCESS(sh4_pcic)
681  {  {
682          struct sh4_data *d = (struct sh4_data *) extra;          struct sh4_data *d = extra;
683          uint64_t idata = 0, odata = 0;          uint64_t idata = 0, odata = 0;
684    
685          if (writeflag == MEM_WRITE)          if (writeflag == MEM_WRITE)
# Line 837  DEVICE_ACCESS(sh4_pcic) Line 837  DEVICE_ACCESS(sh4_pcic)
837    
838  DEVICE_ACCESS(sh4)  DEVICE_ACCESS(sh4)
839  {  {
840          struct sh4_data *d = (struct sh4_data *) extra;          struct sh4_data *d = extra;
841          uint64_t idata = 0, odata = 0;          uint64_t idata = 0, odata = 0;
842          int timer_nr = 0, dma_channel = 0;          int timer_nr = 0, dma_channel = 0;
843    
# Line 1593  DEVINIT(sh4) Line 1593  DEVINIT(sh4)
1593          char tmp[200], n[200];          char tmp[200], n[200];
1594          int i;          int i;
1595          struct machine *machine = devinit->machine;          struct machine *machine = devinit->machine;
1596          struct sh4_data *d = malloc(sizeof(struct sh4_data));          struct sh4_data *d;
1597    
1598          if (d == NULL) {          CHECK_ALLOCATION(d = malloc(sizeof(struct sh4_data)));
                 fprintf(stderr, "out of memory\n");  
                 exit(1);  
         }  
1599          memset(d, 0, sizeof(struct sh4_data));          memset(d, 0, sizeof(struct sh4_data));
1600    
1601    
# Line 1720  DEVINIT(sh4) Line 1717  DEVINIT(sh4)
1717    
1718          d->sh4_timer = timer_add(SH4_PSEUDO_TIMER_HZ, sh4_timer_tick, d);          d->sh4_timer = timer_add(SH4_PSEUDO_TIMER_HZ, sh4_timer_tick, d);
1719          machine_add_tickfunction(devinit->machine, dev_sh4_tick, d,          machine_add_tickfunction(devinit->machine, dev_sh4_tick, d,
1720              SH4_TICK_SHIFT, 0.0);              SH4_TICK_SHIFT);
1721    
1722          /*  Initial Timer values, according to the SH7750 manual:  */          /*  Initial Timer values, according to the SH7750 manual:  */
1723          d->tcor[0] = 0xffffffff; d->tcnt[0] = 0xffffffff;          d->tcor[0] = 0xffffffff; d->tcnt[0] = 0xffffffff;
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