/[gxemul]/trunk/src/devices/dev_sgi_mardigras.c
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Contents of /trunk/src/devices/dev_sgi_mardigras.c

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Revision 34 - (show annotations)
Mon Oct 8 16:21:17 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 8495 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029	Changing usleep(1) calls in the debugger to usleep(10000)
20061107	Adding a new disk image option (-d o...) which sets the ISO9660
		filesystem base offset; also making some other hacks to allow
		NetBSD/dreamcast and homebrew demos/games to boot directly
		from a filesystem image.
		Moving Dreamcast-specific stuff in the documentation to its
		own page (dreamcast.html).
		Adding a border to the Dreamcast PVR framebuffer.
20061108	Adding a -T command line option (again?), for halting the
		emulator on unimplemented memory accesses.
20061109	Continuing on various SH4 and Dreamcast related things.
		The emulator should now halt on more unimplemented device
		accesses, instead of just printing a warning, forcing me to
		actually implement missing stuff :)
20061111	Continuing on SH4 and Dreamcast stuff.
		Adding a bogus Landisk (SH4) machine mode.
20061112	Implementing some parts of the Dreamcast GDROM device. With
		some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113	NetBSD/dreamcast now starts booting from the Live CD image,
		but crashes randomly quite early on in the boot process.
20061122	Beginning on a skeleton interrupt.h and interrupt.c for the
		new interrupt subsystem.
20061124	Continuing on the new interrupt system; taking the first steps
		to attempt to connect CPUs (SuperH and MIPS) and devices
		(dev_cons and SH4 timer interrupts) to it. Many things will
		probably break from now on.
20061125	Converting dev_ns16550, dev_8253 to the new interrupt system.
		Attempting to begin to convert the ISA bus.
20061130	Incorporating a patch from Brian Foley for the configure
		script, which checks for X11 libs in /usr/X11R6/lib64 (which
		is used on some Linux systems).
20061227	Adding a note in the man page about booting from Dreamcast
		CDROM images (i.e. that no external kernel is needed).
20061229	Continuing on the interrupt system rewrite: beginning to
		convert more devices, adding abort() calls for legacy interrupt
		system calls so that everything now _has_ to be rewritten!
		Almost all machine modes are now completely broken.
20061230	More progress on removing old interrupt code, mostly related
		to the ISA bus + devices, the LCA bus (on AlphaBook1), and
		the Footbridge bus (for CATS). And some minor PCI stuff.
		Connecting the ARM cpu to the new interrupt system.
		The CATS, NetWinder, and QEMU_MIPS machine modes now work with
		the new interrupt system :)
20061231	Connecting PowerPC CPUs to the new interrupt system.
		Making PReP machines (IBM 6050) work again.
		Beginning to convert the GT PCI controller (for e.g. Malta
		and Cobalt emulation). Some things work, but not everything.
		Updating Copyright notices for 2007.
20070101	Converting dev_kn02 from legacy style to devinit; the 3max
		machine mode now works with the new interrupt system :-]
20070105	Beginning to convert the SGI O2 machine to the new interrupt
		system; finally converting O2 (IP32) devices to devinit, etc.
20070106	Continuing on the interrupt system redesign/rewrite; KN01
		(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
		moving out stuff from machine.h and devices.h into the
		corresponding devices, beginning the rewrite of i80321
		interrupts, etc.
20070107	Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117	Beginning the rewrite of Algor (V3) interrupts (finally
		changing dev_v3 into devinit style).
20070118	Removing the "bus" registry concept from machine.h, because
		it was practically meaningless.
		Continuing on the rewrite of Algor V3 ISA interrupts.
20070121	More work on Algor interrupts; they are now working again,
		well enough to run NetBSD/algor. :-)
20070122	Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
		can be installed using the new interrupt system :-)
20070123	Making the testmips mode work with the new interrupt system.
20070127	Beginning to convert DEC5800 devices to devinit, and to the
		new interrupt system.
		Converting Playstation 2 devices to devinit, and converting
		the interrupt system. Also fixing a severe bug: the interrupt
		mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128	Removing the dummy NetGear machine mode and the 8250 device
		(which was only used by the NetGear machine).
		Beginning to convert the MacPPC GC (Grand Central) interrupt
		controller to the new interrupt system.
		Converting Jazz interrupts (PICA61 etc.) to the new interrupt
		system. NetBSD/arc can be installed again :-)
		Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
		NetBSD and it is better than a completely dummy timer as it
		was before).
		Converting dev_mp to the new interrupt system, although I
		haven't had time to actually test it yet.
		Completely removing src/machines/interrupts.c, cpu_interrupt
		and cpu_interrupt_ack in src/cpu.c, and
		src/include/machine_interrupts.h! Adding fatal error messages
		+ abort() in the few places that are left to fix.
		Converting dev_z8530 to the new interrupt system.
		FINALLY removing the md_int struct completely from the
		machine struct.
		SH4 fixes (adding a PADDR invalidation in the ITLB replacement
		code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
		all the way to the login prompt, and can be interacted with :-)
		Converting the CPC700 controller (PCI and interrupt controller
		for PM/PPC) to the new interrupt system.
20070129	Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
		sgimips' and OpenBSD/sgi's ramdisk kernels can now be
		interacted with again.
20070130	Moving out the MIPS multi_lw and _sw instruction combinations
		so that they are auto-generated at compile time instead.
20070131	Adding detection of amd64/x86_64 hosts in the configure script,
		for doing initial experiments (again :-) with native code
		generation.
		Adding a -k command line option to set the size of the dyntrans
		cache, and a -B command line option to disable native code
		generation, even if GXemul was compiled with support for
		native code generation for the specific host CPU architecture.
20070201	Experimenting with a skeleton for native code generation.
		Changing the default behaviour, so that native code generation
		is now disabled by default, and has to be enabled by using
		-b on the command line.
20070202	Continuing the native code generation experiments.
		Making PCI interrupts work for Footbridge again.
20070203	More native code generation experiments.
		Removing most of the native code generation experimental code,
		it does not make sense to include any quick hacks like this.
		Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204	Making i80321 interrupts work again (for NetBSD/evbarm etc.),
		and fixing the timer at 100 Hz.
20070206	Experimenting with removing the wdc interrupt slowness hack.
20070207	Lowering the number of dyntrans TLB entries for MIPS from
		192 to 128, resulting in a minor speed improvement.
		Minor optimization to the code invalidation routine in
		cpu_dyntrans.c.
20070208	Increasing (experimentally) the nr of dyntrans instructions per
		loop from 60 to 120.
20070210	Commenting out (experimentally) the dyntrans_device_danger
		detection in memory_rw.c.
		Changing the testmips and baremips machines to use a revision 2
		MIPS64 CPU by default, instead of revision 1.
		Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
		files, the PC bios emulation, and the Olivetti M700 (ARC) and
		db64360 emulation modes.
20070211	Adding an "mp" demo to the demos directory, which tests the
		SMP functionality of the testmips machine.
		Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216	Adding a "nop workaround" for booting Mach/PMAX to the
		documentation; thanks to Artur Bujdoso for the values.
		Converting more of the MacPPC interrupt stuff to the new
		system.
		Beginning to convert BeBox interrupts to the new system.
		PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
		Correcting BeBox clock speed (it was set to 100 in the NetBSD
		bootinfo block, but should be 33000000/4), allowing NetBSD
		to start without using the (incorrect) PPC_NO_DEC hack.
20070217	Implementing (slow) AltiVec vector loads and stores, allowing
		NetBSD/macppc to finally boot using the GENERIC kernel :-)
		Updating the documentation with install instructions for
		NetBSD/macppc.
20070218-19	Regression testing for the release.

==============  RELEASE 0.4.4  ==============
1 /*
2 * Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_sgi_mardigras.c,v 1.24 2006/12/30 13:30:59 debug Exp $
29 *
30 * "MardiGras" graphics controller on SGI IP30 (Octane).
31 *
32 * Most of this is just guesses based on the behaviour of Linux/Octane.
33 *
34 * TODO
35 */
36
37 #include <stdio.h>
38 #include <stdlib.h>
39 #include <string.h>
40
41 #include "cpu.h"
42 #include "device.h"
43 #include "devices.h"
44 #include "memory.h"
45 #include "machine.h"
46 #include "misc.h"
47
48
49 #define debug fatal
50
51
52 #define DEV_SGI_MARDIGRAS_LENGTH 0x800000
53
54 #define MARDIGRAS_FAKE_OFFSET 0x500000000ULL /* hopefully available */
55 #define MARDIGRAS_DEFAULT_XSIZE 1280
56 #define MARDIGRAS_DEFAULT_YSIZE 1024
57
58 #define MICROCODE_START 0x50000
59 #define MICROCODE_END 0x55000
60
61 static int mardigras_xsize = MARDIGRAS_DEFAULT_XSIZE;
62 static int mardigras_ysize = MARDIGRAS_DEFAULT_YSIZE;
63
64 struct sgi_mardigras_data {
65 struct vfb_data *fb;
66 unsigned char microcode_ram[MICROCODE_END - MICROCODE_START];
67 uint64_t palette_reg_select;
68 int currentx;
69 int currenty;
70 int color;
71 int startx;
72 int starty;
73 int stopx;
74 int stopy;
75 uint64_t draw_mode;
76 };
77
78
79 /*
80 * mardigras_20400():
81 */
82 void mardigras_20400(struct cpu *cpu, struct sgi_mardigras_data *d,
83 uint64_t idata)
84 {
85 int i, x, y, r,g,b, len, addr;
86 unsigned char pixels[3 * 8000];
87
88 /* Get rgb from palette: */
89 r = d->fb->rgb_palette[d->color * 3 + 0];
90 g = d->fb->rgb_palette[d->color * 3 + 1];
91 b = d->fb->rgb_palette[d->color * 3 + 2];
92
93 /* Set color: */
94 if ((idata & 0x00ffffff00000000ULL) == 0x00185C0400000000ULL) {
95 int color = (idata >> 12) & 0xff;
96 d->color = color;
97 return;
98 }
99
100 /* Set start XY: */
101 if ((idata & 0x00ffffff00000000ULL) == 0x0018460400000000ULL) {
102 d->startx = (idata >> 16) & 0xffff;
103 d->starty = idata & 0xffff;
104 if (d->startx >= mardigras_xsize)
105 d->startx = 0;
106 if (d->starty >= mardigras_ysize)
107 d->starty = 0;
108 d->currentx = d->startx;
109 d->currenty = d->starty;
110 return;
111 }
112
113 /* Set stop XY: */
114 if ((idata & 0x00ffffff00000000ULL) == 0x0018470400000000ULL) {
115 d->stopx = (idata >> 16) & 0xffff;
116 d->stopy = idata & 0xffff;
117 if (d->stopx >= mardigras_xsize)
118 d->stopx = 0;
119 if (d->stopy >= mardigras_ysize)
120 d->stopy = 0;
121 return;
122 }
123
124 /* Draw modes: (Rectangle or Bitmap, respectively) */
125 if (idata == 0x0019100400018000ULL ||
126 idata == 0x0019100400418008ULL) {
127 d->draw_mode = idata;
128 return;
129 }
130
131 /* Send command: */
132 if (idata == 0x001C130400000018ULL) {
133 switch (d->draw_mode) {
134 /* Rectangle: */
135 case 0x0019100400018000ULL:
136 /* Fill pixels[] with pixels: */
137 len = 0;
138 for (x=d->startx; x<=d->stopx; x++) {
139 pixels[len + 0] = r;
140 pixels[len + 1] = g;
141 pixels[len + 2] = b;
142 len += 3;
143 }
144 if (len == 0)
145 break;
146 for (y=d->starty; y<=d->stopy; y++) {
147 addr = (mardigras_xsize * (mardigras_ysize -
148 1 - y) + d->startx) * 3;
149 /* printf("addr = %i\n", addr); */
150
151 /* Write a line: */
152 dev_fb_access(cpu, cpu->mem,
153 addr, pixels, len, MEM_WRITE, d->fb);
154 }
155 break;
156 /* Bitmap: */
157 case 0x0019100400418008ULL:
158 break;
159 default:
160 fatal("[ sgi_mardigras: unknown draw mode ]\n");
161 }
162 return;
163 }
164
165 /* Send a line of bitmap data: */
166 if ((idata & 0x00ffffff00000000ULL) == 0x001C700400000000ULL) {
167 addr = (mardigras_xsize * (mardigras_ysize - 1 - d->currenty)
168 + d->currentx) * 3;
169 /*
170 printf("addr=%08x curx,y=%4i,%4i startx,y=%4i,%4i "
171 "stopx,y=%4i,%4i\n", addr, d->currentx, d->currenty,
172 d->startx, d->starty, d->stopx, d->stopy);
173 */
174 len = 8*3;
175
176 if (addr > mardigras_xsize * mardigras_ysize * 3 || addr < 0)
177 return;
178
179 /* Read a line: */
180 dev_fb_access(cpu, cpu->mem,
181 addr, pixels, len, MEM_READ, d->fb);
182
183 i = 0;
184 while (i < 8) {
185 if ((idata >> (24 + (7-i))) & 1) {
186 pixels[i*3 + 0] = r;
187 pixels[i*3 + 1] = g;
188 pixels[i*3 + 2] = b;
189 }
190 i ++;
191
192 d->currentx ++;
193 if (d->currentx > d->stopx) {
194 d->currentx = d->startx;
195 d->currenty ++;
196 if (d->currenty > d->stopy)
197 d->currenty = d->starty;
198 }
199 }
200
201 /* Write a line: */
202 dev_fb_access(cpu, cpu->mem,
203 addr, pixels, len, MEM_WRITE, d->fb);
204
205 return;
206 }
207
208 debug("mardigras_20400(): 0x%016"PRIx64"\n", (uint64_t) idata);
209 }
210
211
212 /*
213 * dev_sgi_mardigras_access():
214 */
215 DEVICE_ACCESS(sgi_mardigras)
216 {
217 uint64_t idata = 0, odata = 0;
218 struct sgi_mardigras_data *d = extra;
219 int i;
220
221 if (writeflag == MEM_WRITE)
222 idata = memory_readmax64(cpu, data, len);
223
224 /* Accessing the microcode_ram works like ordinary ram: */
225 if (relative_addr >= MICROCODE_START &&
226 relative_addr < MICROCODE_END) {
227 relative_addr -= MICROCODE_START;
228 if (writeflag == MEM_WRITE)
229 memcpy(d->microcode_ram + relative_addr, data, len);
230 else
231 memcpy(data, d->microcode_ram + relative_addr, len);
232 return 1;
233 }
234
235 switch (relative_addr) {
236 case 0x00004:
237 /* xtalk data: (according to Linux/IP30) */
238 /* (mfgr & 0x7ff) << 1 */
239 /* (part & 0xffff) << 12 */
240 /* (rev & 0xf) << 28 */
241 odata = (2 << 28) | (0xc003 << 12) | (0x2aa << 1);
242 break;
243 case 0x20008: /* Fifo status */
244 break;
245 case 0x20200:
246 break;
247 case 0x20400:
248 if (writeflag == MEM_WRITE)
249 mardigras_20400(cpu, d, idata);
250 else
251 debug("[ sgi_mardigras: read from 0x20400? ]\n");
252 break;
253 case 0x58040:
254 /* HQ4 microcode stuff */
255 break;
256 case 0x70c30:
257 /* Palette register select? */
258 if (writeflag == MEM_WRITE)
259 d->palette_reg_select = idata;
260 else
261 odata = d->palette_reg_select;
262 break;
263 case 0x70d18:
264 /* Palette register read/write? */
265 i = 3 * ((d->palette_reg_select >> 8) & 0xff);
266 if (writeflag == MEM_WRITE) {
267 d->fb->rgb_palette[i + 0] = (idata >> 24) & 0xff;
268 d->fb->rgb_palette[i + 1] = (idata >> 16) & 0xff;
269 d->fb->rgb_palette[i + 2] = (idata >> 8) & 0xff;
270 } else {
271 odata = (d->fb->rgb_palette[i+0] << 24) +
272 (d->fb->rgb_palette[i+1] << 16) +
273 (d->fb->rgb_palette[i+2] << 8);
274 }
275 break;
276 case 0x71208:
277 odata = 8;
278 break;
279 default:
280 if (writeflag==MEM_READ) {
281 debug("[ sgi_mardigras: read from 0x%08lx ]\n",
282 (long)relative_addr);
283 } else {
284 debug("[ sgi_mardigras: write to 0x%08lx: 0x%016"PRIx64
285 " ]\n", (long) relative_addr, (uint64_t) idata);
286 }
287 }
288
289 if (writeflag == MEM_READ)
290 memory_writemax64(cpu, data, len, odata);
291
292 return 1;
293 }
294
295
296 DEVINIT(sgi_mardigras)
297 {
298 struct sgi_mardigras_data *d;
299
300 d = malloc(sizeof(struct sgi_mardigras_data));
301 if (d == NULL) {
302 fprintf(stderr, "out of memory\n");
303 exit(1);
304 }
305 memset(d, 0, sizeof(struct sgi_mardigras_data));
306
307 d->fb = dev_fb_init(devinit->machine, devinit->machine->memory,
308 MARDIGRAS_FAKE_OFFSET, VFB_GENERIC,
309 mardigras_xsize, mardigras_ysize,
310 mardigras_xsize, mardigras_ysize, 24, "SGI MardiGras");
311 if (d->fb == NULL) {
312 fprintf(stderr, "dev_sgi_mardigras_init(): out of memory\n");
313 exit(1);
314 }
315
316 memory_device_register(devinit->machine->memory, devinit->name,
317 devinit->addr, DEV_SGI_MARDIGRAS_LENGTH, dev_sgi_mardigras_access,
318 d, DM_DEFAULT, NULL);
319
320 return 1;
321 }
322
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