/[gxemul]/trunk/src/devices/dev_sgi_ip30.c
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Contents of /trunk/src/devices/dev_sgi_ip30.c

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Revision 42 - (show annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 9968 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============


1 /*
2 * Copyright (C) 2004-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_sgi_ip30.c,v 1.26 2007/06/15 19:57:34 debug Exp $
29 *
30 * COMMENT: SGI IP30 stuff
31 *
32 * NOTE/TODO: This is just comprised of hardcoded guesses so far. (Ugly.)
33 */
34
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38
39 #include "cpu.h"
40 #include "device.h"
41 #include "machine.h"
42 #include "memory.h"
43 #include "misc.h"
44
45
46 #define DEV_SGI_IP30_LENGTH 0x80000
47
48 struct sgi_ip30_data {
49 /* ip30: */
50 uint64_t imask0; /* 0x10000 */
51 uint64_t reg_0x10018;
52 uint64_t isr; /* 0x10030 */
53 uint64_t reg_0x20000;
54 uint64_t reg_0x30000;
55
56 /* ip30_2: */
57 uint64_t reg_0x0029c;
58
59 /* ip30_3: */
60 uint64_t reg_0x00284;
61
62 /* ip30_4: */
63 uint64_t reg_0x000b0;
64
65 /* ip30_5: */
66 uint64_t reg_0x00000;
67 };
68
69
70 DEVICE_TICK(sgi_ip30)
71 {
72 struct sgi_ip30_data *d = extra;
73
74 d->reg_0x20000 += 1000;
75
76 if (d->imask0 & ((int64_t)1<<50)) {
77 /* TODO: Only interrupt if reg 0x20000 (the counter)
78 has passed the compare (0x30000). */
79 fatal("IP30 legacy interrupt rewrite: TODO\n");
80 abort();
81 // cpu_interrupt(cpu, 8+1 + 50);
82 }
83 }
84
85
86 DEVICE_ACCESS(sgi_ip30)
87 {
88 struct sgi_ip30_data *d = extra;
89 uint64_t idata = 0, odata = 0;
90
91 if (writeflag == MEM_WRITE)
92 idata = memory_readmax64(cpu, data, len);
93
94 switch (relative_addr) {
95
96 case 0x20:
97 /* Memory bank configuration: */
98 odata = 0x80010000ULL;
99 break;
100
101 case 0x10000: /* Interrupt mask register 0: */
102 if (writeflag == MEM_WRITE) {
103 d->imask0 = idata;
104 } else {
105 odata = d->imask0;
106 }
107 break;
108
109 case 0x10018:
110 /*
111 * If this is not implemented, the IP30 PROM complains during
112 * bootup:
113 *
114 * *FAILED*
115 * Address: 0xffffffffaff10018, Expected:
116 * 0x0000000000000001, Received: 0x0000000000000000
117 */
118 if (writeflag == MEM_WRITE) {
119 d->reg_0x10018 = idata;
120 } else {
121 odata = d->reg_0x10018;
122 }
123 break;
124
125 case 0x10020: /* Set ISR, according to Linux/IP30 */
126 d->isr = idata;
127 /* Recalculate CPU interrupt assertions: */
128 fatal("IP30 legacy interrupt rewrite: TODO\n");
129 abort();
130 // cpu_interrupt(cpu, 8);
131 break;
132
133 case 0x10028: /* Clear ISR, according to Linux/IP30 */
134 d->isr &= ~idata;
135 /* Recalculate CPU interrupt assertions: */
136 fatal("IP30 legacy interrupt rewrite: TODO\n");
137 abort();
138 // cpu_interrupt(cpu, 8);
139 break;
140
141 case 0x10030: /* Interrupt Status Register */
142 if (writeflag == MEM_WRITE) {
143 /* Clear-on-write (TODO: is this correct?) */
144 d->isr &= ~idata;
145 /* Recalculate CPU interrupt assertions: */
146 fatal("IP30 legacy interrupt rewrite: TODO\n");
147 abort();
148 // cpu_interrupt(cpu, 8);
149 } else {
150 odata = d->isr;
151 }
152 break;
153
154 case 0x20000:
155 /* A counter */
156 if (writeflag == MEM_WRITE) {
157 d->reg_0x20000 = idata;
158 } else {
159 odata = d->reg_0x20000;
160 }
161 break;
162
163 case 0x30000:
164 if (writeflag == MEM_WRITE) {
165 d->reg_0x30000 = idata;
166 } else {
167 odata = d->reg_0x30000;
168 }
169 break;
170
171 default:
172 if (writeflag == MEM_WRITE) {
173 debug("[ sgi_ip30: unimplemented write to address "
174 "0x%x, data=0x%02x ]\n", (int)relative_addr,
175 (int)idata);
176 } else {
177 debug("[ sgi_ip30: unimplemented read from address"
178 " 0x%x ]\n", (int)relative_addr);
179 }
180 }
181
182 if (writeflag == MEM_READ)
183 memory_writemax64(cpu, data, len, odata);
184
185 return 1;
186 }
187
188
189 DEVICE_ACCESS(sgi_ip30_2)
190 {
191 struct sgi_ip30_data *d = extra;
192 uint64_t idata = 0, odata = 0;
193
194 idata = memory_readmax64(cpu, data, len);
195
196 switch (relative_addr) {
197
198 /* 0x114 + 0x40 * (wid - 8): 0x80000000 for "alive",
199 according to Linux/IP30 */
200
201 case 0x114 + 0x40 * (12 - 8):
202 fatal("[ IP30: asdvasdvnb ]\n");
203 odata = 0x80000000;
204 break;
205
206 case 0x0029c:
207 /*
208 * If this is not implemented, the IP30 PROM complains during
209 * bootup:
210 *
211 * *FAILED*
212 * Address: 0xffffffffb000029c, Expected:
213 * 0x0000000000000001, Received: 0x0000000000000000
214 */
215 if (writeflag == MEM_WRITE) {
216 d->reg_0x0029c = idata;
217 } else {
218 odata = d->reg_0x0029c;
219 }
220 break;
221 default:
222 if (writeflag == MEM_WRITE) {
223 debug("[ sgi_ip30_2: unimplemented write to "
224 "address 0x%x, data=0x%02x ]\n",
225 (int)relative_addr, (int)idata);
226 } else {
227 debug("[ sgi_ip30_2: unimplemented read from address "
228 "0x%x ]\n", (int)relative_addr);
229 }
230 }
231
232 if (writeflag == MEM_READ)
233 memory_writemax64(cpu, data, len, odata);
234
235 return 1;
236 }
237
238
239 DEVICE_ACCESS(sgi_ip30_3)
240 {
241 struct sgi_ip30_data *d = extra;
242 uint64_t idata = 0, odata = 0;
243
244 idata = memory_readmax64(cpu, data, len);
245
246 switch (relative_addr) {
247
248 case 0xb4:
249 if (writeflag == MEM_WRITE) {
250 debug("[ sgi_ip30_3: unimplemented write to "
251 "address 0x%x, data=0x%02x ]\n",
252 (int)relative_addr, (int)idata);
253 } else {
254 odata = 2; /* should be 2, or Irix loops */
255 }
256 break;
257
258 case 0x00104:
259 if (writeflag == MEM_WRITE) {
260 debug("[ sgi_ip30_3: unimplemented write to address "
261 "0x%x, data=0x%02x ]\n", (int)relative_addr,
262 (int)idata);
263 } else {
264 odata = 64; /* should be 64, or the PROM
265 complains */
266 }
267 break;
268
269 case 0x00284:
270 /*
271 * If this is not implemented, the IP30 PROM complains during
272 * bootup:
273 *
274 * *FAILED*
275 * Address: 0xffffffffbf000284, Expected:
276 * 0x0000000000000001, Received: 0x0000000000000000
277 */
278 if (writeflag == MEM_WRITE) {
279 d->reg_0x00284 = idata;
280 } else {
281 odata = d->reg_0x00284;
282 }
283 break;
284
285 default:
286 if (writeflag == MEM_WRITE) {
287 debug("[ sgi_ip30_3: unimplemented write to address "
288 "0x%x, data=0x%02x ]\n", (int)relative_addr,
289 (int)idata);
290 } else {
291 debug("[ sgi_ip30_3: unimplemented read from "
292 "address 0x%x ]\n", (int)relative_addr);
293 }
294 }
295
296 if (writeflag == MEM_READ)
297 memory_writemax64(cpu, data, len, odata);
298
299 return 1;
300 }
301
302
303 DEVICE_ACCESS(sgi_ip30_4)
304 {
305 struct sgi_ip30_data *d = extra;
306 uint64_t idata = 0, odata = 0;
307
308 idata = memory_readmax64(cpu, data, len);
309
310 switch (relative_addr) {
311
312 case 0x000b0:
313 /*
314 * If this is not implemented, the IP30 PROM complains during
315 * bootup:
316 *
317 * *FAILED*
318 * Address: 0xffffffffbf6000b0, Expected:
319 * 0x0000000000000001, Received: 0x0000000000000000
320 */
321 if (writeflag == MEM_WRITE) {
322 d->reg_0x000b0 = idata;
323 } else {
324 odata = d->reg_0x000b0;
325 }
326 break;
327
328 default:
329 if (writeflag == MEM_WRITE) {
330 debug("[ sgi_ip30_4: unimplemented write to address"
331 " 0x%x, data=0x%02x ]\n",
332 (int)relative_addr, (int)idata);
333 } else {
334 debug("[ sgi_ip30_4: unimplemented read from address"
335 " 0x%x ]\n", (int)relative_addr);
336 }
337 }
338
339 if (writeflag == MEM_READ)
340 memory_writemax64(cpu, data, len, odata);
341
342 return 1;
343 }
344
345
346 DEVICE_ACCESS(sgi_ip30_5)
347 {
348 struct sgi_ip30_data *d = extra;
349 uint64_t idata = 0, odata = 0;
350
351 idata = memory_readmax64(cpu, data, len);
352
353 switch (relative_addr) {
354
355 case 0x00000:
356 if (writeflag == MEM_WRITE) {
357 d->reg_0x00000 = idata;
358 } else {
359 odata = d->reg_0x00000;
360 }
361 break;
362
363 default:
364 if (writeflag == MEM_WRITE) {
365 debug("[ sgi_ip30_5: unimplemented write to address "
366 "0x%x, data=0x%02x ]\n", (int)relative_addr,
367 (int)idata);
368 } else {
369 debug("[ sgi_ip30_5: unimplemented read from address "
370 "0x%x ]\n", (int)relative_addr);
371 }
372 }
373
374 if (writeflag == MEM_READ)
375 memory_writemax64(cpu, data, len, odata);
376
377 return 1;
378 }
379
380
381 DEVINIT(sgi_ip30)
382 {
383 struct sgi_ip30_data *d;
384
385 CHECK_ALLOCATION(d = malloc(sizeof(struct sgi_ip30_data)));
386 memset(d, 0, sizeof(struct sgi_ip30_data));
387
388 memory_device_register(devinit->machine->memory, "sgi_ip30_1",
389 devinit->addr, DEV_SGI_IP30_LENGTH, dev_sgi_ip30_access, (void *)d,
390 DM_DEFAULT, NULL);
391 memory_device_register(devinit->machine->memory, "sgi_ip30_2",
392 0x10000000, 0x10000, dev_sgi_ip30_2_access, (void *)d, DM_DEFAULT,
393 NULL);
394 memory_device_register(devinit->machine->memory, "sgi_ip30_3",
395 0x1f000000, 0x10000, dev_sgi_ip30_3_access, (void *)d, DM_DEFAULT,
396 NULL);
397 memory_device_register(devinit->machine->memory, "sgi_ip30_4",
398 0x1f600000, 0x10000, dev_sgi_ip30_4_access, (void *)d, DM_DEFAULT,
399 NULL);
400 memory_device_register(devinit->machine->memory, "sgi_ip30_5",
401 0x1f6c0000, 0x10000, dev_sgi_ip30_5_access, (void *)d, DM_DEFAULT,
402 NULL);
403
404 machine_add_tickfunction(devinit->machine,
405 dev_sgi_ip30_tick, d, 16);
406
407 return 1;
408 }
409

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