/[gxemul]/trunk/src/devices/dev_sgi_ip30.c
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Contents of /trunk/src/devices/dev_sgi_ip30.c

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Revision 20 - (show annotations)
Mon Oct 8 16:19:23 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 10139 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============
1 /*
2 * Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_sgi_ip30.c,v 1.19 2005/11/13 00:14:10 debug Exp $
29 *
30 * SGI IP30 stuff.
31 *
32 * This is just comprised of hardcoded guesses so far. (Ugly.)
33 */
34
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38
39 #include "cpu.h"
40 #include "devices.h"
41 #include "machine.h"
42 #include "memory.h"
43 #include "misc.h"
44
45
46 void dev_sgi_ip30_tick(struct cpu *cpu, void *extra)
47 {
48 struct sgi_ip30_data *d = extra;
49
50 d->reg_0x20000 += 1000;
51
52 if (d->imask0 & ((int64_t)1<<50)) {
53 /* TODO: Only interrupt if reg 0x20000 (the counter)
54 has passed the compare (0x30000). */
55 cpu_interrupt(cpu, 8+1 + 50);
56 }
57 }
58
59
60 /*
61 * dev_sgi_ip30_access():
62 */
63 int dev_sgi_ip30_access(struct cpu *cpu, struct memory *mem,
64 uint64_t relative_addr, unsigned char *data, size_t len,
65 int writeflag, void *extra)
66 {
67 struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra;
68 uint64_t idata = 0, odata = 0;
69
70 if (writeflag == MEM_WRITE)
71 idata = memory_readmax64(cpu, data, len);
72
73 switch (relative_addr) {
74 case 0x20:
75 /* Memory bank configuration: */
76 odata = 0x80010000ULL;
77 break;
78 case 0x10000: /* Interrupt mask register 0: */
79 if (writeflag == MEM_WRITE) {
80 d->imask0 = idata;
81 } else {
82 odata = d->imask0;
83 }
84 break;
85 case 0x10018:
86 /*
87 * If this is not implemented, the IP30 PROM complains during
88 * bootup:
89 *
90 * *FAILED*
91 * Address: 0xffffffffaff10018, Expected:
92 * 0x0000000000000001, Received: 0x0000000000000000
93 */
94 if (writeflag == MEM_WRITE) {
95 d->reg_0x10018 = idata;
96 } else {
97 odata = d->reg_0x10018;
98 }
99 break;
100 case 0x10020: /* Set ISR, according to Linux/IP30 */
101 d->isr = idata;
102 /* Recalculate CPU interrupt assertions: */
103 cpu_interrupt(cpu, 8);
104 break;
105 case 0x10028: /* Clear ISR, according to Linux/IP30 */
106 d->isr &= ~idata;
107 /* Recalculate CPU interrupt assertions: */
108 cpu_interrupt(cpu, 8);
109 break;
110 case 0x10030: /* Interrupt Status Register */
111 if (writeflag == MEM_WRITE) {
112 /* Clear-on-write (TODO: is this correct?) */
113 d->isr &= ~idata;
114 /* Recalculate CPU interrupt assertions: */
115 cpu_interrupt(cpu, 8);
116 } else {
117 odata = d->isr;
118 }
119 break;
120 case 0x20000:
121 /* A counter */
122 if (writeflag == MEM_WRITE) {
123 d->reg_0x20000 = idata;
124 } else {
125 odata = d->reg_0x20000;
126 }
127 break;
128 case 0x30000:
129 if (writeflag == MEM_WRITE) {
130 d->reg_0x30000 = idata;
131 } else {
132 odata = d->reg_0x30000;
133 }
134 break;
135 default:
136 if (writeflag == MEM_WRITE) {
137 debug("[ sgi_ip30: unimplemented write to address "
138 "0x%x, data=0x%02x ]\n", (int)relative_addr,
139 (int)idata);
140 } else {
141 debug("[ sgi_ip30: unimplemented read from address"
142 " 0x%x ]\n", (int)relative_addr);
143 }
144 }
145
146 if (writeflag == MEM_READ)
147 memory_writemax64(cpu, data, len, odata);
148
149 return 1;
150 }
151
152
153 /*
154 * dev_sgi_ip30_2_access():
155 */
156 int dev_sgi_ip30_2_access(struct cpu *cpu, struct memory *mem,
157 uint64_t relative_addr, unsigned char *data, size_t len,
158 int writeflag, void *extra)
159 {
160 struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra;
161 uint64_t idata = 0, odata = 0;
162
163 idata = memory_readmax64(cpu, data, len);
164
165 switch (relative_addr) {
166
167 /* 0x114 + 0x40 * (wid - 8): 0x80000000 for "alive",
168 according to Linux/IP30 */
169
170 case 0x114 + 0x40 * (12 - 8):
171 fatal("[ IP30: asdvasdvnb ]\n");
172 odata = 0x80000000;
173 break;
174
175 case 0x0029c:
176 /*
177 * If this is not implemented, the IP30 PROM complains during
178 * bootup:
179 *
180 * *FAILED*
181 * Address: 0xffffffffb000029c, Expected:
182 * 0x0000000000000001, Received: 0x0000000000000000
183 */
184 if (writeflag == MEM_WRITE) {
185 d->reg_0x0029c = idata;
186 } else {
187 odata = d->reg_0x0029c;
188 }
189 break;
190 default:
191 if (writeflag == MEM_WRITE) {
192 debug("[ sgi_ip30_2: unimplemented write to "
193 "address 0x%x, data=0x%02x ]\n",
194 (int)relative_addr, (int)idata);
195 } else {
196 debug("[ sgi_ip30_2: unimplemented read from address "
197 "0x%x ]\n", (int)relative_addr);
198 }
199 }
200
201 if (writeflag == MEM_READ)
202 memory_writemax64(cpu, data, len, odata);
203
204 return 1;
205 }
206
207
208 /*
209 * dev_sgi_ip30_3_access():
210 */
211 int dev_sgi_ip30_3_access(struct cpu *cpu, struct memory *mem,
212 uint64_t relative_addr, unsigned char *data, size_t len,
213 int writeflag, void *extra)
214 {
215 struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra;
216 uint64_t idata = 0, odata = 0;
217
218 idata = memory_readmax64(cpu, data, len);
219
220 switch (relative_addr) {
221 case 0xb4:
222 if (writeflag == MEM_WRITE) {
223 debug("[ sgi_ip30_3: unimplemented write to "
224 "address 0x%x, data=0x%02x ]\n",
225 (int)relative_addr, (int)idata);
226 } else {
227 odata = 2; /* should be 2, or Irix loops */
228 }
229 break;
230 case 0x00104:
231 if (writeflag == MEM_WRITE) {
232 debug("[ sgi_ip30_3: unimplemented write to address "
233 "0x%x, data=0x%02x ]\n", (int)relative_addr,
234 (int)idata);
235 } else {
236 odata = 64; /* should be 64, or the PROM
237 complains */
238 }
239 break;
240 case 0x00284:
241 /*
242 * If this is not implemented, the IP30 PROM complains during
243 * bootup:
244 *
245 * *FAILED*
246 * Address: 0xffffffffbf000284, Expected:
247 * 0x0000000000000001, Received: 0x0000000000000000
248 */
249 if (writeflag == MEM_WRITE) {
250 d->reg_0x00284 = idata;
251 } else {
252 odata = d->reg_0x00284;
253 }
254 break;
255 default:
256 if (writeflag == MEM_WRITE) {
257 debug("[ sgi_ip30_3: unimplemented write to address "
258 "0x%x, data=0x%02x ]\n", (int)relative_addr,
259 (int)idata);
260 } else {
261 debug("[ sgi_ip30_3: unimplemented read from "
262 "address 0x%x ]\n", (int)relative_addr);
263 }
264 }
265
266 if (writeflag == MEM_READ)
267 memory_writemax64(cpu, data, len, odata);
268
269 return 1;
270 }
271
272
273 /*
274 * dev_sgi_ip30_4_access():
275 */
276 int dev_sgi_ip30_4_access(struct cpu *cpu, struct memory *mem,
277 uint64_t relative_addr, unsigned char *data, size_t len,
278 int writeflag, void *extra)
279 {
280 struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra;
281 uint64_t idata = 0, odata = 0;
282
283 idata = memory_readmax64(cpu, data, len);
284
285 switch (relative_addr) {
286 case 0x000b0:
287 /*
288 * If this is not implemented, the IP30 PROM complains during
289 * bootup:
290 *
291 * *FAILED*
292 * Address: 0xffffffffbf6000b0, Expected:
293 * 0x0000000000000001, Received: 0x0000000000000000
294 */
295 if (writeflag == MEM_WRITE) {
296 d->reg_0x000b0 = idata;
297 } else {
298 odata = d->reg_0x000b0;
299 }
300 break;
301 default:
302 if (writeflag == MEM_WRITE) {
303 debug("[ sgi_ip30_4: unimplemented write to address"
304 " 0x%x, data=0x%02x ]\n",
305 (int)relative_addr, (int)idata);
306 } else {
307 debug("[ sgi_ip30_4: unimplemented read from address"
308 " 0x%x ]\n", (int)relative_addr);
309 }
310 }
311
312 if (writeflag == MEM_READ)
313 memory_writemax64(cpu, data, len, odata);
314
315 return 1;
316 }
317
318
319 /*
320 * dev_sgi_ip30_5_access():
321 */
322 int dev_sgi_ip30_5_access(struct cpu *cpu, struct memory *mem,
323 uint64_t relative_addr, unsigned char *data, size_t len,
324 int writeflag, void *extra)
325 {
326 struct sgi_ip30_data *d = (struct sgi_ip30_data *) extra;
327 uint64_t idata = 0, odata = 0;
328
329 idata = memory_readmax64(cpu, data, len);
330
331 switch (relative_addr) {
332 case 0x00000:
333 if (writeflag == MEM_WRITE) {
334 d->reg_0x00000 = idata;
335 } else {
336 odata = d->reg_0x00000;
337 }
338 break;
339 default:
340 if (writeflag == MEM_WRITE) {
341 debug("[ sgi_ip30_5: unimplemented write to address "
342 "0x%x, data=0x%02x ]\n", (int)relative_addr,
343 (int)idata);
344 } else {
345 debug("[ sgi_ip30_5: unimplemented read from address "
346 "0x%x ]\n", (int)relative_addr);
347 }
348 }
349
350 if (writeflag == MEM_READ)
351 memory_writemax64(cpu, data, len, odata);
352
353 return 1;
354 }
355
356
357 /*
358 * dev_sgi_ip30_init():
359 */
360 struct sgi_ip30_data *dev_sgi_ip30_init(struct machine *machine,
361 struct memory *mem, uint64_t baseaddr)
362 {
363 struct sgi_ip30_data *d = malloc(sizeof(struct sgi_ip30_data));
364 if (d == NULL) {
365 fprintf(stderr, "out of memory\n");
366 exit(1);
367 }
368 memset(d, 0, sizeof(struct sgi_ip30_data));
369
370 memory_device_register(mem, "sgi_ip30_1", baseaddr,
371 DEV_SGI_IP30_LENGTH, dev_sgi_ip30_access, (void *)d,
372 DM_DEFAULT, NULL);
373 memory_device_register(mem, "sgi_ip30_2", 0x10000000,
374 0x10000, dev_sgi_ip30_2_access, (void *)d, DM_DEFAULT, NULL);
375 memory_device_register(mem, "sgi_ip30_3", 0x1f000000,
376 0x10000, dev_sgi_ip30_3_access, (void *)d, DM_DEFAULT, NULL);
377 memory_device_register(mem, "sgi_ip30_4", 0x1f600000,
378 0x10000, dev_sgi_ip30_4_access, (void *)d, DM_DEFAULT, NULL);
379 memory_device_register(mem, "sgi_ip30_5", 0x1f6c0000,
380 0x10000, dev_sgi_ip30_5_access, (void *)d, DM_DEFAULT, NULL);
381
382 machine_add_tickfunction(machine, dev_sgi_ip30_tick, d, 16);
383
384 return d;
385 }
386
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