/[gxemul]/trunk/src/devices/dev_sgi_gbe.c
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Contents of /trunk/src/devices/dev_sgi_gbe.c

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Revision 34 - (show annotations)
Mon Oct 8 16:21:17 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 12605 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029	Changing usleep(1) calls in the debugger to usleep(10000)
20061107	Adding a new disk image option (-d o...) which sets the ISO9660
		filesystem base offset; also making some other hacks to allow
		NetBSD/dreamcast and homebrew demos/games to boot directly
		from a filesystem image.
		Moving Dreamcast-specific stuff in the documentation to its
		own page (dreamcast.html).
		Adding a border to the Dreamcast PVR framebuffer.
20061108	Adding a -T command line option (again?), for halting the
		emulator on unimplemented memory accesses.
20061109	Continuing on various SH4 and Dreamcast related things.
		The emulator should now halt on more unimplemented device
		accesses, instead of just printing a warning, forcing me to
		actually implement missing stuff :)
20061111	Continuing on SH4 and Dreamcast stuff.
		Adding a bogus Landisk (SH4) machine mode.
20061112	Implementing some parts of the Dreamcast GDROM device. With
		some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113	NetBSD/dreamcast now starts booting from the Live CD image,
		but crashes randomly quite early on in the boot process.
20061122	Beginning on a skeleton interrupt.h and interrupt.c for the
		new interrupt subsystem.
20061124	Continuing on the new interrupt system; taking the first steps
		to attempt to connect CPUs (SuperH and MIPS) and devices
		(dev_cons and SH4 timer interrupts) to it. Many things will
		probably break from now on.
20061125	Converting dev_ns16550, dev_8253 to the new interrupt system.
		Attempting to begin to convert the ISA bus.
20061130	Incorporating a patch from Brian Foley for the configure
		script, which checks for X11 libs in /usr/X11R6/lib64 (which
		is used on some Linux systems).
20061227	Adding a note in the man page about booting from Dreamcast
		CDROM images (i.e. that no external kernel is needed).
20061229	Continuing on the interrupt system rewrite: beginning to
		convert more devices, adding abort() calls for legacy interrupt
		system calls so that everything now _has_ to be rewritten!
		Almost all machine modes are now completely broken.
20061230	More progress on removing old interrupt code, mostly related
		to the ISA bus + devices, the LCA bus (on AlphaBook1), and
		the Footbridge bus (for CATS). And some minor PCI stuff.
		Connecting the ARM cpu to the new interrupt system.
		The CATS, NetWinder, and QEMU_MIPS machine modes now work with
		the new interrupt system :)
20061231	Connecting PowerPC CPUs to the new interrupt system.
		Making PReP machines (IBM 6050) work again.
		Beginning to convert the GT PCI controller (for e.g. Malta
		and Cobalt emulation). Some things work, but not everything.
		Updating Copyright notices for 2007.
20070101	Converting dev_kn02 from legacy style to devinit; the 3max
		machine mode now works with the new interrupt system :-]
20070105	Beginning to convert the SGI O2 machine to the new interrupt
		system; finally converting O2 (IP32) devices to devinit, etc.
20070106	Continuing on the interrupt system redesign/rewrite; KN01
		(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
		moving out stuff from machine.h and devices.h into the
		corresponding devices, beginning the rewrite of i80321
		interrupts, etc.
20070107	Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117	Beginning the rewrite of Algor (V3) interrupts (finally
		changing dev_v3 into devinit style).
20070118	Removing the "bus" registry concept from machine.h, because
		it was practically meaningless.
		Continuing on the rewrite of Algor V3 ISA interrupts.
20070121	More work on Algor interrupts; they are now working again,
		well enough to run NetBSD/algor. :-)
20070122	Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
		can be installed using the new interrupt system :-)
20070123	Making the testmips mode work with the new interrupt system.
20070127	Beginning to convert DEC5800 devices to devinit, and to the
		new interrupt system.
		Converting Playstation 2 devices to devinit, and converting
		the interrupt system. Also fixing a severe bug: the interrupt
		mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128	Removing the dummy NetGear machine mode and the 8250 device
		(which was only used by the NetGear machine).
		Beginning to convert the MacPPC GC (Grand Central) interrupt
		controller to the new interrupt system.
		Converting Jazz interrupts (PICA61 etc.) to the new interrupt
		system. NetBSD/arc can be installed again :-)
		Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
		NetBSD and it is better than a completely dummy timer as it
		was before).
		Converting dev_mp to the new interrupt system, although I
		haven't had time to actually test it yet.
		Completely removing src/machines/interrupts.c, cpu_interrupt
		and cpu_interrupt_ack in src/cpu.c, and
		src/include/machine_interrupts.h! Adding fatal error messages
		+ abort() in the few places that are left to fix.
		Converting dev_z8530 to the new interrupt system.
		FINALLY removing the md_int struct completely from the
		machine struct.
		SH4 fixes (adding a PADDR invalidation in the ITLB replacement
		code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
		all the way to the login prompt, and can be interacted with :-)
		Converting the CPC700 controller (PCI and interrupt controller
		for PM/PPC) to the new interrupt system.
20070129	Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
		sgimips' and OpenBSD/sgi's ramdisk kernels can now be
		interacted with again.
20070130	Moving out the MIPS multi_lw and _sw instruction combinations
		so that they are auto-generated at compile time instead.
20070131	Adding detection of amd64/x86_64 hosts in the configure script,
		for doing initial experiments (again :-) with native code
		generation.
		Adding a -k command line option to set the size of the dyntrans
		cache, and a -B command line option to disable native code
		generation, even if GXemul was compiled with support for
		native code generation for the specific host CPU architecture.
20070201	Experimenting with a skeleton for native code generation.
		Changing the default behaviour, so that native code generation
		is now disabled by default, and has to be enabled by using
		-b on the command line.
20070202	Continuing the native code generation experiments.
		Making PCI interrupts work for Footbridge again.
20070203	More native code generation experiments.
		Removing most of the native code generation experimental code,
		it does not make sense to include any quick hacks like this.
		Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204	Making i80321 interrupts work again (for NetBSD/evbarm etc.),
		and fixing the timer at 100 Hz.
20070206	Experimenting with removing the wdc interrupt slowness hack.
20070207	Lowering the number of dyntrans TLB entries for MIPS from
		192 to 128, resulting in a minor speed improvement.
		Minor optimization to the code invalidation routine in
		cpu_dyntrans.c.
20070208	Increasing (experimentally) the nr of dyntrans instructions per
		loop from 60 to 120.
20070210	Commenting out (experimentally) the dyntrans_device_danger
		detection in memory_rw.c.
		Changing the testmips and baremips machines to use a revision 2
		MIPS64 CPU by default, instead of revision 1.
		Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
		files, the PC bios emulation, and the Olivetti M700 (ARC) and
		db64360 emulation modes.
20070211	Adding an "mp" demo to the demos directory, which tests the
		SMP functionality of the testmips machine.
		Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216	Adding a "nop workaround" for booting Mach/PMAX to the
		documentation; thanks to Artur Bujdoso for the values.
		Converting more of the MacPPC interrupt stuff to the new
		system.
		Beginning to convert BeBox interrupts to the new system.
		PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
		Correcting BeBox clock speed (it was set to 100 in the NetBSD
		bootinfo block, but should be 33000000/4), allowing NetBSD
		to start without using the (incorrect) PPC_NO_DEC hack.
20070217	Implementing (slow) AltiVec vector loads and stores, allowing
		NetBSD/macppc to finally boot using the GENERIC kernel :-)
		Updating the documentation with install instructions for
		NetBSD/macppc.
20070218-19	Regression testing for the release.

==============  RELEASE 0.4.4  ==============
1 /*
2 * Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_sgi_gbe.c,v 1.35 2006/12/30 13:30:59 debug Exp $
29 *
30 * SGI "gbe", graphics controller. Framebuffer.
31 * Loosely inspired by Linux code.
32 */
33
34 #include <stdio.h>
35 #include <stdlib.h>
36 #include <string.h>
37
38 #include "console.h"
39 #include "cpu.h"
40 #include "devices.h"
41 #include "machine.h"
42 #include "memory.h"
43 #include "misc.h"
44
45
46 /* Let's hope nothing is there already... */
47 #define FAKE_GBE_FB_ADDRESS 0x38000000
48
49 #define GBE_DEBUG
50 /* #define debug fatal */
51
52 #define MTE_TEST
53
54 #define GBE_DEFAULT_XRES 640
55 #define GBE_DEFAULT_YRES 480
56
57
58 struct sgi_gbe_data {
59 int xres, yres;
60
61 uint32_t control; /* 0x00000 */
62 uint32_t dotclock; /* 0x00004 */
63 uint32_t i2c; /* 0x00008 */
64 uint32_t i2cfp; /* 0x00010 */
65 uint32_t plane0ctrl; /* 0x30000 */
66 uint32_t frm_control; /* 0x3000c */
67 int freeze;
68
69 int bitdepth;
70 struct vfb_data *fb_data;
71 };
72
73
74 /*
75 * dev_sgi_gbe_tick():
76 *
77 * Every now and then, copy data from the framebuffer in normal ram
78 * to the actual framebuffer (which will then redraw the window).
79 * TODO: This is utterly slow, even slower than the normal framebuffer
80 * which is really slow as it is.
81 *
82 * frm_control (bits 31..9) is a pointer to an array of uint16_t.
83 * These numbers (when << 16 bits) are pointers to the tiles. Tiles are
84 * 512x128 in 8-bit mode, 256x128 in 16-bit mode, and 128x128 in 32-bit mode.
85 */
86 void dev_sgi_gbe_tick(struct cpu *cpu, void *extra)
87 {
88 struct sgi_gbe_data *d = extra;
89 int tile_nr = 0, on_screen = 1, xbase = 0, ybase = 0;
90 unsigned char tileptr_buf[sizeof(uint16_t)];
91 uint64_t tileptr, tiletable;
92 int lines_to_copy, pixels_per_line, y;
93 unsigned char buf[16384]; /* must be power of 2, at most 65536 */
94 int copy_len, copy_offset;
95 uint64_t old_fb_offset = 0;
96 int tweaked = 1;
97
98 #ifdef MTE_TEST
99 /* Actually just a return, but this fools the Compaq compiler... */
100 if (cpu != NULL)
101 return;
102 #endif
103
104 /* debug("[ sgi_gbe: dev_sgi_gbe_tick() ]\n"); */
105
106 tiletable = (d->frm_control & 0xfffffe00);
107 if (tiletable == 0)
108 on_screen = 0;
109 /*
110 tweaked = 0;
111 */
112 while (on_screen) {
113 /* Get pointer to a tile: */
114 cpu->memory_rw(cpu, cpu->mem, tiletable +
115 sizeof(tileptr_buf) * tile_nr,
116 tileptr_buf, sizeof(tileptr_buf), MEM_READ,
117 NO_EXCEPTIONS | PHYSICAL);
118 tileptr = 256 * tileptr_buf[0] + tileptr_buf[1];
119 /* TODO: endianness */
120 tileptr <<= 16;
121
122 /* tileptr is now a physical address of a tile. */
123 debug("[ sgi_gbe: tile_nr = %2i, tileptr = 0x%08lx, xbase"
124 " = %4i, ybase = %4i ]\n", tile_nr, tileptr, xbase, ybase);
125
126 if (tweaked) {
127 /* Tweaked (linear) mode: */
128
129 /*
130 * Copy data from this 64KB physical RAM block to the
131 * framebuffer:
132 *
133 * NOTE: Copy it in smaller chunks than 64KB, in case
134 * the framebuffer device can optimize away
135 * portions that aren't modified that way.
136 */
137 copy_len = sizeof(buf);
138 copy_offset = 0;
139
140 while (on_screen && copy_offset < 65536) {
141 if (old_fb_offset + copy_len > (uint64_t)
142 (d->xres * d->yres * d->bitdepth / 8)) {
143 copy_len = d->xres * d->yres *
144 d->bitdepth / 8 - old_fb_offset;
145 /* Stop after copying this block... */
146 on_screen = 0;
147 }
148
149 /* debug("old_fb_offset = %08x copylen"
150 "=%i\n", old_fb_offset, copy_len); */
151
152 cpu->memory_rw(cpu, cpu->mem, tileptr +
153 copy_offset, buf, copy_len, MEM_READ,
154 NO_EXCEPTIONS | PHYSICAL);
155 dev_fb_access(cpu, cpu->mem, old_fb_offset,
156 buf, copy_len, MEM_WRITE, d->fb_data);
157 copy_offset += sizeof(buf);
158 old_fb_offset += sizeof(buf);
159 }
160 } else {
161 /* This is for non-tweaked (tiled) mode. Not really
162 tested with correct image data, but might work: */
163
164 lines_to_copy = 128;
165 if (ybase + lines_to_copy > d->yres)
166 lines_to_copy = d->yres - ybase;
167
168 pixels_per_line = 512 * 8 / d->bitdepth;
169 if (xbase + pixels_per_line > d->xres)
170 pixels_per_line = d->xres - xbase;
171
172 for (y=0; y<lines_to_copy; y++) {
173 cpu->memory_rw(cpu, cpu->mem, tileptr + 512 * y,
174 buf, pixels_per_line * d->bitdepth / 8,
175 MEM_READ, NO_EXCEPTIONS | PHYSICAL);
176 #if 0
177 {
178 int i;
179 for (i=0; i<pixels_per_line * d->bitdepth / 8; i++)
180 buf[i] ^= (random() & 0x20);
181 }
182 #endif
183 dev_fb_access(cpu, cpu->mem, ((ybase + y) *
184 d->xres + xbase) * d->bitdepth / 8,
185 buf, pixels_per_line * d->bitdepth / 8,
186 MEM_WRITE, d->fb_data);
187 }
188
189 /* Go to next tile: */
190 xbase += (512 * 8 / d->bitdepth);
191 if (xbase >= d->xres) {
192 xbase = 0;
193 ybase += 128;
194 if (ybase >= d->yres)
195 on_screen = 0;
196 }
197 }
198
199 /* Go to next tile: */
200 tile_nr ++;
201 }
202
203 /* debug("[ sgi_gbe: dev_sgi_gbe_tick() end]\n"); */
204 }
205
206
207 /*
208 * dev_sgi_gbe_access():
209 */
210 DEVICE_ACCESS(sgi_gbe)
211 {
212 struct sgi_gbe_data *d = extra;
213 uint64_t idata = 0, odata = 0;
214
215 if (writeflag == MEM_WRITE)
216 idata = memory_readmax64(cpu, data, len);
217
218 #ifdef GBE_DEBUG
219 if (writeflag == MEM_WRITE)
220 debug("[ sgi_gbe: DEBUG: write to address 0x%llx, data"
221 "=0x%llx ]\n", (long long)relative_addr, (long long)idata);
222 #endif
223
224 switch (relative_addr) {
225
226 case 0x0:
227 if (writeflag == MEM_WRITE)
228 d->control = idata;
229 else
230 odata = d->control;
231 break;
232
233 case 0x4:
234 if (writeflag == MEM_WRITE)
235 d->dotclock = idata;
236 else
237 odata = d->dotclock;
238 break;
239
240 case 0x8: /* i2c? */
241 /*
242 * "CRT I2C control".
243 *
244 * I'm not sure what this does. It isn't really commented
245 * in the linux sources. The IP32 prom writes the values
246 * 0x03, 0x01, and then 0x00 to this address, and then
247 * reads back a value.
248 */
249 if (writeflag == MEM_WRITE) {
250 d->i2c = idata;
251 } else {
252 odata = d->i2c;
253 odata |= 1; /* ? The IP32 prom wants this? */
254 }
255 break;
256
257 case 0x10: /* i2cfp, flat panel control */
258 if (writeflag == MEM_WRITE) {
259 d->i2cfp = idata;
260 } else {
261 odata = d->i2cfp;
262 odata |= 1; /* ? The IP32 prom wants this? */
263 }
264 break;
265
266 case 0x10000: /* vt_xy, according to Linux */
267 if (writeflag == MEM_WRITE)
268 d->freeze = idata & ((uint32_t)1<<31)? 1 : 0;
269 else {
270 /* bit 31 = freeze, 23..12 = cury, 11.0 = curx */
271 odata = ((random() % (d->yres + 10)) << 12)
272 + (random() % (d->xres + 10)) +
273 (d->freeze? ((uint32_t)1 << 31) : 0);
274 odata = random(); /* testhack for the ip32 prom */
275 }
276 break;
277
278 case 0x10004: /* vt_xymax, according to Linux */
279 odata = ((d->yres-1) << 12) + d->xres-1;
280 /* ... 12 bits maxy, 12 bits maxx. */
281 break;
282
283 case 0x10034: /* vt_hpixen, according to Linux */
284 odata = (0 << 12) + d->xres-1;
285 /* ... 12 bits on, 12 bits off. */
286 break;
287
288 case 0x10038: /* vt_vpixen, according to Linux */
289 odata = (0 << 12) + d->yres-1;
290 /* ... 12 bits on, 12 bits off. */
291 break;
292
293 case 0x20004:
294 odata = random(); /* IP32 prom test hack. TODO */
295 /* IRIX wants 0x20, it seems. */
296 if (random() & 1)
297 odata = 0x20;
298 break;
299
300 case 0x30000: /* normal plane ctrl 0 */
301 /* bit 15 = fifo reset, 14..13 = depth,
302 12..5 = tile width, 4..0 = rhs */
303 if (writeflag == MEM_WRITE) {
304 d->plane0ctrl = idata;
305 d->bitdepth = 8 << ((d->plane0ctrl >> 13) & 3);
306 debug("[ sgi_gbe: setting color depth to %i bits ]\n",
307 d->bitdepth);
308 if (d->bitdepth != 8)
309 fatal("sgi_gbe: warning: bitdepth %i not "
310 "really implemented yet\n", d->bitdepth);
311 } else
312 odata = d->plane0ctrl;
313 break;
314
315 case 0x30008: /* normal plane ctrl 2 */
316 odata = random(); /* IP32 prom test hack. TODO */
317 /* IRIX wants 0x20, it seems. */
318 if (random() & 1)
319 odata = 0x20;
320 break;
321
322 case 0x3000c: /* normal plane ctrl 3 */
323 /*
324 * Writes to 3000c should be readable back at 30008?
325 * At least bit 0 (dma) ctrl 3.
326 *
327 * Bits 31..9 = tile table pointer bits,
328 * Bit 1 = linear
329 * Bit 0 = dma
330 */
331 if (writeflag == MEM_WRITE) {
332 d->frm_control = idata;
333 debug("[ sgi_gbe: frm_control = 0x%08x ]\n",
334 d->frm_control);
335 } else
336 odata = d->frm_control;
337 break;
338
339 case 0x40000:
340 odata = random(); /* IP32 prom test hack. TODO */
341 /* IRIX wants 0x20, it seems. */
342 if (random() & 1)
343 odata = 0x20;
344 break;
345
346 /*
347 * Linux/sgimips seems to write color palette data to offset 0x50000
348 * to 0x503xx, and gamma correction data to 0x60000 - 0x603ff, as
349 * 32-bit values at addresses divisible by 4 (formated as 0xrrggbb00).
350 *
351 * sgio2fb: initializing
352 * sgio2fb: I/O at 0xffffffffb6000000
353 * sgio2fb: tiles at ffffffffa2ef5000
354 * sgio2fb: framebuffer at ffffffffa1000000
355 * sgio2fb: 8192kB memory
356 * Console: switching to colour frame buffer device 80x30
357 */
358
359 default:
360 /* Gamma correction: */
361 if (relative_addr >= 0x60000 && relative_addr <= 0x603ff) {
362 /* ignore gamma correction for now */
363 break;
364 }
365
366 /* RGB Palette: */
367 if (relative_addr >= 0x50000 && relative_addr <= 0x503ff) {
368 int color_nr, r, g, b;
369 int old_r, old_g, old_b;
370
371 color_nr = (relative_addr & 0x3ff) / 4;
372 r = (idata >> 24) & 0xff;
373 g = (idata >> 16) & 0xff;
374 b = (idata >> 8) & 0xff;
375
376 old_r = d->fb_data->rgb_palette[color_nr * 3 + 0];
377 old_g = d->fb_data->rgb_palette[color_nr * 3 + 1];
378 old_b = d->fb_data->rgb_palette[color_nr * 3 + 2];
379
380 d->fb_data->rgb_palette[color_nr * 3 + 0] = r;
381 d->fb_data->rgb_palette[color_nr * 3 + 1] = g;
382 d->fb_data->rgb_palette[color_nr * 3 + 2] = b;
383
384 if (r != old_r || g != old_g || b != old_b) {
385 /* If the palette has been changed, the entire
386 image needs to be redrawn... :-/ */
387 d->fb_data->update_x1 = 0;
388 d->fb_data->update_x2 = d->fb_data->xsize - 1;
389 d->fb_data->update_y1 = 0;
390 d->fb_data->update_y2 = d->fb_data->ysize - 1;
391 }
392 break;
393 }
394
395 if (writeflag == MEM_WRITE)
396 debug("[ sgi_gbe: unimplemented write to address "
397 "0x%llx, data=0x%llx ]\n",
398 (long long)relative_addr, (long long)idata);
399 else
400 debug("[ sgi_gbe: unimplemented read from address "
401 "0x%llx ]\n", (long long)relative_addr);
402 }
403
404 if (writeflag == MEM_READ) {
405 #ifdef GBE_DEBUG
406 debug("[ sgi_gbe: DEBUG: read from address 0x%llx: 0x%llx ]\n",
407 (long long)relative_addr, (long long)odata);
408 #endif
409 memory_writemax64(cpu, data, len, odata);
410 }
411
412 return 1;
413 }
414
415
416 /*
417 * dev_sgi_gbe_init():
418 */
419 void dev_sgi_gbe_init(struct machine *machine, struct memory *mem,
420 uint64_t baseaddr)
421 {
422 struct sgi_gbe_data *d;
423
424 d = malloc(sizeof(struct sgi_gbe_data));
425 if (d == NULL) {
426 fprintf(stderr, "out of memory\n");
427 exit(1);
428 }
429 memset(d, 0, sizeof(struct sgi_gbe_data));
430
431 /* 640x480 for Linux: */
432 d->xres = GBE_DEFAULT_XRES;
433 d->yres = GBE_DEFAULT_YRES;
434 d->bitdepth = 8;
435 d->control = 0x20aa000; /* or 0x00000001? */
436
437 /* 1280x1024 for booting the O2's PROM: */
438 d->xres = 1280; d->yres = 1024;
439
440 d->fb_data = dev_fb_init(machine, mem, FAKE_GBE_FB_ADDRESS,
441 VFB_GENERIC, d->xres, d->yres, d->xres, d->yres, 8, "SGI GBE");
442 set_grayscale_palette(d->fb_data, 256);
443
444 memory_device_register(mem, "sgi_gbe", baseaddr, DEV_SGI_GBE_LENGTH,
445 dev_sgi_gbe_access, d, DM_DEFAULT, NULL);
446 machine_add_tickfunction(machine, dev_sgi_gbe_tick, d, 18, 0.0);
447 }
448
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