/[gxemul]/trunk/src/devices/dev_sgi_gbe.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /trunk/src/devices/dev_sgi_gbe.c

Parent Directory Parent Directory | Revision Log Revision Log

Revision 24 - (hide annotations)
Mon Oct 8 16:19:56 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 12605 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1256 2006/06/23 20:43:44 debug Exp $
20060219	Various minor updates. Removing the old MIPS16 skeleton code,
		because it will need to be rewritten for dyntrans anyway.
20060220-22	Removing the non-working dyntrans backend support.
		Continuing on the 64-bit dyntrans virtual memory generalization.
20060223	More work on the 64-bit vm generalization.
20060225	Beginning on MIPS dyntrans load/store instructions.
		Minor PPC updates (64-bit load/store, etc).
		Fixes for the variable-instruction-length framework, some
		minor AVR updates (a simple Hello World program works!).
		Beginning on a skeleton for automatically generating documen-
		tation (for devices etc.).
20060226	PPC updates (adding some more 64-bit instructions, etc).
		AVR updates (more instructions).
		FINALLY found and fixed the zs bug, making NetBSD/macppc
		accept the serial console.
20060301	Adding more AVR instructions.
20060304	Continuing on AVR-related stuff. Beginning on a framework for
		cycle-accurate device emulation. Adding an experimental "PAL
		TV" device (just a dummy so far).
20060305	Adding more AVR instructions.
		Adding a dummy epcom serial controller (for TS7200 emulation).
20060310	Removing the emul() command from configuration files, so only
		net() and machine() are supported.
		Minor progress on the MIPS dyntrans rewrite.
20060311	Continuing on the MIPS dyntrans rewrite (adding more
		instructions, etc).
20060315	Adding more instructions (sllv, srav, srlv, bgtz[l], blez[l],
		beql, bnel, slti[u], various loads and stores).
20060316	Removing the ALWAYS_SIGNEXTEND_32 option, since it was rarely
		used.
		Adding more MIPS dyntrans instructions, and fixing bugs.
20060318	Implementing fast loads/stores for MIPS dyntrans (big/little
		endian, 32-bit and 64-bit modes).
20060320	Making MIPS dyntrans the default configure option; use
		"--enable-oldmips" to use the old bintrans system.
		Adding MIPS dyntrans dmult[u]; minor updates.
20060322	Continuing... adding some more instructions.
		Adding a simple skeleton for demangling C++ "_ZN" symbols.
20060323	Moving src/debugger.c into a new directory (src/debugger/).
20060324	Fixing the hack used to load PPC ELFs (useful for relocated
		Linux/ppc kernels), and adding a dummy G3 machine mode.
20060325-26	Beginning to experiment with GDB remote serial protocol
		connections; adding a -G command line option for selecting
		which TCP port to listen to.
20060330	Beginning a major cleanup to replace things like "0x%016llx"
		with more correct "0x%016"PRIx64, etc.
		Continuing on the GDB remote serial protocol support.
20060331	More cleanup, and some minor GDB remote progress.
20060402	Adding a hack to the configure script, to allow compilation
		on systems that lack PRIx64 etc.
20060406	Removing the temporary FreeBSD/arm hack in dev_ns16550.c and
		replacing it with a better fix from Olivier Houchard.
20060407	A remote debugger (gdb or ddd) can now start and stop the
		emulator using the GDB remote serial protocol, and registers
		and memory can be read. MIPS only for now.
20060408	More GDB progress: single-stepping also works, and also adding
		support for ARM, PowerPC, and Alpha targets.
		Continuing on the delay-slot-across-page-boundary issue.
20060412	Minor update: beginning to add support for the SPARC target
		to the remote GDB functionality.
20060414	Various MIPS updates: adding more instructions for dyntrans
		(eret, add), and making some exceptions work. Fixing a bug
		in dmult[u].
		Implementing the first SPARC instructions (sethi, or).
20060415	Adding "magic trap" instructions so that PROM calls can be
		software emulated in MIPS dyntrans.
		Adding more MIPS dyntrans instructions (ddiv, dadd) and
		fixing another bug in dmult.
20060416	More MIPS dyntrans progress: adding [d]addi, movn, movz, dsllv,
		rfi, an ugly hack for supporting R2000/R3000 style faked caches,
		preliminary interrupt support, and various other updates and
		bugfixes.
20060417	Adding more SPARC instructions (add, sub, sll[x], sra[x],
		srl[x]), and useful SPARC header definitions.
		Adding the first (trivial) x86/AMD64 dyntrans instructions (nop,
		cli/sti, stc/clc, std/cld, simple mov, inc ax). Various other
		x86 updates related to variable instruction length stuff.
		Adding unaligned loads/stores to the MIPS dyntrans mode (but
		still using the pre-dyntrans (slow) imlementation).
20060419	Fixing a MIPS dyntrans exception-in-delay-slot bug.
		Removing the old "show opcode statistics" functionality, since
		it wasn't really useful and isn't implemented for dyntrans.
		Single-stepping (or running with instruction trace) now looks
		ok with dyntrans with delay-slot architectures.
20060420	Minor hacks (removing the -B command line option when compiled
		for non-bintrans, and some other very minor updates).
		Adding (slow) MIPS dyntrans load-linked/store-conditional.
20060422	Applying fixes for bugs discovered by Nils Weller's nwcc
		(static DEC memmap => now per machine, and adding an extern
		keyword in cpu_arm_instr.c).
		Finally found one of the MIPS dyntrans bugs that I've been
		looking for (copy/paste spelling error BIG vs LITTLE endian in
		cpu_mips_instr_loadstore.c for 16-bit fast stores).
		FINALLY found the major MIPS dyntrans bug: slti vs sltiu
		signed/unsigned code in cpu_mips_instr.c. :-)
		Adding more MIPS dyntrans instructions (lwc1, swc1, bgezal[l],
		ctc1, tlt[u], tge[u], tne, beginning on rdhwr).
		NetBSD/hpcmips can now reach userland when using dyntrans :-)
		Adding some more x86 dyntrans instructions.
		Finally removed the old Alpha-specific virtual memory code,
		and replaced it with the generic 64-bit version.
		Beginning to add disassembly support for SPECIAL3 MIPS opcodes.
20060423	Continuing on the delay-slot-across-page-boundary issue;
		adding an end_of_page2 ic slot (like I had planned before, but
		had removed for some reason).
		Adding a quick-and-dirty fallback to legacy coprocessor 1
		code (i.e. skipping dyntrans implementation for now).
		NetBSD/hpcmips and NetBSD/pmax (when running on an emulated
		R4400) can now be installed and run. :-)  (Many bugs left
		to fix, though.)
		Adding more MIPS dyntrans instructions: madd[u], msub[u].
		Cleaning up the SPECIAL2 vs R5900/TX79/C790 "MMI" opcode
		maps somewhat (disassembly and dyntrans instruction decoding).
20060424	Adding an isa_revision field to mips_cpu_types.h, and making
		sure that SPECIAL3 opcodes cause Reserved Instruction
		exceptions on MIPS32/64 revisions lower than 2.
		Adding the SPARC 'ba', 'call', 'jmpl/retl', 'and', and 'xor'
		instructions.
20060425	Removing the -m command line option ("run at most x 
		instructions") and -T ("single_step_on_bad_addr"), because
		they never worked correctly with dyntrans anyway.
		Freshening up the man page.
20060428	Adding more MIPS dyntrans instructions: bltzal[l], idle.
		Enabling MIPS dyntrans compare interrupts.
20060429	FINALLY found the weird dyntrans bug, causing NetBSD etc. to
		behave strangely: some floating point code (conditional
		coprocessor branches) could not be reused from the old
		non-dyntrans code. The "quick-and-dirty fallback" only appeared
		to work. Fixing by implementing bc1* for MIPS dyntrans.
		More MIPS instructions: [d]sub, sdc1, ldc1, dmtc1, dmfc1, cfc0.
		Freshening up MIPS floating point disassembly appearance.
20060430	Continuing on C790/R5900/TX79 disassembly; implementing 128-bit
		"por" and "pextlw".
20060504	Disabling -u (userland emulation) unless compiled as unstable
		development version.
		Beginning on freshening up the testmachine include files,
		to make it easier to reuse those files (placing them in
		src/include/testmachine/), and beginning on a set of "demos"
		or "tutorials" for the testmachine functionality.
		Minor updates to the MIPS GDB remote protocol stub.
		Refreshing doc/experiments.html and gdb_remote.html.
		Enabling Alpha emulation in the stable release configuration,
		even though no guest OSes for Alpha can run yet.
20060505	Adding a generic 'settings' object, which will contain
		references to settable variables (which will later be possible
		to access using the debugger).
20060506	Updating dev_disk and corresponding demo/documentation (and
		switching from SCSI to IDE disk types, so it actually works
		with current test machines :-).
20060510	Adding a -D_LARGEFILE_SOURCE hack for 64-bit Linux hosts,
		so that fseeko() doesn't give a warning.
		Updating the section about how dyntrans works (the "runnable
		IR") in doc/intro.html.
		Instruction updates (some x64=1 checks, some more R5900
		dyntrans stuff: better mul/mult separation from MIPS32/64,
		adding ei and di).
		Updating MIPS cpuregs.h to a newer one (from NetBSD).
		Adding more MIPS dyntrans instructions: deret, ehb.
20060514	Adding disassembly and beginning implementation of SPARC wr
		and wrpr instructions.
20060515	Adding a SUN SPARC machine mode, with dummy SS20 and Ultra1
		machines. Adding the 32-bit "rd psr" instruction.
20060517	Disassembly support for the general SPARC rd instruction.
		Partial implementation of the cmp (subcc) instruction.
		Some other minor updates (making sure that R5900 processors
		start up with the EIE bit enabled, otherwise Linux/playstation2
		receives no interrupts).
20060519	Minor MIPS updates/cleanups.
20060521	Moving the MeshCube machine into evbmips; this seems to work
		reasonably well with a snapshot of a NetBSD MeshCube kernel.
		Cleanup/fix of MIPS config0 register initialization.
20060529	Minor MIPS fixes, including a sign-extension fix to the
		unaligned load/store code, which makes NetBSD/pmax on R3000
		work better with dyntrans. (Ultrix and Linux/DECstation still
		don't work, though.)
20060530	Minor updates to the Alpha machine mode: adding an AlphaBook
		mode, an LCA bus (forwarding accesses to an ISA bus), etc.
20060531	Applying a bugfix for the MIPS dyntrans sc[d] instruction from
		Ondrej Palkovsky. (Many thanks.)
20060601	Minifix to allow ARM immediate msr instruction to not give
		an error for some valid values.
		More Alpha updates.
20060602	Some minor Alpha updates.
20060603	Adding the Alpha cmpbge instruction. NetBSD/alpha prints its
		first boot messages :-) on an emulated Alphabook 1.
20060612	Minor updates; adding a dev_ether.h include file for the
		testmachine ether device. Continuing the hunt for the dyntrans
		bug which makes Linux and Ultrix on DECstation behave
		strangely... FINALLY found it! It seems to be related to
		invalidation of the translation cache, on tlbw{r,i}. There
		also seems to be some remaining interrupt-related problems.
20060614	Correcting the implementation of ldc1/sdc1 for MIPS dyntrans
		(so that it uses 16 32-bit registers if the FR bit in the
		status register is not set).
20060616	REMOVING BINTRANS COMPLETELY!
		Removing the old MIPS interpretation mode.
		Removing the MFHILO_DELAY and instruction delay stuff, because
		they wouldn't work with dyntrans anyway.
20060617	Some documentation updates (adding "NetBSD-archive" to some
		URLs, and new Debian/DECstation installation screenshots).
		Removing the "tracenull" and "enable-caches" configure options.
		Improving MIPS dyntrans performance somewhat (only invalidate
		translations if necessary, on writes to the entryhi register,
		instead of doing it for all cop0 writes).
20060618	More cleanup after the removal of the old MIPS emulation.
		Trying to fix the MIPS dyntrans performance bugs/bottlenecks;
		only semi-successful so far (for R3000).
20060620	Minor update to allow clean compilation again on Tru64/Alpha.
20060622	MIPS cleanup and fixes (removing the pc_last stuff, which
		doesn't make sense with dyntrans anyway, and fixing a cross-
		page-delay-slot-with-exception case in end_of_page).
		Removing the old max_random_cycles_per_chunk stuff, and the
		concept of cycles vs instructions for MIPS emulation.
		FINALLY found and fixed the bug which caused NetBSD/pmax
		clocks to behave strangely (it was a load to the zero register,
		which was treated as a NOP; now it is treated as a load to a
		dummy scratch register).
20060623	Increasing the dyntrans chunk size back to
		N_SAFE_DYNTRANS_LIMIT, instead of N_SAFE_DYNTRANS_LIMIT/2.
		Preparing for a quick release, even though there are known
		bugs, and performance for non-R3000 MIPS emulation is very
		poor. :-/
		Reverting to half the dyntrans chunk size again, because
		NetBSD/cats seemed less stable with full size chunks. :(
		NetBSD/sgimips 3.0 can now run :-)  (With release 0.3.8, only
		NetBSD/sgimips 2.1 worked, not 3.0.)

==============  RELEASE 0.4.0  ==============
1 dpavlin 4 /*
2 dpavlin 22 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 dpavlin 4 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 24 * $Id: dev_sgi_gbe.c,v 1.34 2006/03/04 12:38:48 debug Exp $
29 dpavlin 4 *
30     * SGI "gbe", graphics controller. Framebuffer.
31     * Loosely inspired by Linux code.
32     */
33    
34     #include <stdio.h>
35     #include <stdlib.h>
36     #include <string.h>
37    
38     #include "console.h"
39     #include "cpu.h"
40     #include "devices.h"
41     #include "machine.h"
42     #include "memory.h"
43     #include "misc.h"
44    
45    
46     /* Let's hope nothing is there already... */
47     #define FAKE_GBE_FB_ADDRESS 0x38000000
48    
49     #define GBE_DEBUG
50 dpavlin 12 /* #define debug fatal */
51 dpavlin 4
52 dpavlin 14 #define MTE_TEST
53 dpavlin 12
54 dpavlin 4 #define GBE_DEFAULT_XRES 640
55     #define GBE_DEFAULT_YRES 480
56    
57    
58     struct sgi_gbe_data {
59     int xres, yres;
60    
61     uint32_t control; /* 0x00000 */
62     uint32_t dotclock; /* 0x00004 */
63     uint32_t i2c; /* 0x00008 */
64     uint32_t i2cfp; /* 0x00010 */
65     uint32_t plane0ctrl; /* 0x30000 */
66     uint32_t frm_control; /* 0x3000c */
67     int freeze;
68    
69     int bitdepth;
70     struct vfb_data *fb_data;
71     };
72    
73    
74     /*
75     * dev_sgi_gbe_tick():
76     *
77     * Every now and then, copy data from the framebuffer in normal ram
78     * to the actual framebuffer (which will then redraw the window).
79     * TODO: This is utterly slow, even slower than the normal framebuffer
80     * which is really slow as it is.
81     *
82     * frm_control (bits 31..9) is a pointer to an array of uint16_t.
83     * These numbers (when << 16 bits) are pointers to the tiles. Tiles are
84     * 512x128 in 8-bit mode, 256x128 in 16-bit mode, and 128x128 in 32-bit mode.
85     */
86     void dev_sgi_gbe_tick(struct cpu *cpu, void *extra)
87     {
88     struct sgi_gbe_data *d = extra;
89     int tile_nr = 0, on_screen = 1, xbase = 0, ybase = 0;
90     unsigned char tileptr_buf[sizeof(uint16_t)];
91     uint64_t tileptr, tiletable;
92     int lines_to_copy, pixels_per_line, y;
93 dpavlin 12 unsigned char buf[16384]; /* must be power of 2, at most 65536 */
94 dpavlin 4 int copy_len, copy_offset;
95     uint64_t old_fb_offset = 0;
96     int tweaked = 1;
97    
98 dpavlin 12 #ifdef MTE_TEST
99 dpavlin 24 /* Actually just a return, but this fools the Compaq compiler... */
100     if (cpu != NULL)
101 dpavlin 12 return;
102     #endif
103    
104 dpavlin 4 /* debug("[ sgi_gbe: dev_sgi_gbe_tick() ]\n"); */
105    
106     tiletable = (d->frm_control & 0xfffffe00);
107     if (tiletable == 0)
108     on_screen = 0;
109 dpavlin 12 /*
110     tweaked = 0;
111     */
112 dpavlin 4 while (on_screen) {
113     /* Get pointer to a tile: */
114     cpu->memory_rw(cpu, cpu->mem, tiletable +
115     sizeof(tileptr_buf) * tile_nr,
116     tileptr_buf, sizeof(tileptr_buf), MEM_READ,
117     NO_EXCEPTIONS | PHYSICAL);
118     tileptr = 256 * tileptr_buf[0] + tileptr_buf[1];
119     /* TODO: endianness */
120     tileptr <<= 16;
121    
122     /* tileptr is now a physical address of a tile. */
123     debug("[ sgi_gbe: tile_nr = %2i, tileptr = 0x%08lx, xbase"
124     " = %4i, ybase = %4i ]\n", tile_nr, tileptr, xbase, ybase);
125    
126     if (tweaked) {
127     /* Tweaked (linear) mode: */
128    
129 dpavlin 22 /*
130     * Copy data from this 64KB physical RAM block to the
131     * framebuffer:
132     *
133     * NOTE: Copy it in smaller chunks than 64KB, in case
134     * the framebuffer device can optimize away
135     * portions that aren't modified that way.
136     */
137 dpavlin 4 copy_len = sizeof(buf);
138     copy_offset = 0;
139    
140     while (on_screen && copy_offset < 65536) {
141 dpavlin 22 if (old_fb_offset + copy_len > (uint64_t)
142     (d->xres * d->yres * d->bitdepth / 8)) {
143     copy_len = d->xres * d->yres *
144     d->bitdepth / 8 - old_fb_offset;
145 dpavlin 4 /* Stop after copying this block... */
146     on_screen = 0;
147     }
148    
149     /* debug("old_fb_offset = %08x copylen"
150     "=%i\n", old_fb_offset, copy_len); */
151    
152     cpu->memory_rw(cpu, cpu->mem, tileptr +
153     copy_offset, buf, copy_len, MEM_READ,
154     NO_EXCEPTIONS | PHYSICAL);
155     dev_fb_access(cpu, cpu->mem, old_fb_offset,
156     buf, copy_len, MEM_WRITE, d->fb_data);
157     copy_offset += sizeof(buf);
158     old_fb_offset += sizeof(buf);
159     }
160     } else {
161 dpavlin 22 /* This is for non-tweaked (tiled) mode. Not really
162     tested with correct image data, but might work: */
163 dpavlin 4
164     lines_to_copy = 128;
165     if (ybase + lines_to_copy > d->yres)
166     lines_to_copy = d->yres - ybase;
167    
168     pixels_per_line = 512 * 8 / d->bitdepth;
169     if (xbase + pixels_per_line > d->xres)
170     pixels_per_line = d->xres - xbase;
171    
172     for (y=0; y<lines_to_copy; y++) {
173     cpu->memory_rw(cpu, cpu->mem, tileptr + 512 * y,
174     buf, pixels_per_line * d->bitdepth / 8,
175     MEM_READ, NO_EXCEPTIONS | PHYSICAL);
176 dpavlin 12 #if 0
177     {
178     int i;
179     for (i=0; i<pixels_per_line * d->bitdepth / 8; i++)
180     buf[i] ^= (random() & 0x20);
181     }
182     #endif
183 dpavlin 4 dev_fb_access(cpu, cpu->mem, ((ybase + y) *
184     d->xres + xbase) * d->bitdepth / 8,
185     buf, pixels_per_line * d->bitdepth / 8,
186     MEM_WRITE, d->fb_data);
187     }
188    
189     /* Go to next tile: */
190     xbase += (512 * 8 / d->bitdepth);
191     if (xbase >= d->xres) {
192     xbase = 0;
193     ybase += 128;
194     if (ybase >= d->yres)
195     on_screen = 0;
196     }
197     }
198    
199     /* Go to next tile: */
200     tile_nr ++;
201     }
202    
203     /* debug("[ sgi_gbe: dev_sgi_gbe_tick() end]\n"); */
204     }
205    
206    
207     /*
208     * dev_sgi_gbe_access():
209     */
210 dpavlin 22 DEVICE_ACCESS(sgi_gbe)
211 dpavlin 4 {
212     struct sgi_gbe_data *d = extra;
213     uint64_t idata = 0, odata = 0;
214    
215 dpavlin 18 if (writeflag == MEM_WRITE)
216     idata = memory_readmax64(cpu, data, len);
217 dpavlin 4
218     #ifdef GBE_DEBUG
219     if (writeflag == MEM_WRITE)
220 dpavlin 22 debug("[ sgi_gbe: DEBUG: write to address 0x%llx, data"
221     "=0x%llx ]\n", (long long)relative_addr, (long long)idata);
222 dpavlin 4 #endif
223    
224     switch (relative_addr) {
225    
226     case 0x0:
227     if (writeflag == MEM_WRITE)
228     d->control = idata;
229     else
230     odata = d->control;
231     break;
232    
233     case 0x4:
234     if (writeflag == MEM_WRITE)
235     d->dotclock = idata;
236     else
237     odata = d->dotclock;
238     break;
239    
240     case 0x8: /* i2c? */
241     /*
242     * "CRT I2C control".
243     *
244     * I'm not sure what this does. It isn't really commented
245     * in the linux sources. The IP32 prom writes the values
246     * 0x03, 0x01, and then 0x00 to this address, and then
247     * reads back a value.
248     */
249     if (writeflag == MEM_WRITE) {
250     d->i2c = idata;
251     } else {
252     odata = d->i2c;
253     odata |= 1; /* ? The IP32 prom wants this? */
254     }
255     break;
256    
257     case 0x10: /* i2cfp, flat panel control */
258     if (writeflag == MEM_WRITE) {
259     d->i2cfp = idata;
260     } else {
261     odata = d->i2cfp;
262     odata |= 1; /* ? The IP32 prom wants this? */
263     }
264     break;
265    
266     case 0x10000: /* vt_xy, according to Linux */
267     if (writeflag == MEM_WRITE)
268     d->freeze = idata & ((uint32_t)1<<31)? 1 : 0;
269     else {
270     /* bit 31 = freeze, 23..12 = cury, 11.0 = curx */
271     odata = ((random() % (d->yres + 10)) << 12)
272 dpavlin 22 + (random() % (d->xres + 10)) +
273     (d->freeze? ((uint32_t)1 << 31) : 0);
274 dpavlin 4 odata = random(); /* testhack for the ip32 prom */
275     }
276     break;
277    
278     case 0x10004: /* vt_xymax, according to Linux */
279 dpavlin 22 odata = ((d->yres-1) << 12) + d->xres-1;
280     /* ... 12 bits maxy, 12 bits maxx. */
281 dpavlin 4 break;
282    
283     case 0x10034: /* vt_hpixen, according to Linux */
284 dpavlin 22 odata = (0 << 12) + d->xres-1;
285     /* ... 12 bits on, 12 bits off. */
286 dpavlin 4 break;
287    
288     case 0x10038: /* vt_vpixen, according to Linux */
289 dpavlin 22 odata = (0 << 12) + d->yres-1;
290     /* ... 12 bits on, 12 bits off. */
291 dpavlin 4 break;
292    
293     case 0x20004:
294     odata = random(); /* IP32 prom test hack. TODO */
295     /* IRIX wants 0x20, it seems. */
296     if (random() & 1)
297     odata = 0x20;
298     break;
299    
300     case 0x30000: /* normal plane ctrl 0 */
301 dpavlin 22 /* bit 15 = fifo reset, 14..13 = depth,
302     12..5 = tile width, 4..0 = rhs */
303 dpavlin 4 if (writeflag == MEM_WRITE) {
304     d->plane0ctrl = idata;
305     d->bitdepth = 8 << ((d->plane0ctrl >> 13) & 3);
306 dpavlin 22 debug("[ sgi_gbe: setting color depth to %i bits ]\n",
307     d->bitdepth);
308 dpavlin 4 if (d->bitdepth != 8)
309 dpavlin 22 fatal("sgi_gbe: warning: bitdepth %i not "
310     "really implemented yet\n", d->bitdepth);
311 dpavlin 4 } else
312     odata = d->plane0ctrl;
313     break;
314    
315     case 0x30008: /* normal plane ctrl 2 */
316     odata = random(); /* IP32 prom test hack. TODO */
317     /* IRIX wants 0x20, it seems. */
318     if (random() & 1)
319     odata = 0x20;
320     break;
321    
322     case 0x3000c: /* normal plane ctrl 3 */
323 dpavlin 22 /*
324     * Writes to 3000c should be readable back at 30008?
325     * At least bit 0 (dma) ctrl 3.
326     *
327     * Bits 31..9 = tile table pointer bits,
328     * Bit 1 = linear
329     * Bit 0 = dma
330     */
331 dpavlin 4 if (writeflag == MEM_WRITE) {
332     d->frm_control = idata;
333 dpavlin 22 debug("[ sgi_gbe: frm_control = 0x%08x ]\n",
334     d->frm_control);
335 dpavlin 4 } else
336     odata = d->frm_control;
337     break;
338    
339     case 0x40000:
340     odata = random(); /* IP32 prom test hack. TODO */
341     /* IRIX wants 0x20, it seems. */
342     if (random() & 1)
343     odata = 0x20;
344     break;
345    
346     /*
347 dpavlin 22 * Linux/sgimips seems to write color palette data to offset 0x50000
348     * to 0x503xx, and gamma correction data to 0x60000 - 0x603ff, as
349     * 32-bit values at addresses divisible by 4 (formated as 0xrrggbb00).
350 dpavlin 4 *
351     * sgio2fb: initializing
352     * sgio2fb: I/O at 0xffffffffb6000000
353     * sgio2fb: tiles at ffffffffa2ef5000
354     * sgio2fb: framebuffer at ffffffffa1000000
355     * sgio2fb: 8192kB memory
356     * Console: switching to colour frame buffer device 80x30
357     */
358    
359     default:
360     /* Gamma correction: */
361     if (relative_addr >= 0x60000 && relative_addr <= 0x603ff) {
362     /* ignore gamma correction for now */
363     break;
364     }
365    
366     /* RGB Palette: */
367     if (relative_addr >= 0x50000 && relative_addr <= 0x503ff) {
368     int color_nr, r, g, b;
369     int old_r, old_g, old_b;
370    
371     color_nr = (relative_addr & 0x3ff) / 4;
372     r = (idata >> 24) & 0xff;
373     g = (idata >> 16) & 0xff;
374     b = (idata >> 8) & 0xff;
375    
376     old_r = d->fb_data->rgb_palette[color_nr * 3 + 0];
377     old_g = d->fb_data->rgb_palette[color_nr * 3 + 1];
378     old_b = d->fb_data->rgb_palette[color_nr * 3 + 2];
379    
380     d->fb_data->rgb_palette[color_nr * 3 + 0] = r;
381     d->fb_data->rgb_palette[color_nr * 3 + 1] = g;
382     d->fb_data->rgb_palette[color_nr * 3 + 2] = b;
383    
384     if (r != old_r || g != old_g || b != old_b) {
385 dpavlin 22 /* If the palette has been changed, the entire
386     image needs to be redrawn... :-/ */
387 dpavlin 4 d->fb_data->update_x1 = 0;
388     d->fb_data->update_x2 = d->fb_data->xsize - 1;
389     d->fb_data->update_y1 = 0;
390     d->fb_data->update_y2 = d->fb_data->ysize - 1;
391     }
392     break;
393     }
394    
395     if (writeflag == MEM_WRITE)
396 dpavlin 22 debug("[ sgi_gbe: unimplemented write to address "
397     "0x%llx, data=0x%llx ]\n",
398     (long long)relative_addr, (long long)idata);
399 dpavlin 4 else
400 dpavlin 22 debug("[ sgi_gbe: unimplemented read from address "
401     "0x%llx ]\n", (long long)relative_addr);
402 dpavlin 4 }
403    
404     if (writeflag == MEM_READ) {
405     #ifdef GBE_DEBUG
406 dpavlin 22 debug("[ sgi_gbe: DEBUG: read from address 0x%llx: 0x%llx ]\n",
407     (long long)relative_addr, (long long)odata);
408 dpavlin 4 #endif
409     memory_writemax64(cpu, data, len, odata);
410     }
411    
412     return 1;
413     }
414    
415    
416     /*
417     * dev_sgi_gbe_init():
418     */
419     void dev_sgi_gbe_init(struct machine *machine, struct memory *mem,
420     uint64_t baseaddr)
421     {
422     struct sgi_gbe_data *d;
423    
424     d = malloc(sizeof(struct sgi_gbe_data));
425     if (d == NULL) {
426     fprintf(stderr, "out of memory\n");
427     exit(1);
428     }
429     memset(d, 0, sizeof(struct sgi_gbe_data));
430 dpavlin 14
431     /* 640x480 for Linux: */
432 dpavlin 4 d->xres = GBE_DEFAULT_XRES;
433     d->yres = GBE_DEFAULT_YRES;
434     d->bitdepth = 8;
435     d->control = 0x20aa000; /* or 0x00000001? */
436 dpavlin 14
437     /* 1280x1024 for booting the O2's PROM: */
438     d->xres = 1280; d->yres = 1024;
439    
440 dpavlin 4 d->fb_data = dev_fb_init(machine, mem, FAKE_GBE_FB_ADDRESS,
441 dpavlin 12 VFB_GENERIC, d->xres, d->yres, d->xres, d->yres, 8, "SGI GBE");
442 dpavlin 4 set_grayscale_palette(d->fb_data, 256);
443    
444     memory_device_register(mem, "sgi_gbe", baseaddr, DEV_SGI_GBE_LENGTH,
445 dpavlin 20 dev_sgi_gbe_access, d, DM_DEFAULT, NULL);
446 dpavlin 24 machine_add_tickfunction(machine, dev_sgi_gbe_tick, d, 18, 0.0);
447 dpavlin 4 }
448    
  ViewVC Help
Powered by ViewVC 1.1.26