--- trunk/src/devices/dev_scc.c 2007/10/08 16:20:58 32 +++ trunk/src/devices/dev_scc.c 2007/10/08 16:21:17 34 @@ -1,5 +1,5 @@ /* - * Copyright (C) 2003-2006 Anders Gavare. All rights reserved. + * Copyright (C) 2003-2007 Anders Gavare. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -25,7 +25,7 @@ * SUCH DAMAGE. * * - * $Id: dev_scc.c,v 1.35 2006/08/30 16:10:02 debug Exp $ + * $Id: dev_scc.c,v 1.37 2007/01/28 14:15:30 debug Exp $ * * Serial controller on some DECsystems and SGI machines. (Z8530 ?) * Most of the code in here is written for DECsystem emulation, though. @@ -184,8 +184,11 @@ if (d->scc_register_r[i * N_SCC_REGS + SCC_RR3] & SCC_RR3_TX_IP_A || d->scc_register_r[i * N_SCC_REGS + SCC_RR3] - & SCC_RR3_TX_IP_B) - cpu_interrupt(cpu, d->irq_nr); + & SCC_RR3_TX_IP_B) { +fatal("TODO: legacy rewrite!\n"); +abort(); +// cpu_interrupt(cpu, d->irq_nr); + } } /* RX interrupts? */ @@ -204,8 +207,11 @@ if (d->scc_register_r[i * N_SCC_REGS + SCC_RR3] & SCC_RR3_RX_IP_A || d->scc_register_r[i * N_SCC_REGS + SCC_RR3] - & SCC_RR3_RX_IP_B) - cpu_interrupt(cpu, d->irq_nr); + & SCC_RR3_RX_IP_B) { +fatal("TODO: legacy rewrite!\n"); +abort(); +// cpu_interrupt(cpu, d->irq_nr); + } } if (d->scc_register_w[N_SCC_REGS + SCC_WR1] & @@ -227,9 +233,11 @@ d->scc_register_r[i * N_SCC_REGS + SCC_RR3] & SCC_RR3_EXT_IP_B) { - cpu_interrupt(cpu, d->irq_nr); +fatal("TODO: legacy rewrite!\n"); +abort(); +// cpu_interrupt(cpu, d->irq_nr); /* TODO: huh? */ -cpu_interrupt(cpu, 8 + 0x02000000); +//cpu_interrupt(cpu, 8 + 0x02000000); } } } @@ -346,7 +354,10 @@ d->scc_register_r[port * N_SCC_REGS + SCC_RR3] = 0; - cpu_interrupt_ack(cpu, d->irq_nr); + +fatal("TODO: legacy rewrite!\n"); +abort(); +// cpu_interrupt_ack(cpu, d->irq_nr); } #ifdef SCC_DEBUG @@ -393,7 +404,10 @@ /* TODO: perhaps only clear the RX part of RR3? */ d->scc_register_r[N_SCC_REGS + SCC_RR3] = 0; - cpu_interrupt_ack(cpu, d->irq_nr); + +fatal("TODO: legacy rewrite!\n"); +abort(); +// cpu_interrupt_ack(cpu, d->irq_nr); debug("[ scc: (port %i) read from 0x%08lx: 0x%02x ]\n", port, (long)relative_addr, (int)odata);