/[gxemul]/trunk/src/devices/dev_ram.c
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Contents of /trunk/src/devices/dev_ram.c

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Revision 18 - (show annotations)
Mon Oct 8 16:19:11 2007 UTC (16 years, 5 months ago) by dpavlin
File MIME type: text/plain
File size: 5570 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1004 2005/10/27 14:01:10 debug Exp $
20051011        Passing -A as the default boot arg for CATS (works fine with
                OpenBSD/cats).
20051012	Fixing the VGA cursor offset bug, and speeding up framebuffer
		redraws if character cells contain the same thing as during
		the last redraw.
20051013	Adding a slow strd ARM instruction hack.
20051017	Minor updates: Adding a dummy i80321 Verde controller (for
		XScale emulation), fixing the disassembly of the ARM "ldrd"
		instruction, adding "support" for less-than-4KB pages for ARM
		(by not adding them to translation tables).
20051020	Continuing on some HPCarm stuff. A NetBSD/hpcarm kernel prints
		some boot messages on an emulated Jornada 720.
		Making dev_ram work better with dyntrans (speeds up some things
		quite a bit).
20051021	Automatically generating some of the most common ARM load/store
		multiple instructions.
20051022	Better statistics gathering for the ARM load/store multiple.
		Various other dyntrans and device updates.
20051023	Various minor updates.
20051024	Continuing; minor device and dyntrans fine-tuning. Adding the
		first "reasonable" instruction combination hacks for ARM (the
		cores of NetBSD/cats' memset and memcpy).
20051025	Fixing a dyntrans-related bug in dev_vga. Also changing the
		dyntrans low/high access notification to only be updated on
		writes, not reads. Hopefully it will be enough. (dev_vga in
		charcell mode now seems to work correctly with both reads and
		writes.)
		Experimenting with gathering dyntrans statistics (which parts
		of emulated RAM that are actually executed), and adding
		instruction combination hacks for cache cleaning and a part of
		NetBSD's scanc() function.
20051026	Adding a bitmap for ARM emulation which indicates if a page is
		(specifically) user accessible; loads and stores with the t-
		flag set can now use the translation arrays, which results in
		a measurable speedup.
20051027	Dyntrans updates; adding an extra bitmap array for 32-bit
		emulation modes, speeding up the check whether a physical page
		has any code translations or not (O(n) -> O(1)). Doing a
		similar reduction of O(n) to O(1) by avoiding the scan through
		the translation entries on a translation update (32-bit mode
		only).
		Various other minor hacks.
20051029	Quick release, without any testing at all.

==============  RELEASE 0.3.6.2  ==============


1 /*
2 * Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_ram.c,v 1.19 2005/10/25 15:51:04 debug Exp $
29 *
30 * A generic RAM (memory) device. Can also be used to mirror/alias another
31 * part of RAM.
32 */
33
34 #include <stdio.h>
35 #include <stdlib.h>
36 #include <string.h>
37 #include <sys/types.h>
38 #include <sys/mman.h>
39
40 #include "cpu.h"
41 #include "devices.h"
42 #include "machine.h"
43 #include "memory.h"
44 #include "misc.h"
45
46
47 /* #define RAM_DEBUG */
48
49 struct ram_data {
50 int mode;
51 uint64_t otheraddress;
52
53 /* If mode = DEV_RAM_MIRROR: */
54 uint64_t offset;
55
56 /* If mode = DEV_RAM_RAM: */
57 unsigned char *data;
58 uint64_t length;
59 };
60
61
62 /*
63 * dev_ram_access():
64 */
65 int dev_ram_access(struct cpu *cpu, struct memory *mem,
66 uint64_t relative_addr, unsigned char *data, size_t len,
67 int writeflag, void *extra)
68 {
69 struct ram_data *d = extra;
70
71 #ifdef RAM_DEBUG
72 if (writeflag==MEM_READ) {
73 debug("[ ram: read from 0x%x, len=%i ]\n",
74 (int)relative_addr, (int)len);
75 } else {
76 int i;
77 debug("[ ram: write to 0x%x:", (int)relative_addr);
78 for (i=0; i<len; i++)
79 debug(" %02x", data[i]);
80 debug(" (len=%i) ]\n", len);
81 }
82 #endif
83
84 switch (d->mode) {
85 case DEV_RAM_MIRROR:
86 /* TODO: how about caches? */
87 return cpu->memory_rw(cpu, mem,
88 d->otheraddress + relative_addr, data, len,
89 writeflag, PHYSICAL);
90 case DEV_RAM_RAM:
91 if (writeflag == MEM_WRITE)
92 memcpy(&d->data[relative_addr], data, len);
93 else
94 memcpy(data, &d->data[relative_addr], len);
95 break;
96 default:
97 fatal("dev_ram_access(): unknown mode %i\n", d->mode);
98 exit(1);
99 }
100
101 return 1;
102 }
103
104
105 /*
106 * dev_ram_init():
107 *
108 * Initializes a RAM or mirror device. Things get a bit complicated because
109 * of dyntrans (i.e. mirrored memory ranges should be entered into the
110 * translation arrays just as normal memory and other devices are).
111 */
112 void dev_ram_init(struct machine *machine, uint64_t baseaddr, uint64_t length,
113 int mode, uint64_t otheraddress)
114 {
115 struct ram_data *d;
116 int flags = MEM_DEFAULT, points_to_ram = 1;
117
118 d = malloc(sizeof(struct ram_data));
119 if (d == NULL) {
120 fprintf(stderr, "out of memory\n");
121 exit(1);
122 }
123
124 memset(d, 0, sizeof(struct ram_data));
125
126 if (mode & DEV_RAM_MIGHT_POINT_TO_DEVICES) {
127 mode &= ~DEV_RAM_MIGHT_POINT_TO_DEVICES;
128 points_to_ram = 0;
129 }
130
131 d->mode = mode;
132 d->otheraddress = otheraddress;
133
134 switch (d->mode) {
135
136 case DEV_RAM_MIRROR:
137 /*
138 * Calculate the amount that the mirror memory is offset from
139 * the real (physical) memory. This is used in src/memory_rw.c
140 * with dyntrans accesses if MEM_EMULATED_RAM is set.
141 */
142 d->offset = baseaddr - otheraddress;
143
144 /* Aligned RAM? Then it works with dyntrans. */
145 if (points_to_ram &&
146 (baseaddr & (machine->arch_pagesize-1)) == 0 &&
147 (otheraddress & (machine->arch_pagesize - 1)) == 0 &&
148 (length & (machine->arch_pagesize - 1)) == 0)
149 flags |= MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK
150 | MEM_EMULATED_RAM;
151
152 memory_device_register(machine->memory, "ram [mirror]",
153 baseaddr, length, dev_ram_access, d, flags
154 | MEM_READING_HAS_NO_SIDE_EFFECTS, (void *) &d->offset);
155 break;
156
157 case DEV_RAM_RAM:
158 /*
159 * Allocate zero-filled RAM using mmap(). If mmap() failed,
160 * try malloc(), but then we also have to memset(), which
161 * can be slow for large chunks of memory.
162 */
163 d->length = length;
164 d->data = (unsigned char *) mmap(NULL, length,
165 PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
166 if (d->data == NULL) {
167 d->data = malloc(length);
168 if (d->data == NULL) {
169 fprintf(stderr, "out of memory\n");
170 exit(1);
171 }
172 memset(d->data, 0, length);
173 }
174
175 /* Aligned memory? Then it works with dyntrans. */
176 if ((baseaddr & (machine->arch_pagesize - 1)) == 0 &&
177 (length & (machine->arch_pagesize - 1)) == 0)
178 flags |= MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK;
179
180 memory_device_register(machine->memory, "ram", baseaddr,
181 d->length, dev_ram_access, d, flags
182 | MEM_READING_HAS_NO_SIDE_EFFECTS, d->data);
183 break;
184
185 default:
186 fatal("dev_ram_access(): unknown mode %i\n", d->mode);
187 exit(1);
188 }
189 }
190

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