/[gxemul]/trunk/src/devices/dev_px.c
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Contents of /trunk/src/devices/dev_px.c

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Revision 42 - (show annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 22728 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============


1 /*
2 * Copyright (C) 2004-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_px.c,v 1.38 2007/06/15 19:57:33 debug Exp $
29 *
30 * COMMENT: TURBOchannel Pixelstamp graphics card
31 *
32 * PMAG-CA = PX
33 * PMAG-DA = PXG
34 * PMAG-EA = PXG+
35 * PMAG-FA = PXG+ TURBO
36 *
37 * See include/pxreg.h (and NetBSD's arch/pmax/dev/px.c) for more information.
38 *
39 * The emulation of this device is far from complete. Different pixelstamp
40 * boards are recognizes under different names depending on operating system:
41 *
42 * NetBSD/pmax: (works fine both with and without console on framebuffer)
43 * PMAG-CA: px0 at tc0 slot 0 offset 0x0: 2D, 4x1 stamp,
44 * 8 plane
45 * PMAG-DA: px0 at tc0 slot 0 offset 0x0: 3D, 4x1 stamp,
46 * 8 plane, 128KB SRAM
47 * PMAG-EA: (not supported)
48 * PMAG-FA: px0 at tc0 slot 0 offset 0x0: 3D, 5x2 stamp,
49 * 24 plane, 128KB SRAM
50 *
51 * Ultrix 4.2A rev 47: (usually crashes if the device is installed, but
52 * serial console is used)
53 * PMAG-CA: px0 at ibus0, pa0 (5x1 8+8+0+0)
54 * PMAG-DA: px0 at ibus0, pq0 (5x1 16+16+16+0 128KB)
55 * or (5x1 0+0+16+0 128KB)
56 * PMAG-EA: (not supported)
57 * PMAG-FA: px0 at ibus0, pq0 (5x2 24+24+16+16 128KB)
58 *
59 * Ultrix 4.2 rev 85: (usually crashes if the device is installed,
60 * but serial console is used)
61 * PMAG-CA: ga0 at ibus0, ga0 ( 8 planes 4x1 stamp )
62 * PMAG-DA: gq0 at ibus0, gq0 ( 8+8+16Z+0X plane 4x1 stamp )
63 * PMAG-EA: (not supported)
64 * PMAG-FA: gq0 at ibus0, gq0 ( 24+24+24Z+24X plane
65 * 5x2 stamp ) (crashes in serial console mode)
66 *
67 * TODO: A lot of stuff:
68 *
69 * Read http://www.mit.edu/afs/athena/system/pmax_ul3/srvd.73/sys/
70 * io/tc/gq.h
71 * and try to figure out the interrupt and memory management stuff.
72 *
73 * Color support: foreground, background, 8-bit palette?
74 * 2D and 3D stuff: polygons? shading?
75 * Don't use so many hardcoded values.
76 * Actually interpret the values in each command, don't just
77 * assume NetBSD/Ultrix usage.
78 * Factor out the DMA read (main memory vs sram).
79 * Interrupts?
80 * Make sure that everything works with both NetBSD and Ultrix.
81 */
82
83 #include <stdio.h>
84 #include <stdlib.h>
85 #include <string.h>
86
87 #include "cpu.h"
88 #include "devices.h"
89 #include "machine.h"
90 #include "memory.h"
91 #include "misc.h"
92
93 #include "pxreg.h"
94
95 #define PX_XSIZE 1280
96 #define PX_YSIZE 1024
97
98 /* #define PX_DEBUG */
99
100
101 DEVICE_TICK(px)
102 {
103 #if 0
104 struct px_data *d = extra;
105
106 if (d->intr & STIC_INT_P_EN) /* or _WE ? */
107 INTERRUPT_ASSERT(d->irq);
108 #endif
109 }
110
111
112 /*
113 * px_readword():
114 *
115 * Helper function to read 32-bit words from DMA memory,
116 * to allow both little and big endian accesses.
117 * (DECstations probably only use little endian access,
118 * but endianness-independance is probably nice to have anyway.)
119 */
120 uint32_t px_readword(struct cpu *cpu, unsigned char *dma_buf, int ofs)
121 {
122 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
123 return dma_buf[ofs+0] + (dma_buf[ofs+1] << 8) +
124 (dma_buf[ofs+2] << 16) + (dma_buf[ofs+3] << 24);
125 else
126 return dma_buf[ofs+3] + (dma_buf[ofs+2] << 8) +
127 (dma_buf[ofs+1] << 16) + (dma_buf[ofs+0] << 24);
128 }
129
130
131 /*
132 * dev_px_dma():
133 *
134 * This routine performs a (fake) DMA transfer of STAMP commands
135 * and executes them.
136 *
137 * For the "PX" board, read from main memory (cpu->mem). For all other
138 * boards, read from the i860 SRAM portion of the device (d->sram).
139 */
140 void dev_px_dma(struct cpu *cpu, uint32_t sys_addr, struct px_data *d)
141 {
142 unsigned char dma_buf[32768];
143 size_t dma_len = sizeof(dma_buf);
144 int bytesperpixel;
145 uint32_t cmdword;
146
147 bytesperpixel = d->bitdepth >> 3;
148
149 dma_len = 56 * 4; /* TODO: this is just enough for NetBSD's
150 putchar */
151
152 if (d->type == DEV_PX_TYPE_PX) {
153 cpu->memory_rw(cpu, cpu->mem, sys_addr, dma_buf,
154 dma_len, MEM_READ, NO_EXCEPTIONS | PHYSICAL);
155 } else {
156 /* TODO: past end of sram? */
157 memmove(dma_buf, &d->sram[sys_addr & 0x1ffff], dma_len);
158 }
159
160 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
161 cmdword = dma_buf[0] + (dma_buf[1] << 8) +
162 (dma_buf[2] << 16) + (dma_buf[3] << 24);
163 else
164 cmdword = dma_buf[3] + (dma_buf[2] << 8) +
165 (dma_buf[1] << 16) + (dma_buf[0] << 24);
166
167 #ifdef PX_DEBUG
168 debug("[ px: dma from 0x%08x: ", (int)sys_addr);
169
170 debug("cmd=");
171 switch (cmdword & 0xf) {
172 case STAMP_CMD_POINTS: debug("points"); break;
173 case STAMP_CMD_LINES: debug("lines"); break;
174 case STAMP_CMD_TRIANGLES: debug("triangles"); break;
175 case STAMP_CMD_COPYSPANS: debug("copyspans"); break;
176 case STAMP_CMD_READSPANS: debug("readspans"); break;
177 case STAMP_CMD_WRITESPANS: debug("writespans"); break;
178 case STAMP_CMD_VIDEO: debug("video"); break;
179 default:
180 debug("0x%x (?)", cmdword & 0xf);
181 }
182
183 debug(",rgb=");
184 switch (cmdword & 0x30) {
185 case STAMP_RGB_NONE: debug("none"); break;
186 case STAMP_RGB_CONST: debug("const"); break;
187 case STAMP_RGB_FLAT: debug("flat"); break;
188 case STAMP_RGB_SMOOTH: debug("smooth"); break;
189 default:
190 debug("0x%x (?)", cmdword & 0x30);
191 }
192
193 debug(",z=");
194 switch (cmdword & 0xc0) {
195 case STAMP_Z_NONE: debug("none"); break;
196 case STAMP_Z_CONST: debug("const"); break;
197 case STAMP_Z_FLAT: debug("flat"); break;
198 case STAMP_Z_SMOOTH: debug("smooth"); break;
199 default:
200 debug("0x%x (?)", cmdword & 0xc0);
201 }
202
203 debug(",xy=");
204 switch (cmdword & 0x300) {
205 case STAMP_XY_NONE: debug("none"); break;
206 case STAMP_XY_PERPACKET: debug("perpacket"); break;
207 case STAMP_XY_PERPRIMATIVE: debug("perprimative"); break;
208 default:
209 debug("0x%x (?)", cmdword & 0x300);
210 }
211
212 debug(",lw=");
213 switch (cmdword & 0xc00) {
214 case STAMP_LW_NONE: debug("none"); break;
215 case STAMP_LW_PERPACKET: debug("perpacket"); break;
216 case STAMP_LW_PERPRIMATIVE: debug("perprimative"); break;
217 default:
218 debug("0x%x (?)", cmdword & 0xc00);
219 }
220
221 if (cmdword & STAMP_CLIPRECT)
222 debug(",CLIPRECT");
223 if (cmdword & STAMP_MESH)
224 debug(",MESH");
225 if (cmdword & STAMP_AALINE)
226 debug(",AALINE");
227 if (cmdword & STAMP_HS_EQUALS)
228 debug(",HS_EQUALS");
229
230 {
231 size_t i;
232 for (i=0; i<dma_len; i++)
233 debug(" %02x", dma_buf[i]);
234 }
235
236 debug(" ]\n");
237 #endif /* PX_DEBUG */
238
239 /* NetBSD and Ultrix copyspans */
240 if (cmdword == 0x405) {
241 uint32_t nspans, lw;
242 uint32_t spannr, ofs;
243 uint32_t span_len, span_src, span_dst;
244 /* unsigned char pixels[PX_XSIZE * 3]; */
245
246 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
247 nspans = dma_buf[4] + (dma_buf[5] << 8) +
248 (dma_buf[6] << 16) + (dma_buf[7] << 24);
249 else
250 nspans = dma_buf[7] + (dma_buf[6] << 8) +
251 (dma_buf[5] << 16) + (dma_buf[4] << 24);
252
253 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
254 lw = dma_buf[16] + (dma_buf[17] << 8) +
255 (dma_buf[18] << 16) + (dma_buf[19] << 24);
256 else
257 lw = dma_buf[19] + (dma_buf[18] << 8) +
258 (dma_buf[17] << 16) + (dma_buf[16] << 24);
259
260 nspans >>= 24;
261 /* Why not this? lw = (lw + 1) >> 2; */
262
263 #ifdef PX_DEBUG
264 debug("[ px: copyspans: nspans = %i, lw = %i ]\n", nspans, lw);
265 #endif
266
267 /* Reread copyspans command if it wasn't completely read: */
268 if (dma_len < 4*(5 + nspans*3)) {
269 dma_len = 4 * (5+nspans*3);
270 if (d->type == DEV_PX_TYPE_PX)
271 cpu->memory_rw(cpu, cpu->mem, sys_addr,
272 dma_buf, dma_len, MEM_READ,
273 NO_EXCEPTIONS | PHYSICAL);
274 else
275 memmove(dma_buf, &d->sram[sys_addr & 0x1ffff],
276 dma_len); /* TODO: past end of sram? */
277 }
278
279 ofs = 4*5;
280 for (spannr=0; spannr<nspans; spannr++) {
281 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
282 span_len = dma_buf[ofs+0] + (dma_buf[ofs+1] <<
283 8) + (dma_buf[ofs+2] << 16) +
284 (dma_buf[ofs+3] << 24);
285 else
286 span_len = dma_buf[ofs+3] + (dma_buf[ofs+2] <<
287 8) + (dma_buf[ofs+1] << 16) +
288 (dma_buf[ofs+0] << 24);
289 ofs += 4;
290
291 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
292 span_src = dma_buf[ofs+0] + (dma_buf[ofs+1] <<
293 8) + (dma_buf[ofs+2] << 16) +
294 (dma_buf[ofs+3] << 24);
295 else
296 span_src = dma_buf[ofs+3] + (dma_buf[ofs+2] <<
297 8) + (dma_buf[ofs+1] << 16) +
298 (dma_buf[ofs+0] << 24);
299 ofs += 4;
300
301 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
302 span_dst = dma_buf[ofs+0] + (dma_buf[ofs+1] <<
303 8) + (dma_buf[ofs+2] << 16) +
304 (dma_buf[ofs+3] << 24);
305 else
306 span_dst = dma_buf[ofs+3] + (dma_buf[ofs+2] <<
307 8) + (dma_buf[ofs+1] << 16) +
308 (dma_buf[ofs+0] << 24);
309 ofs += 4;
310
311 span_len >>= 3;
312 span_dst >>= 3;
313 span_src >>= 3;
314
315 if (span_len > PX_XSIZE)
316 span_len = PX_XSIZE;
317
318 /* debug(" span %i: len=%i src=%i dst=%i\n",
319 spannr, span_len, span_src, span_dst); */
320
321 memmove(d->vfb_data->framebuffer + span_dst *
322 PX_XSIZE * bytesperpixel, d->vfb_data->framebuffer
323 + span_src * PX_XSIZE * bytesperpixel, span_len *
324 bytesperpixel);
325
326 d->vfb_data->update_x1 = 0; d->vfb_data->update_x2 =
327 PX_XSIZE-1;
328 if ((int32_t)span_dst < d->vfb_data->update_y1)
329 d->vfb_data->update_y1 = span_dst;
330 if ((int32_t)span_dst > d->vfb_data->update_y2)
331 d->vfb_data->update_y2 = span_dst;
332 if ((int32_t)span_src < d->vfb_data->update_y1)
333 d->vfb_data->update_y1 = span_src;
334 if ((int32_t)span_src > d->vfb_data->update_y2)
335 d->vfb_data->update_y2 = span_src;
336 }
337 }
338
339 /* NetBSD and Ultrix erasecols/eraserows */
340 if (cmdword == 0x411) {
341 uint32_t v1, v2, attr;
342 int32_t lw;
343 int x,y,x2,y2;
344 int fb_y;
345 int bg_r, bg_g, bg_b;
346 unsigned char pixels[PX_XSIZE * 3];
347
348 lw = px_readword(cpu, dma_buf, 16);
349 attr = px_readword(cpu, dma_buf, 20);
350 v1 = px_readword(cpu, dma_buf, 24);
351 v2 = px_readword(cpu, dma_buf, 28);
352 #if 0
353 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
354 lw = dma_buf[16] + (dma_buf[17] << 8) +
355 (dma_buf[18] << 16) + (dma_buf[19] << 24);
356 else
357 lw = dma_buf[19] + (dma_buf[18] << 8) +
358 (dma_buf[17] << 16) + (dma_buf[16] << 24);
359
360 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
361 v1 = dma_buf[24] + (dma_buf[25] << 8) +
362 (dma_buf[26] << 16) + (dma_buf[27] << 24);
363 else
364 v1 = dma_buf[27] + (dma_buf[26] << 8) +
365 (dma_buf[25] << 16) + (dma_buf[24] << 24);
366
367 if (cpu->byte_order == EMUL_LITTLE_ENDIAN)
368 v2 = dma_buf[28] + (dma_buf[29] << 8) +
369 (dma_buf[30] << 16) + (dma_buf[31] << 24);
370 else
371 v2 = dma_buf[31] + (dma_buf[30] << 8) +
372 (dma_buf[29] << 16) + (dma_buf[28] << 24);
373 #endif
374 bg_r = (attr >> 16) & 255;
375 bg_g = (attr >> 8) & 255;
376 bg_b = attr & 255;
377 if (bg_r == 0)
378 bg_r = bg_g = bg_b = 0;
379 else
380 if (bg_r == 7)
381 bg_r = bg_g = bg_b = 192;
382 else
383 bg_r = bg_g = bg_b = 255;
384
385 v1 -= lw;
386 v2 -= lw;
387
388 x = (v1 >> 19) & 2047;
389 y = (v1 >> 3) & 1023;
390 x2 = (v2 >> 19) & 2047;
391 y2 = (v2 >> 3) & 1023;
392
393 lw = (lw + 1) >> 2;
394
395 if (x2 - x > PX_XSIZE)
396 x2 = PX_XSIZE;
397
398 #ifdef PX_DEBUG
399 debug("[ px: clear/fill: v1 = 0x%08x v2 = 0x%08x "
400 "lw=%i x=%i y=%i x2=%i y2=%i ]\n", (int)v1, (int)v2,
401 lw, x,y, x2,y2);
402 #endif
403 if (bytesperpixel == 3) {
404 int xi;
405 for (xi=0; xi<x2-x; xi++) {
406 /* TODO: rgb order? */
407 pixels[xi*3 + 0] = bg_r;
408 pixels[xi*3 + 1] = bg_g;
409 pixels[xi*3 + 2] = bg_b;
410 }
411 } else
412 memset(pixels, attr, (x2 - x) * bytesperpixel);
413
414 if (x < d->vfb_data->update_x1)
415 d->vfb_data->update_x1 = x;
416 if (x2 > d->vfb_data->update_x2)
417 d->vfb_data->update_x2 = x2;
418
419 for (fb_y=y; fb_y < y2 + lw; fb_y ++) {
420 memcpy(d->vfb_data->framebuffer + (fb_y * PX_XSIZE + x)
421 * bytesperpixel, pixels, (x2-x)*bytesperpixel);
422
423 if (fb_y < d->vfb_data->update_y1)
424 d->vfb_data->update_y1 = fb_y;
425 if (fb_y > d->vfb_data->update_y2)
426 d->vfb_data->update_y2 = fb_y;
427 }
428 }
429
430 /* NetBSD and Ultrix putchar */
431 if (cmdword == 0xa21) {
432 /* Ugly test code: */
433 unsigned char pixels[16 * 3];
434 int pixels_len = 16;
435 uint32_t v1, v2, fgcolor, bgcolor;
436 int x, y, x2,y2, i, maxi;
437 int xbit;
438 int suby;
439 int fg_r, fg_g, fg_b;
440 int bg_r, bg_g, bg_b;
441
442 v1 = px_readword(cpu, dma_buf, 52);
443 v2 = px_readword(cpu, dma_buf, 56);
444 fgcolor = px_readword(cpu, dma_buf, 16 * 4);
445 bgcolor = px_readword(cpu, dma_buf, 29 * 4);
446
447 /*
448 * TODO: Which one is r, which one is g, and which one is b?
449 * TODO 2: Use the BT459 palette, these values are hardcoded
450 * for NetBSD and Ultrix grayscale only.
451 */
452 fg_r = (fgcolor >> 16) & 255;
453 fg_g = (fgcolor >> 8) & 255;
454 fg_b = fgcolor & 255;
455 if (fg_r == 0)
456 fg_r = fg_g = fg_b = 0;
457 else
458 if (fg_r == 7)
459 fg_r = fg_g = fg_b = 192;
460 else
461 fg_r = fg_g = fg_b = 255;
462
463 bg_r = (bgcolor >> 16) & 255;
464 bg_g = (bgcolor >> 8) & 255;
465 bg_b = bgcolor & 255;
466 if (bg_r == 0)
467 bg_r = bg_g = bg_b = 0;
468 else
469 if (bg_r == 7)
470 bg_r = bg_g = bg_b = 192;
471 else
472 bg_r = bg_g = bg_b = 255;
473
474 x = (v1 >> 19) & 2047;
475 y = ((v1 - 63) >> 3) & 1023;
476 x2 = (v2 >> 19) & 2047;
477 y2 = ((v2 - 63) >> 3) & 1023;
478
479 #ifdef PX_DEBUG
480 debug("[ px putchar: v1 = 0x%08x v2 = 0x%08x x=%i y=%i ]\n",
481 (int)v1, (int)v2, x,y, x2,y2);
482 #endif
483 x %= PX_XSIZE;
484 y %= PX_YSIZE;
485 x2 %= PX_XSIZE;
486 y2 %= PX_YSIZE;
487
488 pixels_len = x2 - x;
489
490 suby = 0;
491 maxi = 12;
492 maxi = 33;
493
494 for (i=4; i<maxi; i++) {
495 int j;
496
497 if (i == 12)
498 i = 30;
499
500 for (j=0; j<2; j++) {
501 for (xbit = 0; xbit < 8; xbit ++) {
502 if (bytesperpixel == 3) {
503 /* 24-bit: */
504 /* TODO: Which one is r,
505 which one is g, and b? */
506 pixels[xbit * 3 + 0] =
507 (dma_buf[i*4 + j*2 + 0] &
508 (1 << xbit))? fg_r : bg_r;
509 pixels[xbit * 3 + 1] =
510 (dma_buf[i*4 + j*2 + 0] &
511 (1 << xbit))? fg_g : bg_g;
512 pixels[xbit * 3 + 2] =
513 (dma_buf[i*4 + j*2 + 0] &
514 (1 << xbit))? fg_b : bg_b;
515 pixels[(xbit + 8) * 3 + 0] =
516 (dma_buf[i*4 + j*2 + 1] &
517 (1 << xbit))? fg_r : bg_r;
518 pixels[(xbit + 8) * 3 + 1] =
519 (dma_buf[i*4 + j*2 + 1] &
520 (1 << xbit))? fg_g : bg_g;
521 pixels[(xbit + 8) * 3 + 2] =
522 (dma_buf[i*4 + j*2 + 1] &
523 (1 << xbit))? fg_b : bg_b;
524 } else {
525 /* 8-bit: */
526 pixels[xbit] = (dma_buf[i*4 +
527 j*2 + 0] & (1 << xbit))?
528 (fgcolor & 255) :
529 (bgcolor & 255);
530 pixels[xbit + 8] = (dma_buf[i*4
531 + j*2 + 1] & (1 << xbit))?
532 (fgcolor & 255) :
533 (bgcolor & 255);
534 }
535 }
536
537 memcpy(d->vfb_data->framebuffer + ((y+suby)
538 * PX_XSIZE + x) * bytesperpixel,
539 pixels, pixels_len * bytesperpixel);
540
541 if (y+suby < d->vfb_data->update_y1)
542 d->vfb_data->update_y1 = y+suby;
543 if (y+suby > d->vfb_data->update_y2)
544 d->vfb_data->update_y2 = y+suby;
545
546 suby ++;
547 }
548
549 if (x < d->vfb_data->update_x1)
550 d->vfb_data->update_x1 = x;
551 if (x2 > d->vfb_data->update_x2)
552 d->vfb_data->update_x2 = x2;
553 }
554 }
555 }
556
557
558 DEVICE_ACCESS(px)
559 {
560 uint64_t idata = 0, odata = 0;
561 struct px_data *d = extra;
562 size_t i;
563
564 if (writeflag == MEM_WRITE)
565 idata = memory_readmax64(cpu, data, len);
566
567 if (relative_addr < 0x0c0000) {
568 /*
569 * DMA poll: a read from this address should start a DMA
570 * transfer, and return 1 in odata while the DMA is in
571 * progress (STAMP_BUSY), and then 0 (STAMP_OK) once we're
572 * done.
573 *
574 * According to NetBSD's pxreg.h, the following formula gets
575 * us from system address to DMA address: (v is the system
576 * address)
577 *
578 * dma_addr = ( ( ((v & ~0x7fff) << 3) |
579 * (v & 0x7fff) ) & 0x1ffff800) >> 9;
580 *
581 * Hopefully, this is a good enough reversal of that formula:
582 *
583 * sys_addr = ((dma_addr << 9) & 0x7800) +
584 * ((dma_addr << 6) & 0xffff8000);
585 *
586 * If the board type is "PX" then the system address is an
587 * address in host memory. Otherwise, it is relative to
588 * 0x200000 (the i860's memory space on the board).
589 */
590 uint32_t sys_addr; /* system address for DMA transfers */
591 sys_addr = ((relative_addr << 9) & 0x7800) +
592 ((relative_addr << 6) & 0xffff8000);
593
594 /*
595 * If the system address is sane enough, then start a DMA
596 * transfer: (for the "PX" board type, don't allow obviously
597 * too-low physical addresses)
598 */
599 if (sys_addr >= 0x4000 || d->type != DEV_PX_TYPE_PX)
600 dev_px_dma(cpu, sys_addr, d);
601
602 /* Pretend that it was always OK: */
603 odata = STAMP_OK;
604 }
605
606 /* N10 sram: */
607 if (relative_addr >= 0x200000 && relative_addr < 0x280000) {
608 if (d->type == DEV_PX_TYPE_PX)
609 fatal("WARNING: the vdac should be at this "
610 "address. overlap problems?\n");
611
612 if (writeflag == MEM_WRITE) {
613 for (i=0; i<len; i++)
614 d->sram[relative_addr - 0x200000 + i] = data[i];
615 /* NOTE: this return here supresses debug output
616 (which would be printed if we continue) */
617 return 1;
618 } else {
619 /*
620 * Huh? Why have I commented out this? TODO
621 */
622 /* for (i=0; i<len; i++)
623 data[i] = d->sram[relative_addr - 0x200000
624 + i]; */
625 odata = 1;
626 }
627 }
628
629 /* TODO: Most of these aren't implemented yet. */
630
631 switch (relative_addr) {
632
633 case 0x180008: /* hsync */
634 if (writeflag==MEM_READ) {
635 debug("[ px: read from hsync: 0x%08llx ]\n",
636 (long long)odata);
637 } else {
638 debug("[ px: write to hsync: 0x%08llx ]\n",
639 (long long)idata);
640 }
641 break;
642
643 case 0x18000c: /* hsync2 */
644 if (writeflag==MEM_READ) {
645 debug("[ px: read from hsync2: 0x%08llx ]\n",
646 (long long)odata);
647 } else {
648 debug("[ px: write to hsync2: 0x%08llx ]\n",
649 (long long)idata);
650 }
651 break;
652
653 case 0x180010: /* hblank */
654 if (writeflag==MEM_READ) {
655 debug("[ px: read from hblank: 0x%08llx ]\n",
656 (long long)odata);
657 } else {
658 debug("[ px: write to hblank: 0x%08llx ]\n",
659 (long long)idata);
660 }
661 break;
662
663 case 0x180014: /* vsync */
664 if (writeflag==MEM_READ) {
665 debug("[ px: read from vsync: 0x%08llx ]\n",
666 (long long)odata);
667 } else {
668 debug("[ px: write to vsync: 0x%08llx ]\n",
669 (long long)idata);
670 }
671 break;
672
673 case 0x180018: /* vblank */
674 if (writeflag==MEM_READ) {
675 debug("[ px: read from vblank: 0x%08llx ]\n",
676 (long long)odata);
677 } else {
678 debug("[ px: write to vblank: 0x%08llx ]\n",
679 (long long)idata);
680 }
681 break;
682
683 case 0x180020: /* ipdvint */
684 if (writeflag==MEM_READ) {
685 odata = d->intr;
686
687 /* TODO: how do interrupts work on the pixelstamp boards? */
688 odata = random();
689
690 debug("[ px: read from ipdvint: 0x%08llx ]\n",
691 (long long)odata);
692 } else {
693 d->intr = idata;
694 if (idata & STIC_INT_E_WE)
695 d->intr &= ~STIC_INT_E;
696 if (idata & STIC_INT_V_WE)
697 d->intr &= ~STIC_INT_V;
698 if (idata & STIC_INT_P_WE)
699 d->intr &= ~STIC_INT_P;
700 debug("[ px: write to ipdvint: 0x%08llx ]\n",
701 (long long)idata);
702 }
703 break;
704
705 case 0x180028: /* sticsr */
706 if (writeflag==MEM_READ) {
707 debug("[ px: read from sticsr: 0x%08llx ]\n",
708 (long long)odata);
709 } else {
710 debug("[ px: write to sticsr: 0x%08llx ]\n",
711 (long long)idata);
712 }
713 break;
714
715 case 0x180038: /* buscsr */
716 if (writeflag==MEM_READ) {
717 debug("[ px: read from buscsr: 0x%08llx ]\n",
718 (long long)odata);
719 } else {
720 debug("[ px: write to buscsr: 0x%08llx ]\n",
721 (long long)idata);
722 }
723 break;
724
725 case 0x18003c: /* modcl */
726 if (writeflag==MEM_READ) {
727 odata = (d->type << 12) + (d->xconfig << 11) +
728 (d->yconfig << 9);
729 debug("[ px: read from modcl: 0x%llx ]\n",
730 (long long)odata);
731 } else {
732 debug("[ px: write to modcl: 0x%llx ]\n",
733 (long long)idata);
734 }
735 break;
736
737 default:
738 if (writeflag==MEM_READ) {
739 debug("[ px: read from addr 0x%x: 0x%llx ]\n",
740 (int)relative_addr, (long long)odata);
741 } else {
742 debug("[ px: write to addr 0x%x: 0x%llx ]\n",
743 (int)relative_addr, (long long)idata);
744 }
745 }
746
747 if (writeflag == MEM_READ)
748 memory_writemax64(cpu, data, len, odata);
749
750 return 1;
751 }
752
753
754 void dev_px_init(struct machine *machine, struct memory *mem,
755 uint64_t baseaddr, int px_type, char *irq_path)
756 {
757 struct px_data *d;
758
759 CHECK_ALLOCATION(d = malloc(sizeof(struct px_data)));
760 memset(d, 0, sizeof(struct px_data));
761
762 d->type = px_type;
763
764 INTERRUPT_CONNECT(irq_path, d->irq);
765
766 d->xconfig = d->yconfig = 0; /* 4x1 */
767
768 d->bitdepth = 24;
769 d->px_name = "(invalid)";
770
771 switch (d->type) {
772 case DEV_PX_TYPE_PX:
773 d->bitdepth = 8;
774 d->px_name = "PX";
775 break;
776 case DEV_PX_TYPE_PXG:
777 d->bitdepth = 8;
778 d->px_name = "PXG";
779 break;
780 case DEV_PX_TYPE_PXGPLUS:
781 d->px_name = "PXG+";
782 break;
783 case DEV_PX_TYPE_PXGPLUSTURBO:
784 d->px_name = "PXG+ TURBO";
785 d->xconfig = d->yconfig = 1; /* 5x2 */
786 break;
787 default:
788 fatal("dev_px_init(): unimplemented px_type\n");
789 }
790
791 d->fb_mem = memory_new(PX_XSIZE * PX_YSIZE * d->bitdepth / 8,
792 machine->arch);
793 if (d->fb_mem == NULL) {
794 fprintf(stderr, "dev_px_init(): out of memory (1)\n");
795 exit(1);
796 }
797
798 d->vfb_data = dev_fb_init(machine, d->fb_mem, 0, VFB_GENERIC,
799 PX_XSIZE, PX_YSIZE, PX_XSIZE, PX_YSIZE, d->bitdepth, d->px_name);
800 if (d->vfb_data == NULL) {
801 fprintf(stderr, "dev_px_init(): out of memory (2)\n");
802 exit(2);
803 }
804
805 switch (d->type) {
806 case DEV_PX_TYPE_PX:
807 dev_bt459_init(machine, mem, baseaddr + 0x200000, 0,
808 d->vfb_data, 8, irq_path, BT459_PX);
809 break;
810 case DEV_PX_TYPE_PXG:
811 case DEV_PX_TYPE_PXGPLUS:
812 case DEV_PX_TYPE_PXGPLUSTURBO:
813 dev_bt459_init(machine, mem, baseaddr + 0x300000, 0,
814 d->vfb_data, d->bitdepth, irq_path, BT459_PX);
815 break;
816 default:
817 fatal("dev_px_init(): unimplemented px_type\n");
818 }
819
820 memory_device_register(mem, "px", baseaddr, DEV_PX_LENGTH,
821 dev_px_access, d, DM_DEFAULT, NULL);
822 machine_add_tickfunction(machine, dev_px_tick, d, 14);
823 }
824

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