25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: dev_pckbc.c,v 1.45 2005/06/02 15:42:49 debug Exp $ |
* $Id: dev_pckbc.c,v 1.48 2005/08/16 06:49:27 debug Exp $ |
29 |
* |
* |
30 |
* Standard 8042 PC keyboard controller (and a 8242WB PS2 keyboard/mouse |
* Standard 8042 PC keyboard controller (and a 8242WB PS2 keyboard/mouse |
31 |
* controller), including the 8048 keyboard chip. |
* controller), including the 8048 keyboard chip. |
49 |
|
|
50 |
|
|
51 |
/* #define PCKBC_DEBUG */ |
/* #define PCKBC_DEBUG */ |
52 |
|
/* #define debug fatal */ |
53 |
|
|
54 |
|
|
55 |
#define MAX_8042_QUEUELEN 256 |
#define MAX_8042_QUEUELEN 256 |
308 |
/* Cause receive interrupt, if there's something in the |
/* Cause receive interrupt, if there's something in the |
309 |
receive buffer: (Otherwise deassert the interrupt.) */ |
receive buffer: (Otherwise deassert the interrupt.) */ |
310 |
if (d->head[port_nr] != d->tail[port_nr] && ints_enabled) { |
if (d->head[port_nr] != d->tail[port_nr] && ints_enabled) { |
311 |
|
debug("[ pckbc: interrupt port %i ]\n", port_nr); |
312 |
cpu_interrupt(cpu, port_nr==0? d->keyboard_irqnr |
cpu_interrupt(cpu, port_nr==0? d->keyboard_irqnr |
313 |
: d->mouse_irqnr); |
: d->mouse_irqnr); |
314 |
} else { |
} else { |
717 |
} |
} |
718 |
memset(d, 0, sizeof(struct pckbc_data)); |
memset(d, 0, sizeof(struct pckbc_data)); |
719 |
|
|
720 |
|
if (type == PCKBC_8242) |
721 |
|
len = 0x40; |
722 |
|
|
723 |
if (type == PCKBC_JAZZ) { |
if (type == PCKBC_JAZZ) { |
724 |
type = PCKBC_8042; |
type = PCKBC_8042; |
725 |
len = DEV_PCKBC_LENGTH + 0x60; |
len = DEV_PCKBC_LENGTH + 0x60; |