src/devices/dev_pcic.c

/*
 *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_pcic.c,v 1.10 2005/04/06 23:13:36 debug Exp $
 *
 *  Intel 82365SL PC Card Interface Controller (called "pcic" by NetBSD).
 *
 *  TODO: Lots of stuff.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "cpu.h"
#include "device.h"
#include "devices.h"
#include "emul.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"

#include "i82365reg.h"
#include "pcmciareg.h"


/*  #define debug fatal  */

#define DEV_PCIC_LENGTH         2

struct pcic_data {
        int             irq_nr;
        int             regnr;
};


/*
 *  dev_pcic_cis_access():
 */
int dev_pcic_cis_access(struct cpu *cpu, struct memory *mem,
        uint64_t relative_addr, unsigned char *data, size_t len,
        int writeflag, void *extra)
{
        /*  struct pcic_data *d = (struct pcic_data *) extra;  */
        uint64_t idata = 0, odata = 0;

        idata = memory_readmax64(cpu, data, len);

{
#if 0
        /*  SMC, PCM Ethernet Adapter, CIS V1.05 (manufacturer 0x108, 
            product 0x105)  */
        unsigned char x[] = {
                PCMCIA_CISTPL_DEVICE, 3, PCMCIA_DTYPE_FUNCSPEC, 0xff,0xff,
                PCMCIA_CISTPL_FUNCID, 2, 0x06, 0x00,
                PCMCIA_CISTPL_MANFID, 4, 0x08, 0x01, 0x05, 0x01,
                PCMCIA_CISTPL_VERS_1, 0x26,
                0x04, 0x01, 0x53, 0x4d, 0x43, 0x00, 0x50, 0x43, 0x4d, 0x20,
                0x45, 0x74, 0x68, 0x65, 0x72, 0x6e, 0x65, 0x74, 0x20, 0x41,
                0x64, 0x61, 0x70, 0x74, 0x65, 0x72, 0x00, 0x43, 0x49, 0x53,
                0x20, 0x56, 0x31, 0x2e, 0x30, 0x35, 0x00, 0xff,
                PCMCIA_CISTPL_CONFIG, 0x0a,
                0x02, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0xff,
                PCMCIA_CISTPL_CFTABLE_ENTRY, 0x0b,
                0xc1, 0x01, 0x70, 0x50, 0xbc, 0x8e, 0x48, 0x40, 0x00,0x02,0xff,
                /*  unhandled CISTPL 22  */
                0x22, 0x02, 0x01, 0x02,
                /*  unhandled CISTPL 22  */
                0x22, 0x05, 0x02, 0x80, 0x96, 0x98, 0x00,
                /*  unhandled CISTPL 22  */
                0x22, 0x02, 0x03, 0x01,
                /*  unhandled CISTPL 22  */
                0x22, 0x08, 0x04, 0x06, 0x00, 0x00, 0xc0, 0x2f, 0x48, 0xd2,
                /*  unhandled CISTPL 22  */
                0x22, 0x02, 0x05, 0x01,

                PCMCIA_CISTPL_END, 0
        };
#endif

        /*  From http://www.mail-archive.com/freebsd-current@freebsd.
                org/msg32550.html  */
        unsigned char x[] = {
                PCMCIA_CISTPL_DEVICE, 3, 0xdc, 0x00, 0xff,
                PCMCIA_CISTPL_VERS_1, 0x1a,
                0x04,0x01,0x20,0x00,0x4e,0x69,0x6e,0x6a,0x61,0x41,0x54,0x41,
                0x2d,0x00,0x56,0x31,0x2e,0x30,0x00,0x41,0x50,0x30,0x30,0x20,
                0x00,0xff,
                PCMCIA_CISTPL_CONFIG, 5,
                0x01,0x23,0x00,0x02,0x03,
                PCMCIA_CISTPL_CFTABLE_ENTRY, 0x15,
                0xe1,0x01,0x3d,0x11,0x55,0x1e,0xfc,0x23,0xf0,0x61,0x80,0x01,
                0x07,0x86,0x03,0x01,0x30,0x68,0xd0,0x10,0x00,
#if 0
                PCMCIA_CISTPL_CFTABLE_ENTRY, 0xf,
                0x22,0x38,0xf0,0x61,0x90,0x01,0x07,0x96,0x03,0x01,0x30,0x68,
                0xd0,0x10,0x00,
                PCMCIA_CISTPL_CFTABLE_ENTRY, 0xf,
                0x23,0x38,0xf0,0x61,0xa0,0x01,0x07,0xa6,0x03,0x01,0x30,0x68,
                0xd0,0x10,0x00,
#endif
                PCMCIA_CISTPL_NO_LINK, 0,

                PCMCIA_CISTPL_END, 0
        };

        relative_addr /= 2;
        if (relative_addr < sizeof(x))
                odata = x[relative_addr];

        debug("[ dev_pcic_cis_access: blah blah ]\n");
}

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


/*
 *  dev_pcic_access():
 */
int dev_pcic_access(struct cpu *cpu, struct memory *mem,
        uint64_t relative_addr, unsigned char *data, size_t len,
        int writeflag, void *extra)
{
        struct pcic_data *d = (struct pcic_data *) extra;
        uint64_t idata = 0, odata = 0;
        int controller_nr, socket_nr;

        idata = memory_readmax64(cpu, data, len);

        controller_nr = d->regnr & 0x80? 1 : 0;
        socket_nr = d->regnr & 0x40? 1 : 0;

        switch (relative_addr) {
        case 0: /*  Register select:  */
                if (writeflag == MEM_WRITE)
                        d->regnr = idata;
                else
                        odata = d->regnr;
                break;
        case 1: /*  Register access:  */
                switch (d->regnr & 0x3f) {
                case PCIC_IDENT:
                        /*  This causes sockets A and B to be present on
                            controller 0, and only socket A on controller 1.  */
                        if (controller_nr == 1 && socket_nr == 1)
                                odata = 0;
                        else
                                odata = PCIC_IDENT_IFTYPE_MEM_AND_IO
                                    | PCIC_IDENT_REV_I82365SLR1;
                        break;
#if 1
                case PCIC_INTR:
                        odata = PCIC_INTR_IRQ3;
                        break;
#endif
                case PCIC_CSC:
                        odata = PCIC_CSC_GPI;
                        break;
                case PCIC_IF_STATUS:
                        odata = PCIC_IF_STATUS_READY;
                        if (controller_nr == 0 && socket_nr == 0)
                                odata |= PCIC_IF_STATUS_CARDDETECT_PRESENT;
                        break;
                default:
                        if (writeflag == MEM_WRITE) {
                                debug("[ pcic: unimplemented write to "
                                    "controller %i socket %c, regnr %i: "
                                    "data=0x%02x ]\n", controller_nr,
                                    socket_nr? 'B' : 'A',
                                    d->regnr & 0x3f, (int)idata);
                        } else {
                                debug("[ pcic: unimplemented read from "
                                    "controller %i socket %c, regnr %i ]\n",
                                    controller_nr, socket_nr? 'B' : 'A',
                                    d->regnr & 0x3f);
                        }
                }
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


/*
 *  devinit_pcic():
 */
int devinit_pcic(struct devinit *devinit)
{
        struct pcic_data *d = malloc(sizeof(struct pcic_data));

        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct pcic_data));
        d->irq_nr = devinit->irq_nr;

        memory_device_register(devinit->machine->memory, devinit->name,
            devinit->addr, DEV_PCIC_LENGTH,
            dev_pcic_access, (void *)d, MEM_DEFAULT, NULL);

        /*  TODO: this shouldn't be hardcoded for hpcmips here!  */
        memory_device_register(devinit->machine->memory, "pcic_cis",
            0x10070000, 0x1000, dev_pcic_cis_access, (void *)d,
            MEM_DEFAULT, NULL);

        /*  TODO: find out a good way to specify the address, and the IRQ!  */
        dev_wdc_init(devinit->machine, devinit->machine->memory,
            0x14000180, 8 + 32 + 9, 0);

        /*  TODO: Linux/MobilePro looks at 0x14000170 and 0x1f0...  */
        /*  Yuck. Now there are two. How should this be solved nicely?  */
        dev_wdc_init(devinit->machine, devinit->machine->memory,
            0x140001f0, 8 + 32 + 9, 0);

        return 1;
}

1	/*
2	* Copyright (C) 2005 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: dev_pcic.c,v 1.10 2005/04/06 23:13:36 debug Exp $
29	*
30	* Intel 82365SL PC Card Interface Controller (called "pcic" by NetBSD).
31	*
32	* TODO: Lots of stuff.
33	*/
34
35	#include <stdio.h>
36	#include <stdlib.h>
37	#include <string.h>
38
39	#include "cpu.h"
40	#include "device.h"
41	#include "devices.h"
42	#include "emul.h"
43	#include "machine.h"
44	#include "memory.h"
45	#include "misc.h"
46
47	#include "i82365reg.h"
48	#include "pcmciareg.h"
49
50
51	/* #define debug fatal */
52
53	#define DEV_PCIC_LENGTH 2
54
55	struct pcic_data {
56	int irq_nr;
57	int regnr;
58	};
59
60
61	/*
62	* dev_pcic_cis_access():
63	*/
64	int dev_pcic_cis_access(struct cpu cpu, struct memory mem,
65	uint64_t relative_addr, unsigned char *data, size_t len,
66	int writeflag, void *extra)
67	{
68	/* struct pcic_data d = (struct pcic_data ) extra; */
69	uint64_t idata = 0, odata = 0;
70
71	idata = memory_readmax64(cpu, data, len);
72
73	{
74	#if 0
75	/* SMC, PCM Ethernet Adapter, CIS V1.05 (manufacturer 0x108,
76	product 0x105) */
77	unsigned char x[] = {
78	PCMCIA_CISTPL_DEVICE, 3, PCMCIA_DTYPE_FUNCSPEC, 0xff,0xff,
79	PCMCIA_CISTPL_FUNCID, 2, 0x06, 0x00,
80	PCMCIA_CISTPL_MANFID, 4, 0x08, 0x01, 0x05, 0x01,
81	PCMCIA_CISTPL_VERS_1, 0x26,
82	0x04, 0x01, 0x53, 0x4d, 0x43, 0x00, 0x50, 0x43, 0x4d, 0x20,
83	0x45, 0x74, 0x68, 0x65, 0x72, 0x6e, 0x65, 0x74, 0x20, 0x41,
84	0x64, 0x61, 0x70, 0x74, 0x65, 0x72, 0x00, 0x43, 0x49, 0x53,
85	0x20, 0x56, 0x31, 0x2e, 0x30, 0x35, 0x00, 0xff,
86	PCMCIA_CISTPL_CONFIG, 0x0a,
87	0x02, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, 0xff,
88	PCMCIA_CISTPL_CFTABLE_ENTRY, 0x0b,
89	0xc1, 0x01, 0x70, 0x50, 0xbc, 0x8e, 0x48, 0x40, 0x00,0x02,0xff,
90	/* unhandled CISTPL 22 */
91	0x22, 0x02, 0x01, 0x02,
92	/* unhandled CISTPL 22 */
93	0x22, 0x05, 0x02, 0x80, 0x96, 0x98, 0x00,
94	/* unhandled CISTPL 22 */
95	0x22, 0x02, 0x03, 0x01,
96	/* unhandled CISTPL 22 */
97	0x22, 0x08, 0x04, 0x06, 0x00, 0x00, 0xc0, 0x2f, 0x48, 0xd2,
98	/* unhandled CISTPL 22 */
99	0x22, 0x02, 0x05, 0x01,
100
101	PCMCIA_CISTPL_END, 0
102	};
103	#endif
104
105	/* From http://www.mail-archive.com/freebsd-current@freebsd.
106	org/msg32550.html */
107	unsigned char x[] = {
108	PCMCIA_CISTPL_DEVICE, 3, 0xdc, 0x00, 0xff,
109	PCMCIA_CISTPL_VERS_1, 0x1a,
110	0x04,0x01,0x20,0x00,0x4e,0x69,0x6e,0x6a,0x61,0x41,0x54,0x41,
111	0x2d,0x00,0x56,0x31,0x2e,0x30,0x00,0x41,0x50,0x30,0x30,0x20,
112	0x00,0xff,
113	PCMCIA_CISTPL_CONFIG, 5,
114	0x01,0x23,0x00,0x02,0x03,
115	PCMCIA_CISTPL_CFTABLE_ENTRY, 0x15,
116	0xe1,0x01,0x3d,0x11,0x55,0x1e,0xfc,0x23,0xf0,0x61,0x80,0x01,
117	0x07,0x86,0x03,0x01,0x30,0x68,0xd0,0x10,0x00,
118	#if 0
119	PCMCIA_CISTPL_CFTABLE_ENTRY, 0xf,
120	0x22,0x38,0xf0,0x61,0x90,0x01,0x07,0x96,0x03,0x01,0x30,0x68,
121	0xd0,0x10,0x00,
122	PCMCIA_CISTPL_CFTABLE_ENTRY, 0xf,
123	0x23,0x38,0xf0,0x61,0xa0,0x01,0x07,0xa6,0x03,0x01,0x30,0x68,
124	0xd0,0x10,0x00,
125	#endif
126	PCMCIA_CISTPL_NO_LINK, 0,
127
128	PCMCIA_CISTPL_END, 0
129	};
130
131	relative_addr /= 2;
132	if (relative_addr < sizeof(x))
133	odata = x[relative_addr];
134
135	debug("[ dev_pcic_cis_access: blah blah ]\n");
136	}
137
138	if (writeflag == MEM_READ)
139	memory_writemax64(cpu, data, len, odata);
140
141	return 1;
142	}
143
144
145	/*
146	* dev_pcic_access():
147	*/
148	int dev_pcic_access(struct cpu cpu, struct memory mem,
149	uint64_t relative_addr, unsigned char *data, size_t len,
150	int writeflag, void *extra)
151	{
152	struct pcic_data d = (struct pcic_data ) extra;
153	uint64_t idata = 0, odata = 0;
154	int controller_nr, socket_nr;
155
156	idata = memory_readmax64(cpu, data, len);
157
158	controller_nr = d->regnr & 0x80? 1 : 0;
159	socket_nr = d->regnr & 0x40? 1 : 0;
160
161	switch (relative_addr) {
162	case 0: /* Register select: */
163	if (writeflag == MEM_WRITE)
164	d->regnr = idata;
165	else
166	odata = d->regnr;
167	break;
168	case 1: /* Register access: */
169	switch (d->regnr & 0x3f) {
170	case PCIC_IDENT:
171	/* This causes sockets A and B to be present on
172	controller 0, and only socket A on controller 1. */
173	if (controller_nr == 1 && socket_nr == 1)
174	odata = 0;
175	else
176	odata = PCIC_IDENT_IFTYPE_MEM_AND_IO
177	\| PCIC_IDENT_REV_I82365SLR1;
178	break;
179	#if 1
180	case PCIC_INTR:
181	odata = PCIC_INTR_IRQ3;
182	break;
183	#endif
184	case PCIC_CSC:
185	odata = PCIC_CSC_GPI;
186	break;
187	case PCIC_IF_STATUS:
188	odata = PCIC_IF_STATUS_READY;
189	if (controller_nr == 0 && socket_nr == 0)
190	odata \|= PCIC_IF_STATUS_CARDDETECT_PRESENT;
191	break;
192	default:
193	if (writeflag == MEM_WRITE) {
194	debug("[ pcic: unimplemented write to "
195	"controller %i socket %c, regnr %i: "
196	"data=0x%02x ]\n", controller_nr,
197	socket_nr? 'B' : 'A',
198	d->regnr & 0x3f, (int)idata);
199	} else {
200	debug("[ pcic: unimplemented read from "
201	"controller %i socket %c, regnr %i ]\n",
202	controller_nr, socket_nr? 'B' : 'A',
203	d->regnr & 0x3f);
204	}
205	}
206	}
207
208	if (writeflag == MEM_READ)
209	memory_writemax64(cpu, data, len, odata);
210
211	return 1;
212	}
213
214
215	/*
216	* devinit_pcic():
217	*/
218	int devinit_pcic(struct devinit *devinit)
219	{
220	struct pcic_data *d = malloc(sizeof(struct pcic_data));
221
222	if (d == NULL) {
223	fprintf(stderr, "out of memory\n");
224	exit(1);
225	}
226	memset(d, 0, sizeof(struct pcic_data));
227	d->irq_nr = devinit->irq_nr;
228
229	memory_device_register(devinit->machine->memory, devinit->name,
230	devinit->addr, DEV_PCIC_LENGTH,
231	dev_pcic_access, (void *)d, MEM_DEFAULT, NULL);
232
233	/* TODO: this shouldn't be hardcoded for hpcmips here! */
234	memory_device_register(devinit->machine->memory, "pcic_cis",
235	0x10070000, 0x1000, dev_pcic_cis_access, (void *)d,
236	MEM_DEFAULT, NULL);
237
238	/* TODO: find out a good way to specify the address, and the IRQ! */
239	dev_wdc_init(devinit->machine, devinit->machine->memory,
240	0x14000180, 8 + 32 + 9, 0);
241
242	/* TODO: Linux/MobilePro looks at 0x14000170 and 0x1f0... */
243	/* Yuck. Now there are two. How should this be solved nicely? */
244	dev_wdc_init(devinit->machine, devinit->machine->memory,
245	0x140001f0, 8 + 32 + 9, 0);
246
247	return 1;
248	}
249