1 |
/* |
/* |
2 |
* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
3 |
* |
* |
4 |
* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: dev_pccmos.c,v 1.8 2005/10/26 14:37:04 debug Exp $ |
* $Id: dev_pccmos.c,v 1.22 2006/02/09 20:02:59 debug Exp $ |
29 |
* |
* |
30 |
* PC CMOS/RTC device. |
* PC CMOS/RTC device (ISA ports 0x70 and 0x71). |
31 |
* |
* |
32 |
* The main point of this device is to be a "PC style wrapper" for accessing |
* The main point of this device is to be a "PC style wrapper" for accessing |
33 |
* the MC146818 (the RTC). In most other respects, this device is bogus, and |
* the MC146818 (the RTC). In most other respects, this device is bogus, and |
59 |
/* |
/* |
60 |
* dev_pccmos_access(): |
* dev_pccmos_access(): |
61 |
*/ |
*/ |
62 |
int dev_pccmos_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(pccmos) |
|
uint64_t relative_addr, unsigned char *data, size_t len, |
|
|
int writeflag, void *extra) |
|
63 |
{ |
{ |
64 |
struct pccmos_data *d = (struct pccmos_data *) extra; |
struct pccmos_data *d = (struct pccmos_data *) extra; |
65 |
uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
66 |
unsigned char b = 0; |
unsigned char b = 0; |
67 |
|
int r = 1; |
68 |
|
|
69 |
if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
70 |
b = idata = memory_readmax64(cpu, data, len); |
b = idata = memory_readmax64(cpu, data, len); |
78 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
79 |
d->select = idata; |
d->select = idata; |
80 |
if (idata <= 0x0d) { |
if (idata <= 0x0d) { |
81 |
cpu->memory_rw(cpu, cpu->mem, |
r = cpu->memory_rw(cpu, cpu->mem, |
82 |
PCCMOS_MC146818_FAKE_ADDR, &b, 1, |
PCCMOS_MC146818_FAKE_ADDR, &b, 1, |
83 |
MEM_WRITE, PHYSICAL); |
MEM_WRITE, PHYSICAL); |
84 |
} |
} |
87 |
} else { |
} else { |
88 |
if (d->select <= 0x0d) { |
if (d->select <= 0x0d) { |
89 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
90 |
cpu->memory_rw(cpu, cpu->mem, |
r = cpu->memory_rw(cpu, cpu->mem, |
91 |
PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1, |
PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1, |
92 |
MEM_WRITE, PHYSICAL); |
MEM_WRITE, PHYSICAL); |
93 |
} else { |
} else { |
94 |
cpu->memory_rw(cpu, cpu->mem, |
r = cpu->memory_rw(cpu, cpu->mem, |
95 |
PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1, |
PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1, |
96 |
MEM_READ, PHYSICAL); |
MEM_READ, PHYSICAL); |
97 |
odata = b; |
odata = b; |
104 |
} |
} |
105 |
} |
} |
106 |
|
|
107 |
|
if (r == 0) |
108 |
|
fatal("[ pccmos: memory_rw() error! ]\n"); |
109 |
|
|
110 |
if (writeflag == MEM_READ) |
if (writeflag == MEM_READ) |
111 |
memory_writemax64(cpu, data, len, odata); |
memory_writemax64(cpu, data, len, odata); |
112 |
|
|
114 |
} |
} |
115 |
|
|
116 |
|
|
117 |
/* |
DEVINIT(pccmos) |
|
* devinit_pccmos(): |
|
|
*/ |
|
|
int devinit_pccmos(struct devinit *devinit) |
|
118 |
{ |
{ |
119 |
struct pccmos_data *d = malloc(sizeof(struct pccmos_data)); |
struct pccmos_data *d = malloc(sizeof(struct pccmos_data)); |
120 |
int irq_nr, type = MC146818_PC_CMOS, len = DEV_PCCMOS_LENGTH; |
int irq_nr, type = MC146818_PC_CMOS, len = DEV_PCCMOS_LENGTH; |
130 |
*/ |
*/ |
131 |
switch (devinit->machine->machine_type) { |
switch (devinit->machine->machine_type) { |
132 |
case MACHINE_CATS: |
case MACHINE_CATS: |
133 |
|
case MACHINE_NETWINDER: |
134 |
irq_nr = 32 + 8; |
irq_nr = 32 + 8; |
135 |
type = MC146818_CATS; |
type = MC146818_CATS; |
136 |
d->ram[0x48] = 20; /* century */ |
d->ram[0x48] = 20; /* century */ |
137 |
len = DEV_PCCMOS_LENGTH * 2; |
len = DEV_PCCMOS_LENGTH * 2; |
138 |
break; |
break; |
139 |
|
case MACHINE_ALGOR: |
140 |
|
irq_nr = 8 + 8; |
141 |
|
type = MC146818_ALGOR; |
142 |
|
break; |
143 |
|
case MACHINE_ARC: |
144 |
|
fatal("\nARC pccmos: TODO\n\n"); |
145 |
|
irq_nr = 8 + 8; /* TODO */ |
146 |
|
type = MC146818_ALGOR; |
147 |
|
break; |
148 |
|
case MACHINE_EVBMIPS: |
149 |
|
/* Malta etc. */ |
150 |
|
irq_nr = 8 + 8; |
151 |
|
type = MC146818_ALGOR; |
152 |
|
break; |
153 |
case MACHINE_X86: |
case MACHINE_X86: |
154 |
irq_nr = 16; /* "No" irq */ |
irq_nr = 16; /* "No" irq */ |
155 |
break; |
break; |
156 |
|
case MACHINE_BEBOX: |
157 |
|
case MACHINE_PREP: |
158 |
|
case MACHINE_MVMEPPC: |
159 |
|
irq_nr = 32 + 8; |
160 |
|
break; |
161 |
|
case MACHINE_SHARK: |
162 |
|
case MACHINE_IYONIX: |
163 |
|
/* TODO */ |
164 |
|
irq_nr = 32 + 8; |
165 |
|
break; |
166 |
default:fatal("devinit_pccmos(): unimplemented machine type" |
default:fatal("devinit_pccmos(): unimplemented machine type" |
167 |
" %i\n", devinit->machine->machine_type); |
" %i\n", devinit->machine->machine_type); |
168 |
exit(1); |
exit(1); |
170 |
|
|
171 |
memory_device_register(devinit->machine->memory, devinit->name, |
memory_device_register(devinit->machine->memory, devinit->name, |
172 |
devinit->addr, len, dev_pccmos_access, (void *)d, |
devinit->addr, len, dev_pccmos_access, (void *)d, |
173 |
MEM_DEFAULT, NULL); |
DM_DEFAULT, NULL); |
174 |
|
|
175 |
dev_mc146818_init(devinit->machine, devinit->machine->memory, |
dev_mc146818_init(devinit->machine, devinit->machine->memory, |
176 |
PCCMOS_MC146818_FAKE_ADDR, irq_nr, type, 1); |
PCCMOS_MC146818_FAKE_ADDR, irq_nr, type, 1); |