src/devices/dev_pccmos.c

/*
 *  Copyright (C) 2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_pccmos.c,v 1.15 2005/11/21 22:27:18 debug Exp $
 *  
 *  PC CMOS/RTC device.
 *
 *  The main point of this device is to be a "PC style wrapper" for accessing
 *  the MC146818 (the RTC). In most other respects, this device is bogus, and
 *  just acts as a 256-byte RAM device.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "cpu.h"
#include "device.h"
#include "devices.h"
#include "emul.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"


#define DEV_PCCMOS_LENGTH               2
#define PCCMOS_MC146818_FAKE_ADDR       0x1d00000000ULL

struct pccmos_data {
        unsigned char   select;
        unsigned char   ram[256];
};


/*
 *  dev_pccmos_access():
 */
int dev_pccmos_access(struct cpu *cpu, struct memory *mem,
        uint64_t relative_addr, unsigned char *data, size_t len,
        int writeflag, void *extra)
{
        struct pccmos_data *d = (struct pccmos_data *) extra;
        uint64_t idata = 0, odata = 0;
        unsigned char b = 0;
        int r = 1;

        if (writeflag == MEM_WRITE)
                b = idata = memory_readmax64(cpu, data, len);

        /*
         *  Accesses to CMOS register 0 .. 0xd are rerouted to the
         *  RTC; all other access are treated as CMOS RAM read/writes.
         */

        if ((relative_addr & 1) == 0) {
                if (writeflag == MEM_WRITE) {
                        d->select = idata;
                        if (idata <= 0x0d) {
                                r = cpu->memory_rw(cpu, cpu->mem,
                                    PCCMOS_MC146818_FAKE_ADDR, &b, 1,
                                    MEM_WRITE, PHYSICAL);
                        }
                } else
                        odata = d->select;
        } else {
                if (d->select <= 0x0d) {
                        if (writeflag == MEM_WRITE) {
                                r = cpu->memory_rw(cpu, cpu->mem,
                                    PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1,
                                    MEM_WRITE, PHYSICAL);
                        } else {
                                r = cpu->memory_rw(cpu, cpu->mem,
                                    PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1,
                                    MEM_READ, PHYSICAL);
                                odata = b;
                        }
                } else {
                        if (writeflag == MEM_WRITE)
                                d->ram[d->select] = idata;
                        else
                                odata = d->ram[d->select];
                }
        }

        if (r == 0)
                fatal("[ pccmos: memory_rw() error! ]\n");

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


/*
 *  devinit_pccmos():
 */
int devinit_pccmos(struct devinit *devinit)
{
        struct pccmos_data *d = malloc(sizeof(struct pccmos_data));
        int irq_nr, type = MC146818_PC_CMOS, len = DEV_PCCMOS_LENGTH;

        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct pccmos_data));

        /*
         *  Different machines use different IRQ schemes.
         */
        switch (devinit->machine->machine_type) {
        case MACHINE_CATS:
        case MACHINE_NETWINDER:
                irq_nr = 32 + 8;
                type = MC146818_CATS;
                d->ram[0x48] = 20;              /*  century  */
                len = DEV_PCCMOS_LENGTH * 2;
                break;
        case MACHINE_ALGOR:
                irq_nr = 8 + 8;
                type = MC146818_ALGOR;
                break;
        case MACHINE_EVBMIPS:
                /*  Malta etc.  */
                irq_nr = 8 + 8;
                type = MC146818_ALGOR;
                break;
        case MACHINE_X86:
                irq_nr = 16;    /*  "No" irq  */
                break;
        case MACHINE_BEBOX:
        case MACHINE_PREP:
                irq_nr = 32 + 8;
                break;
        default:fatal("devinit_pccmos(): unimplemented machine type"
                    " %i\n", devinit->machine->machine_type);
                exit(1);
        }

        memory_device_register(devinit->machine->memory, devinit->name,
            devinit->addr, len, dev_pccmos_access, (void *)d,
            DM_DEFAULT, NULL);

        dev_mc146818_init(devinit->machine, devinit->machine->memory,
            PCCMOS_MC146818_FAKE_ADDR, irq_nr, type, 1);

        return 1;
}

1	dpavlin	6	/*
2			* Copyright (C) 2005 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	20	* $Id: dev_pccmos.c,v 1.15 2005/11/21 22:27:18 debug Exp $
29	dpavlin	6	*
30			* PC CMOS/RTC device.
31			*
32	dpavlin	14	* The main point of this device is to be a "PC style wrapper" for accessing
33			* the MC146818 (the RTC). In most other respects, this device is bogus, and
34			* just acts as a 256-byte RAM device.
35	dpavlin	6	*/
36
37			#include <stdio.h>
38			#include <stdlib.h>
39			#include <string.h>
40
41			#include "cpu.h"
42			#include "device.h"
43			#include "devices.h"
44			#include "emul.h"
45			#include "machine.h"
46			#include "memory.h"
47			#include "misc.h"
48
49
50			#define DEV_PCCMOS_LENGTH 2
51			#define PCCMOS_MC146818_FAKE_ADDR 0x1d00000000ULL
52
53			struct pccmos_data {
54			unsigned char select;
55			unsigned char ram[256];
56			};
57
58
59			/*
60			* dev_pccmos_access():
61			*/
62			int dev_pccmos_access(struct cpu cpu, struct memory mem,
63			uint64_t relative_addr, unsigned char *data, size_t len,
64			int writeflag, void *extra)
65			{
66			struct pccmos_data d = (struct pccmos_data ) extra;
67			uint64_t idata = 0, odata = 0;
68	dpavlin	18	unsigned char b = 0;
69	dpavlin	20	int r = 1;
70	dpavlin	6
71	dpavlin	18	if (writeflag == MEM_WRITE)
72			b = idata = memory_readmax64(cpu, data, len);
73	dpavlin	6
74	dpavlin	14	/*
75			* Accesses to CMOS register 0 .. 0xd are rerouted to the
76			* RTC; all other access are treated as CMOS RAM read/writes.
77			*/
78
79	dpavlin	16	if ((relative_addr & 1) == 0) {
80			if (writeflag == MEM_WRITE) {
81	dpavlin	6	d->select = idata;
82	dpavlin	14	if (idata <= 0x0d) {
83	dpavlin	20	r = cpu->memory_rw(cpu, cpu->mem,
84	dpavlin	14	PCCMOS_MC146818_FAKE_ADDR, &b, 1,
85	dpavlin	6	MEM_WRITE, PHYSICAL);
86	dpavlin	14	}
87	dpavlin	6	} else
88			odata = d->select;
89	dpavlin	16	} else {
90			if (d->select <= 0x0d) {
91	dpavlin	14	if (writeflag == MEM_WRITE) {
92	dpavlin	20	r = cpu->memory_rw(cpu, cpu->mem,
93	dpavlin	14	PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1,
94	dpavlin	6	MEM_WRITE, PHYSICAL);
95	dpavlin	14	} else {
96	dpavlin	20	r = cpu->memory_rw(cpu, cpu->mem,
97	dpavlin	14	PCCMOS_MC146818_FAKE_ADDR + 1, &b, 1,
98	dpavlin	6	MEM_READ, PHYSICAL);
99	dpavlin	14	odata = b;
100			}
101	dpavlin	6	} else {
102			if (writeflag == MEM_WRITE)
103			d->ram[d->select] = idata;
104			else
105			odata = d->ram[d->select];
106			}
107			}
108
109	dpavlin	20	if (r == 0)
110			fatal("[ pccmos: memory_rw() error! ]\n");
111
112	dpavlin	6	if (writeflag == MEM_READ)
113			memory_writemax64(cpu, data, len, odata);
114
115			return 1;
116			}
117
118
119			/*
120			* devinit_pccmos():
121			*/
122			int devinit_pccmos(struct devinit *devinit)
123			{
124			struct pccmos_data *d = malloc(sizeof(struct pccmos_data));
125	dpavlin	16	int irq_nr, type = MC146818_PC_CMOS, len = DEV_PCCMOS_LENGTH;
126	dpavlin	6
127			if (d == NULL) {
128			fprintf(stderr, "out of memory\n");
129			exit(1);
130			}
131			memset(d, 0, sizeof(struct pccmos_data));
132
133	dpavlin	14	/*
134			* Different machines use different IRQ schemes.
135			*/
136			switch (devinit->machine->machine_type) {
137			case MACHINE_CATS:
138	dpavlin	20	case MACHINE_NETWINDER:
139	dpavlin	14	irq_nr = 32 + 8;
140	dpavlin	16	type = MC146818_CATS;
141			d->ram[0x48] = 20; /* century */
142			len = DEV_PCCMOS_LENGTH * 2;
143	dpavlin	14	break;
144	dpavlin	20	case MACHINE_ALGOR:
145			irq_nr = 8 + 8;
146			type = MC146818_ALGOR;
147			break;
148			case MACHINE_EVBMIPS:
149			/* Malta etc. */
150			irq_nr = 8 + 8;
151			type = MC146818_ALGOR;
152			break;
153	dpavlin	14	case MACHINE_X86:
154			irq_nr = 16; /* "No" irq */
155			break;
156	dpavlin	20	case MACHINE_BEBOX:
157			case MACHINE_PREP:
158			irq_nr = 32 + 8;
159			break;
160	dpavlin	14	default:fatal("devinit_pccmos(): unimplemented machine type"
161			" %i\n", devinit->machine->machine_type);
162			exit(1);
163			}
164
165	dpavlin	16	memory_device_register(devinit->machine->memory, devinit->name,
166			devinit->addr, len, dev_pccmos_access, (void *)d,
167	dpavlin	20	DM_DEFAULT, NULL);
168	dpavlin	16
169	dpavlin	6	dev_mc146818_init(devinit->machine, devinit->machine->memory,
170	dpavlin	16	PCCMOS_MC146818_FAKE_ADDR, irq_nr, type, 1);
171	dpavlin	6
172			return 1;
173			}
174