src/devices/dev_ohci.c

/*
 *  Copyright (C) 2004-2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_ohci.c,v 1.5 2005/10/26 14:37:04 debug Exp $
 *  
 *  USB OHCI (Open Host Controller Interface).
 *
 *  TODO
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "cpu.h"
#include "device.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"

#include "ohcireg.h"


/*  Length is 0x1000 at least on Playstation 2  */
#define DEV_OHCI_LENGTH         0x1000


#define debug fatal


struct ohci_data {
        int     irq_nr;

        int     port1reset;
};


/*
 *  dev_ohci_access():
 */
int dev_ohci_access(struct cpu *cpu, struct memory *mem,
        uint64_t relative_addr, unsigned char *data, size_t len,
        int writeflag, void *extra)
{
        struct ohci_data *d = extra;
        uint64_t idata = 0, odata = 0;
        char *name = NULL;

        if (writeflag == MEM_WRITE)
                idata = memory_readmax64(cpu, data, len);

        switch (relative_addr) {
        case OHCI_REVISION:
                name = "REVISION";
                if (writeflag == MEM_READ) {
                        odata = 0x10;   /*  Version 1.0.  */
                }
                break;
        case OHCI_COMMAND_STATUS:
                name = "COMMAND_STATUS";
                if (idata == 0x2) {
fatal("URK\n");
                        cpu_interrupt(cpu, d->irq_nr);
                }
                break;
        case OHCI_INTERRUPT_STATUS:
                name = "INTERRUPT_STATUS";
                odata = OHCI_WDH;
                break;
/*
 *  TODO: It now sleeps at      tsleep(xfer, PRIBIO, "usbsyn", 0);
 *  in netbsd/src/sys/dev/usb/usbdi.c
 */
        case OHCI_RH_DESCRIPTOR_A:
                name = "RH_DESCRIPTOR_A";
                odata = 2;      /*  Nr of ports  */
                break;
        case OHCI_RH_STATUS:
                name = "RH_STATUS";
                /*  TODO  */
                break;
        case OHCI_RH_PORT_STATUS(1):    /*  First port  */
                name = "RH_PORT_STATUS(1)";
                if (writeflag == MEM_READ) {
                        /*  Status = low 16, Change = top 16  */
                        odata = 0x10101;
                        /*  0x0001 = connected
                            0x0100 = power  */
                        if (d->port1reset)
                                odata |= (0x10 << 16) | 0x10;
                } else {
                        /*  0x10 = UPS_C_PORT_RESET  */
                        if (idata & 0x10)
                                d->port1reset = 1;
                        if (idata & 0x100000)
                                d->port1reset = 0;
                }
                break;
        case OHCI_RH_PORT_STATUS(2):    /*  Second port  */
                name = "RH_PORT_STATUS(2)";
                /*  TODO  */
                odata = 0;
                break;
        default:
                if (writeflag == MEM_READ) {
                        debug("[ ohci: read from addr 0x%x: 0x%llx ]\n",
                            (int)relative_addr, (long long)odata);
                } else {
                        debug("[ ohci: write to addr 0x%x: 0x%llx ]\n",
                            (int)relative_addr, (long long)idata);
                }
        }

        if (name != NULL) {
                if (writeflag == MEM_READ)
                        debug("[ ohci: read from %s: 0x%llx ]\n",
                            name, (long long)odata);
                else
                        debug("[ ohci: write to %s: 0x%llx ]\n",
                            name, (long long)idata);
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


/*
 *  devinit_ohci():
 */
int devinit_ohci(struct devinit *devinit)
{
        struct ohci_data *d;

        d = malloc(sizeof(struct ohci_data));
        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct ohci_data));
        d->irq_nr = devinit->irq_nr;

        memory_device_register(devinit->machine->memory,
            devinit->name, devinit->addr,
            DEV_OHCI_LENGTH, dev_ohci_access, d, MEM_DEFAULT, NULL);

        return 1;
}

1	dpavlin	4	/*
2			* Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
3			*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	18	* $Id: dev_ohci.c,v 1.5 2005/10/26 14:37:04 debug Exp $
29	dpavlin	4	*
30			* USB OHCI (Open Host Controller Interface).
31			*
32			* TODO
33			*/
34
35			#include <stdio.h>
36			#include <stdlib.h>
37			#include <string.h>
38
39			#include "cpu.h"
40			#include "device.h"
41			#include "machine.h"
42			#include "memory.h"
43			#include "misc.h"
44
45			#include "ohcireg.h"
46
47
48			/* Length is 0x1000 at least on Playstation 2 */
49			#define DEV_OHCI_LENGTH 0x1000
50
51
52			#define debug fatal
53
54
55			struct ohci_data {
56			int irq_nr;
57
58			int port1reset;
59			};
60
61
62			/*
63			* dev_ohci_access():
64			*/
65			int dev_ohci_access(struct cpu cpu, struct memory mem,
66			uint64_t relative_addr, unsigned char *data, size_t len,
67			int writeflag, void *extra)
68			{
69			struct ohci_data *d = extra;
70			uint64_t idata = 0, odata = 0;
71			char *name = NULL;
72
73	dpavlin	18	if (writeflag == MEM_WRITE)
74			idata = memory_readmax64(cpu, data, len);
75	dpavlin	4
76			switch (relative_addr) {
77			case OHCI_REVISION:
78			name = "REVISION";
79			if (writeflag == MEM_READ) {
80			odata = 0x10; /* Version 1.0. */
81			}
82			break;
83			case OHCI_COMMAND_STATUS:
84			name = "COMMAND_STATUS";
85			if (idata == 0x2) {
86			fatal("URK\n");
87			cpu_interrupt(cpu, d->irq_nr);
88			}
89			break;
90			case OHCI_INTERRUPT_STATUS:
91			name = "INTERRUPT_STATUS";
92			odata = OHCI_WDH;
93			break;
94			/*
95			* TODO: It now sleeps at tsleep(xfer, PRIBIO, "usbsyn", 0);
96			* in netbsd/src/sys/dev/usb/usbdi.c
97			*/
98			case OHCI_RH_DESCRIPTOR_A:
99			name = "RH_DESCRIPTOR_A";
100			odata = 2; /* Nr of ports */
101			break;
102			case OHCI_RH_STATUS:
103			name = "RH_STATUS";
104			/* TODO */
105			break;
106			case OHCI_RH_PORT_STATUS(1): /* First port */
107			name = "RH_PORT_STATUS(1)";
108			if (writeflag == MEM_READ) {
109			/* Status = low 16, Change = top 16 */
110			odata = 0x10101;
111			/* 0x0001 = connected
112			0x0100 = power */
113			if (d->port1reset)
114			odata \|= (0x10 << 16) \| 0x10;
115			} else {
116			/* 0x10 = UPS_C_PORT_RESET */
117			if (idata & 0x10)
118			d->port1reset = 1;
119			if (idata & 0x100000)
120			d->port1reset = 0;
121			}
122			break;
123			case OHCI_RH_PORT_STATUS(2): /* Second port */
124			name = "RH_PORT_STATUS(2)";
125			/* TODO */
126			odata = 0;
127			break;
128			default:
129			if (writeflag == MEM_READ) {
130			debug("[ ohci: read from addr 0x%x: 0x%llx ]\n",
131			(int)relative_addr, (long long)odata);
132			} else {
133			debug("[ ohci: write to addr 0x%x: 0x%llx ]\n",
134			(int)relative_addr, (long long)idata);
135			}
136			}
137
138			if (name != NULL) {
139			if (writeflag == MEM_READ)
140			debug("[ ohci: read from %s: 0x%llx ]\n",
141			name, (long long)odata);
142			else
143			debug("[ ohci: write to %s: 0x%llx ]\n",
144			name, (long long)idata);
145			}
146
147			if (writeflag == MEM_READ)
148			memory_writemax64(cpu, data, len, odata);
149
150			return 1;
151			}
152
153
154			/*
155			* devinit_ohci():
156			*/
157			int devinit_ohci(struct devinit *devinit)
158			{
159			struct ohci_data *d;
160
161			d = malloc(sizeof(struct ohci_data));
162			if (d == NULL) {
163			fprintf(stderr, "out of memory\n");
164			exit(1);
165			}
166			memset(d, 0, sizeof(struct ohci_data));
167			d->irq_nr = devinit->irq_nr;
168
169			memory_device_register(devinit->machine->memory,
170			devinit->name, devinit->addr,
171			DEV_OHCI_LENGTH, dev_ohci_access, d, MEM_DEFAULT, NULL);
172
173			return 1;
174			}
175