src/devices/dev_ns16550.c

/*
 *  Copyright (C) 2003-2007  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_ns16550.c,v 1.62 2007/06/15 19:57:33 debug Exp $
 *  
 *  COMMENT: NS16550 serial controller
 *
 *  TODO: Implement the FIFO.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "console.h"
#include "cpu.h"
#include "device.h"
#include "interrupt.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"

#include "comreg.h"


/*  #define debug fatal  */

#define TICK_SHIFT              14
#define DEV_NS16550_LENGTH      8

struct ns_data {
        int             addrmult;
        int             in_use;
        char            *name;
        int             console_handle;
        int             enable_fifo;

        struct interrupt irq;

        unsigned char   reg[DEV_NS16550_LENGTH];
        unsigned char   fcr;            /*  FIFO control register  */
        int             int_asserted;
        int             dlab;           /*  Divisor Latch Access bit  */
        int             divisor;

        int             databits;
        char            parity;
        const char      *stopbits;
};


DEVICE_TICK(ns16550)
{
        /*
         *  This function is called at regular intervals. An interrupt is
         *  asserted if there is a character available for reading, or if the
         *  transmitter slot is empty (i.e. the ns16550 is ready to transmit).
         */
        struct ns_data *d = extra;

        d->reg[com_iir] &= ~IIR_RXRDY;
        if (console_charavail(d->console_handle))
                d->reg[com_iir] |= IIR_RXRDY;

        /*
         *  If interrupts are enabled, and interrupts are pending, then
         *  cause a CPU interrupt.
         */

        if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) ||
            ((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
                d->reg[com_iir] &= ~IIR_NOPEND;
                if (d->reg[com_mcr] & MCR_IENABLE) {
                        INTERRUPT_ASSERT(d->irq);
                        d->int_asserted = 1;
                }
        } else {
                d->reg[com_iir] |= IIR_NOPEND;
                if (d->int_asserted)
                        INTERRUPT_DEASSERT(d->irq);
                d->int_asserted = 0;
        }
}


DEVICE_ACCESS(ns16550)
{
        uint64_t idata = 0, odata=0;
        size_t i;
        struct ns_data *d = extra;

        if (writeflag == MEM_WRITE)
                idata = memory_readmax64(cpu, data, len);

#if 0
        /*  The NS16550 should be accessed using byte read/writes:  */
        if (len != 1)
                fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
                    d->name, len, (long long)idata);
#endif

        /*
         *  Always ready to transmit:
         */
        d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE;
        d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS;

        d->reg[com_iir] &= ~0xf0;
        if (d->enable_fifo)
                d->reg[com_iir] |= ((d->fcr << 5) & 0xc0);

        d->reg[com_lsr] &= ~LSR_RXRDY;
        if (console_charavail(d->console_handle))
                d->reg[com_lsr] |= LSR_RXRDY;

        relative_addr /= d->addrmult;

        if (relative_addr >= DEV_NS16550_LENGTH) {
                fatal("[ ns16550 (%s): outside register space? relative_addr="
                    "0x%llx. bad addrmult? bad device length? ]\n", d->name,
                    (long long)relative_addr);
                return 0;
        }

        switch (relative_addr) {

        case com_data:  /*  data AND low byte of the divisor  */
                /*  Read/write of the Divisor value:  */
                if (d->dlab) {
                        /*  Write or read the low byte of the divisor:  */
                        if (writeflag == MEM_WRITE)
                                d->divisor = (d->divisor & 0xff00) | idata;
                        else
                                odata = d->divisor & 0xff;
                        break;
                }

                /*  Read/write of data:  */
                if (writeflag == MEM_WRITE) {
                        if (d->reg[com_mcr] & MCR_LOOPBACK)
                                console_makeavail(d->console_handle, idata);
                        else
                                console_putchar(d->console_handle, idata);
                        d->reg[com_iir] |= IIR_TXRDY;
                } else {
                        int x = console_readchar(d->console_handle);
                        odata = x < 0? 0 : x;
                }
                dev_ns16550_tick(cpu, d);
                break;

        case com_ier:   /*  interrupt enable AND high byte of the divisor  */
                /*  Read/write of the Divisor value:  */
                if (d->dlab) {
                        if (writeflag == MEM_WRITE) {
                                /*  Set the high byte of the divisor:  */
                                d->divisor = (d->divisor & 0xff) | (idata << 8);
                                debug("[ ns16550 (%s): speed set to %i bps ]\n",
                                    d->name, (int)(115200 / d->divisor));
                        } else
                                odata = d->divisor >> 8;
                        break;
                }

                /*  IER:  */
                if (writeflag == MEM_WRITE) {
                        /*  This is to supress Linux' behaviour  */
                        if (idata != 0)
                                debug("[ ns16550 (%s): write to ier: 0x%02x ]"
                                    "\n", d->name, (int)idata);

                        /*  Needed for NetBSD 2.0.x, but not 1.6.2?  */
                        if (!(d->reg[com_ier] & IER_ETXRDY)
                            && (idata & IER_ETXRDY))
                                d->reg[com_iir] |= IIR_TXRDY;

                        d->reg[com_ier] = idata;
                        dev_ns16550_tick(cpu, d);
                } else
                        odata = d->reg[com_ier];
                break;

        case com_iir:   /*  interrupt identification (r), fifo control (w)  */
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
                            "\n", d->name, (int)idata);
                        d->fcr = idata;
                } else {
                        odata = d->reg[com_iir];
                        if (d->reg[com_iir] & IIR_TXRDY)
                                d->reg[com_iir] &= ~IIR_TXRDY;
                        debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
                            d->name, (int)odata);
                        dev_ns16550_tick(cpu, d);
                }
                break;

        case com_lsr:
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
                            d->name, (int)idata);
                        d->reg[com_lsr] = idata;
                } else {
                        odata = d->reg[com_lsr];
                        /*  debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
                            d->name, (int)odata);  */
                }
                break;

        case com_msr:
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
                            d->name, (int)idata);
                        d->reg[com_msr] = idata;
                } else {
                        odata = d->reg[com_msr];
                        debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        case com_lctl:
                if (writeflag == MEM_WRITE) {
                        d->reg[com_lctl] = idata;
                        switch (idata & 0x7) {
                        case 0: d->databits = 5; d->stopbits = "1"; break;
                        case 1: d->databits = 6; d->stopbits = "1"; break;
                        case 2: d->databits = 7; d->stopbits = "1"; break;
                        case 3: d->databits = 8; d->stopbits = "1"; break;
                        case 4: d->databits = 5; d->stopbits = "1.5"; break;
                        case 5: d->databits = 6; d->stopbits = "2"; break;
                        case 6: d->databits = 7; d->stopbits = "2"; break;
                        case 7: d->databits = 8; d->stopbits = "2"; break;
                        }
                        switch ((idata & 0x38) / 0x8) {
                        case 0: d->parity = 'N'; break;         /*  none  */
                        case 1: d->parity = 'O'; break;         /*  odd  */
                        case 2: d->parity = '?'; break;
                        case 3: d->parity = 'E'; break;         /*  even  */
                        case 4: d->parity = '?'; break;
                        case 5: d->parity = 'Z'; break;         /*  zero  */
                        case 6: d->parity = '?'; break;
                        case 7: d->parity = 'o'; break;         /*  one  */
                        }

                        d->dlab = idata & 0x80? 1 : 0;

                        debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
                            "setting mode %i%c%s) ]\n", d->name, (int)idata,
                            d->dlab? "Divisor Latch access, " : "",
                            idata&0x40? "sending BREAK, " : "",
                            d->databits, d->parity, d->stopbits);
                } else {
                        odata = d->reg[com_lctl];
                        debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        case com_mcr:
                if (writeflag == MEM_WRITE) {
                        d->reg[com_mcr] = idata;
                        debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
                            d->name, (int)idata);
                        if (!(d->reg[com_iir] & IIR_TXRDY)
                            && (idata & MCR_IENABLE))
                                d->reg[com_iir] |= IIR_TXRDY;
                        dev_ns16550_tick(cpu, d);
                } else {
                        odata = d->reg[com_mcr];
                        debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        default:
                if (writeflag==MEM_READ) {
                        debug("[ ns16550 (%s): read from reg %i ]\n",
                            d->name, (int)relative_addr);
                        odata = d->reg[relative_addr];
                } else {
                        debug("[ ns16550 (%s): write to reg %i:",
                            d->name, (int)relative_addr);
                        for (i=0; i<len; i++)
                                debug(" %02x", data[i]);
                        debug(" ]\n");
                        d->reg[relative_addr] = idata;
                }
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


DEVINIT(ns16550)
{
        struct ns_data *d;
        size_t nlen;
        char *name;

        CHECK_ALLOCATION(d = malloc(sizeof(struct ns_data)));
        memset(d, 0, sizeof(struct ns_data));

        d->addrmult     = devinit->addr_mult;
        d->in_use       = devinit->in_use;
        d->enable_fifo  = 1;
        d->dlab         = 0;
        d->divisor      = 115200 / 9600;
        d->databits     = 8;
        d->parity       = 'N';
        d->stopbits     = "1";
        d->name         = devinit->name2 != NULL? devinit->name2 : "";
        d->console_handle =
            console_start_slave(devinit->machine, devinit->name2 != NULL?
            devinit->name2 : devinit->name, d->in_use);

        INTERRUPT_CONNECT(devinit->interrupt_path, d->irq);

        nlen = strlen(devinit->name) + 10;
        if (devinit->name2 != NULL)
                nlen += strlen(devinit->name2);
        CHECK_ALLOCATION(name = malloc(nlen));
        if (devinit->name2 != NULL && devinit->name2[0])
                snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
        else
                snprintf(name, nlen, "%s", devinit->name);

        memory_device_register(devinit->machine->memory, name, devinit->addr,
            DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
            DM_DEFAULT, NULL);
        machine_add_tickfunction(devinit->machine,
            dev_ns16550_tick, d, TICK_SHIFT);

        /*
         *  NOTE:  Ugly cast into a pointer, because this is a convenient way
         *         to return the console handle to code in src/machines/.
         */
        devinit->return_ptr = (void *)(size_t)d->console_handle;

        return 1;
}

1	dpavlin	4	/*
2	dpavlin	34	* Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3	dpavlin	4	*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	42	* $Id: dev_ns16550.c,v 1.62 2007/06/15 19:57:33 debug Exp $
29	dpavlin	4	*
30	dpavlin	42	* COMMENT: NS16550 serial controller
31	dpavlin	4	*
32	dpavlin	12	* TODO: Implement the FIFO.
33	dpavlin	4	*/
34
35			#include <stdio.h>
36			#include <stdlib.h>
37			#include <string.h>
38
39			#include "console.h"
40			#include "cpu.h"
41	dpavlin	12	#include "device.h"
42	dpavlin	34	#include "interrupt.h"
43	dpavlin	4	#include "machine.h"
44			#include "memory.h"
45			#include "misc.h"
46
47			#include "comreg.h"
48
49
50	dpavlin	12	/* #define debug fatal */
51	dpavlin	4
52	dpavlin	12	#define TICK_SHIFT 14
53			#define DEV_NS16550_LENGTH 8
54	dpavlin	4
55			struct ns_data {
56	dpavlin	12	int addrmult;
57			int in_use;
58	dpavlin	14	char *name;
59	dpavlin	4	int console_handle;
60	dpavlin	12	int enable_fifo;
61	dpavlin	4
62	dpavlin	34	struct interrupt irq;
63
64	dpavlin	12	unsigned char reg[DEV_NS16550_LENGTH];
65			unsigned char fcr; /* FIFO control register */
66	dpavlin	20	int int_asserted;
67	dpavlin	4	int dlab; /* Divisor Latch Access bit */
68			int divisor;
69	dpavlin	12
70	dpavlin	4	int databits;
71			char parity;
72			const char *stopbits;
73			};
74
75
76	dpavlin	32	DEVICE_TICK(ns16550)
77	dpavlin	4	{
78	dpavlin	32	/*
79			* This function is called at regular intervals. An interrupt is
80			* asserted if there is a character available for reading, or if the
81			* transmitter slot is empty (i.e. the ns16550 is ready to transmit).
82			*/
83	dpavlin	4	struct ns_data *d = extra;
84
85			d->reg[com_iir] &= ~IIR_RXRDY;
86	dpavlin	22	if (console_charavail(d->console_handle))
87	dpavlin	12	d->reg[com_iir] \|= IIR_RXRDY;
88	dpavlin	4
89	dpavlin	12	/*
90			* If interrupts are enabled, and interrupts are pending, then
91			* cause a CPU interrupt.
92			*/
93	dpavlin	24
94	dpavlin	12	if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) \|\|
95			((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
96	dpavlin	4	d->reg[com_iir] &= ~IIR_NOPEND;
97	dpavlin	20	if (d->reg[com_mcr] & MCR_IENABLE) {
98	dpavlin	34	INTERRUPT_ASSERT(d->irq);
99	dpavlin	20	d->int_asserted = 1;
100			}
101	dpavlin	12	} else {
102			d->reg[com_iir] \|= IIR_NOPEND;
103	dpavlin	20	if (d->int_asserted)
104	dpavlin	34	INTERRUPT_DEASSERT(d->irq);
105	dpavlin	20	d->int_asserted = 0;
106	dpavlin	4	}
107			}
108
109
110	dpavlin	22	DEVICE_ACCESS(ns16550)
111	dpavlin	4	{
112			uint64_t idata = 0, odata=0;
113	dpavlin	22	size_t i;
114	dpavlin	4	struct ns_data *d = extra;
115
116	dpavlin	18	if (writeflag == MEM_WRITE)
117			idata = memory_readmax64(cpu, data, len);
118	dpavlin	4
119	dpavlin	20	#if 0
120	dpavlin	12	/* The NS16550 should be accessed using byte read/writes: */
121			if (len != 1)
122	dpavlin	14	fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
123			d->name, len, (long long)idata);
124	dpavlin	20	#endif
125	dpavlin	12
126			/*
127			* Always ready to transmit:
128			*/
129	dpavlin	4	d->reg[com_lsr] \|= LSR_TXRDY \| LSR_TSRE;
130	dpavlin	12	d->reg[com_msr] \|= MSR_DCD \| MSR_DSR \| MSR_CTS;
131
132			d->reg[com_iir] &= ~0xf0;
133			if (d->enable_fifo)
134			d->reg[com_iir] \|= ((d->fcr << 5) & 0xc0);
135
136	dpavlin	4	d->reg[com_lsr] &= ~LSR_RXRDY;
137	dpavlin	22	if (console_charavail(d->console_handle))
138	dpavlin	12	d->reg[com_lsr] \|= LSR_RXRDY;
139	dpavlin	4
140	dpavlin	12	relative_addr /= d->addrmult;
141	dpavlin	4
142	dpavlin	12	if (relative_addr >= DEV_NS16550_LENGTH) {
143	dpavlin	14	fatal("[ ns16550 (%s): outside register space? relative_addr="
144			"0x%llx. bad addrmult? bad device length? ]\n", d->name,
145	dpavlin	12	(long long)relative_addr);
146			return 0;
147	dpavlin	4	}
148
149	dpavlin	12	switch (relative_addr) {
150	dpavlin	4
151	dpavlin	12	case com_data: /* data AND low byte of the divisor */
152	dpavlin	4	/* Read/write of the Divisor value: */
153			if (d->dlab) {
154	dpavlin	12	/* Write or read the low byte of the divisor: */
155			if (writeflag == MEM_WRITE)
156			d->divisor = (d->divisor & 0xff00) \| idata;
157			else
158	dpavlin	4	odata = d->divisor & 0xff;
159			break;
160			}
161
162	dpavlin	12	/* Read/write of data: */
163	dpavlin	4	if (writeflag == MEM_WRITE) {
164	dpavlin	22	if (d->reg[com_mcr] & MCR_LOOPBACK)
165	dpavlin	4	console_makeavail(d->console_handle, idata);
166	dpavlin	22	else
167	dpavlin	4	console_putchar(d->console_handle, idata);
168			d->reg[com_iir] \|= IIR_TXRDY;
169			} else {
170	dpavlin	22	int x = console_readchar(d->console_handle);
171			odata = x < 0? 0 : x;
172	dpavlin	4	}
173	dpavlin	12	dev_ns16550_tick(cpu, d);
174	dpavlin	4	break;
175	dpavlin	12
176	dpavlin	4	case com_ier: /* interrupt enable AND high byte of the divisor */
177			/* Read/write of the Divisor value: */
178			if (d->dlab) {
179			if (writeflag == MEM_WRITE) {
180			/* Set the high byte of the divisor: */
181	dpavlin	12	d->divisor = (d->divisor & 0xff) \| (idata << 8);
182	dpavlin	14	debug("[ ns16550 (%s): speed set to %i bps ]\n",
183			d->name, (int)(115200 / d->divisor));
184	dpavlin	12	} else
185			odata = d->divisor >> 8;
186	dpavlin	4	break;
187			}
188
189			/* IER: */
190			if (writeflag == MEM_WRITE) {
191			/* This is to supress Linux' behaviour */
192			if (idata != 0)
193	dpavlin	14	debug("[ ns16550 (%s): write to ier: 0x%02x ]"
194			"\n", d->name, (int)idata);
195	dpavlin	4
196	dpavlin	12	/* Needed for NetBSD 2.0.x, but not 1.6.2? */
197			if (!(d->reg[com_ier] & IER_ETXRDY)
198	dpavlin	4	&& (idata & IER_ETXRDY))
199			d->reg[com_iir] \|= IIR_TXRDY;
200
201	dpavlin	12	d->reg[com_ier] = idata;
202	dpavlin	4	dev_ns16550_tick(cpu, d);
203	dpavlin	12	} else
204			odata = d->reg[com_ier];
205	dpavlin	4	break;
206	dpavlin	12
207	dpavlin	4	case com_iir: /* interrupt identification (r), fifo control (w) */
208			if (writeflag == MEM_WRITE) {
209	dpavlin	14	debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
210			"\n", d->name, (int)idata);
211	dpavlin	12	d->fcr = idata;
212	dpavlin	4	} else {
213	dpavlin	12	odata = d->reg[com_iir];
214	dpavlin	24	if (d->reg[com_iir] & IIR_TXRDY)
215			d->reg[com_iir] &= ~IIR_TXRDY;
216	dpavlin	14	debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
217			d->name, (int)odata);
218	dpavlin	4	dev_ns16550_tick(cpu, d);
219			}
220			break;
221	dpavlin	12
222	dpavlin	4	case com_lsr:
223			if (writeflag == MEM_WRITE) {
224	dpavlin	14	debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
225			d->name, (int)idata);
226	dpavlin	12	d->reg[com_lsr] = idata;
227	dpavlin	4	} else {
228	dpavlin	12	odata = d->reg[com_lsr];
229	dpavlin	14	/* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
230			d->name, (int)odata); */
231	dpavlin	4	}
232			break;
233	dpavlin	12
234	dpavlin	4	case com_msr:
235			if (writeflag == MEM_WRITE) {
236	dpavlin	14	debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
237			d->name, (int)idata);
238	dpavlin	12	d->reg[com_msr] = idata;
239	dpavlin	4	} else {
240	dpavlin	12	odata = d->reg[com_msr];
241	dpavlin	14	debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
242			d->name, (int)odata);
243	dpavlin	4	}
244			break;
245	dpavlin	12
246	dpavlin	4	case com_lctl:
247			if (writeflag == MEM_WRITE) {
248	dpavlin	12	d->reg[com_lctl] = idata;
249	dpavlin	4	switch (idata & 0x7) {
250			case 0: d->databits = 5; d->stopbits = "1"; break;
251			case 1: d->databits = 6; d->stopbits = "1"; break;
252			case 2: d->databits = 7; d->stopbits = "1"; break;
253			case 3: d->databits = 8; d->stopbits = "1"; break;
254			case 4: d->databits = 5; d->stopbits = "1.5"; break;
255			case 5: d->databits = 6; d->stopbits = "2"; break;
256			case 6: d->databits = 7; d->stopbits = "2"; break;
257			case 7: d->databits = 8; d->stopbits = "2"; break;
258			}
259			switch ((idata & 0x38) / 0x8) {
260			case 0: d->parity = 'N'; break; /* none */
261			case 1: d->parity = 'O'; break; /* odd */
262			case 2: d->parity = '?'; break;
263			case 3: d->parity = 'E'; break; /* even */
264			case 4: d->parity = '?'; break;
265			case 5: d->parity = 'Z'; break; /* zero */
266			case 6: d->parity = '?'; break;
267			case 7: d->parity = 'o'; break; /* one */
268			}
269
270			d->dlab = idata & 0x80? 1 : 0;
271
272	dpavlin	14	debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
273			"setting mode %i%c%s) ]\n", d->name, (int)idata,
274	dpavlin	4	d->dlab? "Divisor Latch access, " : "",
275			idata&0x40? "sending BREAK, " : "",
276			d->databits, d->parity, d->stopbits);
277			} else {
278	dpavlin	12	odata = d->reg[com_lctl];
279	dpavlin	14	debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
280			d->name, (int)odata);
281	dpavlin	4	}
282			break;
283	dpavlin	12
284	dpavlin	4	case com_mcr:
285			if (writeflag == MEM_WRITE) {
286	dpavlin	12	d->reg[com_mcr] = idata;
287	dpavlin	14	debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
288			d->name, (int)idata);
289	dpavlin	24	if (!(d->reg[com_iir] & IIR_TXRDY)
290			&& (idata & MCR_IENABLE))
291			d->reg[com_iir] \|= IIR_TXRDY;
292			dev_ns16550_tick(cpu, d);
293	dpavlin	4	} else {
294	dpavlin	12	odata = d->reg[com_mcr];
295	dpavlin	14	debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
296			d->name, (int)odata);
297	dpavlin	4	}
298			break;
299	dpavlin	12
300	dpavlin	4	default:
301			if (writeflag==MEM_READ) {
302	dpavlin	14	debug("[ ns16550 (%s): read from reg %i ]\n",
303			d->name, (int)relative_addr);
304	dpavlin	4	odata = d->reg[relative_addr];
305			} else {
306	dpavlin	14	debug("[ ns16550 (%s): write to reg %i:",
307			d->name, (int)relative_addr);
308	dpavlin	4	for (i=0; i<len; i++)
309			debug(" %02x", data[i]);
310			debug(" ]\n");
311			d->reg[relative_addr] = idata;
312			}
313			}
314
315			if (writeflag == MEM_READ)
316			memory_writemax64(cpu, data, len, odata);
317
318			return 1;
319			}
320
321
322	dpavlin	22	DEVINIT(ns16550)
323	dpavlin	4	{
324	dpavlin	42	struct ns_data *d;
325	dpavlin	10	size_t nlen;
326	dpavlin	12	char *name;
327	dpavlin	4
328	dpavlin	42	CHECK_ALLOCATION(d = malloc(sizeof(struct ns_data)));
329	dpavlin	4	memset(d, 0, sizeof(struct ns_data));
330	dpavlin	34
331	dpavlin	14	d->addrmult = devinit->addr_mult;
332			d->in_use = devinit->in_use;
333			d->enable_fifo = 1;
334			d->dlab = 0;
335			d->divisor = 115200 / 9600;
336			d->databits = 8;
337			d->parity = 'N';
338			d->stopbits = "1";
339			d->name = devinit->name2 != NULL? devinit->name2 : "";
340	dpavlin	12	d->console_handle =
341	dpavlin	22	console_start_slave(devinit->machine, devinit->name2 != NULL?
342			devinit->name2 : devinit->name, d->in_use);
343	dpavlin	4
344	dpavlin	34	INTERRUPT_CONNECT(devinit->interrupt_path, d->irq);
345
346	dpavlin	12	nlen = strlen(devinit->name) + 10;
347			if (devinit->name2 != NULL)
348			nlen += strlen(devinit->name2);
349	dpavlin	42	CHECK_ALLOCATION(name = malloc(nlen));
350	dpavlin	12	if (devinit->name2 != NULL && devinit->name2[0])
351			snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
352	dpavlin	4	else
353	dpavlin	12	snprintf(name, nlen, "%s", devinit->name);
354	dpavlin	4
355	dpavlin	12	memory_device_register(devinit->machine->memory, name, devinit->addr,
356			DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
357	dpavlin	20	DM_DEFAULT, NULL);
358	dpavlin	12	machine_add_tickfunction(devinit->machine,
359	dpavlin	42	dev_ns16550_tick, d, TICK_SHIFT);
360	dpavlin	4
361	dpavlin	12	/*
362			* NOTE: Ugly cast into a pointer, because this is a convenient way
363	dpavlin	42	* to return the console handle to code in src/machines/.
364	dpavlin	12	*/
365			devinit->return_ptr = (void *)(size_t)d->console_handle;
366
367			return 1;
368	dpavlin	4	}
369