/[gxemul]/trunk/src/devices/dev_ns16550.c
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Contents of /trunk/src/devices/dev_ns16550.c

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Revision 42 - (show annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 10394 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============
1 /*
2 * Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_ns16550.c,v 1.62 2007/06/15 19:57:33 debug Exp $
29 *
30 * COMMENT: NS16550 serial controller
31 *
32 * TODO: Implement the FIFO.
33 */
34
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38
39 #include "console.h"
40 #include "cpu.h"
41 #include "device.h"
42 #include "interrupt.h"
43 #include "machine.h"
44 #include "memory.h"
45 #include "misc.h"
46
47 #include "comreg.h"
48
49
50 /* #define debug fatal */
51
52 #define TICK_SHIFT 14
53 #define DEV_NS16550_LENGTH 8
54
55 struct ns_data {
56 int addrmult;
57 int in_use;
58 char *name;
59 int console_handle;
60 int enable_fifo;
61
62 struct interrupt irq;
63
64 unsigned char reg[DEV_NS16550_LENGTH];
65 unsigned char fcr; /* FIFO control register */
66 int int_asserted;
67 int dlab; /* Divisor Latch Access bit */
68 int divisor;
69
70 int databits;
71 char parity;
72 const char *stopbits;
73 };
74
75
76 DEVICE_TICK(ns16550)
77 {
78 /*
79 * This function is called at regular intervals. An interrupt is
80 * asserted if there is a character available for reading, or if the
81 * transmitter slot is empty (i.e. the ns16550 is ready to transmit).
82 */
83 struct ns_data *d = extra;
84
85 d->reg[com_iir] &= ~IIR_RXRDY;
86 if (console_charavail(d->console_handle))
87 d->reg[com_iir] |= IIR_RXRDY;
88
89 /*
90 * If interrupts are enabled, and interrupts are pending, then
91 * cause a CPU interrupt.
92 */
93
94 if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) ||
95 ((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
96 d->reg[com_iir] &= ~IIR_NOPEND;
97 if (d->reg[com_mcr] & MCR_IENABLE) {
98 INTERRUPT_ASSERT(d->irq);
99 d->int_asserted = 1;
100 }
101 } else {
102 d->reg[com_iir] |= IIR_NOPEND;
103 if (d->int_asserted)
104 INTERRUPT_DEASSERT(d->irq);
105 d->int_asserted = 0;
106 }
107 }
108
109
110 DEVICE_ACCESS(ns16550)
111 {
112 uint64_t idata = 0, odata=0;
113 size_t i;
114 struct ns_data *d = extra;
115
116 if (writeflag == MEM_WRITE)
117 idata = memory_readmax64(cpu, data, len);
118
119 #if 0
120 /* The NS16550 should be accessed using byte read/writes: */
121 if (len != 1)
122 fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
123 d->name, len, (long long)idata);
124 #endif
125
126 /*
127 * Always ready to transmit:
128 */
129 d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE;
130 d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS;
131
132 d->reg[com_iir] &= ~0xf0;
133 if (d->enable_fifo)
134 d->reg[com_iir] |= ((d->fcr << 5) & 0xc0);
135
136 d->reg[com_lsr] &= ~LSR_RXRDY;
137 if (console_charavail(d->console_handle))
138 d->reg[com_lsr] |= LSR_RXRDY;
139
140 relative_addr /= d->addrmult;
141
142 if (relative_addr >= DEV_NS16550_LENGTH) {
143 fatal("[ ns16550 (%s): outside register space? relative_addr="
144 "0x%llx. bad addrmult? bad device length? ]\n", d->name,
145 (long long)relative_addr);
146 return 0;
147 }
148
149 switch (relative_addr) {
150
151 case com_data: /* data AND low byte of the divisor */
152 /* Read/write of the Divisor value: */
153 if (d->dlab) {
154 /* Write or read the low byte of the divisor: */
155 if (writeflag == MEM_WRITE)
156 d->divisor = (d->divisor & 0xff00) | idata;
157 else
158 odata = d->divisor & 0xff;
159 break;
160 }
161
162 /* Read/write of data: */
163 if (writeflag == MEM_WRITE) {
164 if (d->reg[com_mcr] & MCR_LOOPBACK)
165 console_makeavail(d->console_handle, idata);
166 else
167 console_putchar(d->console_handle, idata);
168 d->reg[com_iir] |= IIR_TXRDY;
169 } else {
170 int x = console_readchar(d->console_handle);
171 odata = x < 0? 0 : x;
172 }
173 dev_ns16550_tick(cpu, d);
174 break;
175
176 case com_ier: /* interrupt enable AND high byte of the divisor */
177 /* Read/write of the Divisor value: */
178 if (d->dlab) {
179 if (writeflag == MEM_WRITE) {
180 /* Set the high byte of the divisor: */
181 d->divisor = (d->divisor & 0xff) | (idata << 8);
182 debug("[ ns16550 (%s): speed set to %i bps ]\n",
183 d->name, (int)(115200 / d->divisor));
184 } else
185 odata = d->divisor >> 8;
186 break;
187 }
188
189 /* IER: */
190 if (writeflag == MEM_WRITE) {
191 /* This is to supress Linux' behaviour */
192 if (idata != 0)
193 debug("[ ns16550 (%s): write to ier: 0x%02x ]"
194 "\n", d->name, (int)idata);
195
196 /* Needed for NetBSD 2.0.x, but not 1.6.2? */
197 if (!(d->reg[com_ier] & IER_ETXRDY)
198 && (idata & IER_ETXRDY))
199 d->reg[com_iir] |= IIR_TXRDY;
200
201 d->reg[com_ier] = idata;
202 dev_ns16550_tick(cpu, d);
203 } else
204 odata = d->reg[com_ier];
205 break;
206
207 case com_iir: /* interrupt identification (r), fifo control (w) */
208 if (writeflag == MEM_WRITE) {
209 debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
210 "\n", d->name, (int)idata);
211 d->fcr = idata;
212 } else {
213 odata = d->reg[com_iir];
214 if (d->reg[com_iir] & IIR_TXRDY)
215 d->reg[com_iir] &= ~IIR_TXRDY;
216 debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
217 d->name, (int)odata);
218 dev_ns16550_tick(cpu, d);
219 }
220 break;
221
222 case com_lsr:
223 if (writeflag == MEM_WRITE) {
224 debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
225 d->name, (int)idata);
226 d->reg[com_lsr] = idata;
227 } else {
228 odata = d->reg[com_lsr];
229 /* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
230 d->name, (int)odata); */
231 }
232 break;
233
234 case com_msr:
235 if (writeflag == MEM_WRITE) {
236 debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
237 d->name, (int)idata);
238 d->reg[com_msr] = idata;
239 } else {
240 odata = d->reg[com_msr];
241 debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
242 d->name, (int)odata);
243 }
244 break;
245
246 case com_lctl:
247 if (writeflag == MEM_WRITE) {
248 d->reg[com_lctl] = idata;
249 switch (idata & 0x7) {
250 case 0: d->databits = 5; d->stopbits = "1"; break;
251 case 1: d->databits = 6; d->stopbits = "1"; break;
252 case 2: d->databits = 7; d->stopbits = "1"; break;
253 case 3: d->databits = 8; d->stopbits = "1"; break;
254 case 4: d->databits = 5; d->stopbits = "1.5"; break;
255 case 5: d->databits = 6; d->stopbits = "2"; break;
256 case 6: d->databits = 7; d->stopbits = "2"; break;
257 case 7: d->databits = 8; d->stopbits = "2"; break;
258 }
259 switch ((idata & 0x38) / 0x8) {
260 case 0: d->parity = 'N'; break; /* none */
261 case 1: d->parity = 'O'; break; /* odd */
262 case 2: d->parity = '?'; break;
263 case 3: d->parity = 'E'; break; /* even */
264 case 4: d->parity = '?'; break;
265 case 5: d->parity = 'Z'; break; /* zero */
266 case 6: d->parity = '?'; break;
267 case 7: d->parity = 'o'; break; /* one */
268 }
269
270 d->dlab = idata & 0x80? 1 : 0;
271
272 debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
273 "setting mode %i%c%s) ]\n", d->name, (int)idata,
274 d->dlab? "Divisor Latch access, " : "",
275 idata&0x40? "sending BREAK, " : "",
276 d->databits, d->parity, d->stopbits);
277 } else {
278 odata = d->reg[com_lctl];
279 debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
280 d->name, (int)odata);
281 }
282 break;
283
284 case com_mcr:
285 if (writeflag == MEM_WRITE) {
286 d->reg[com_mcr] = idata;
287 debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
288 d->name, (int)idata);
289 if (!(d->reg[com_iir] & IIR_TXRDY)
290 && (idata & MCR_IENABLE))
291 d->reg[com_iir] |= IIR_TXRDY;
292 dev_ns16550_tick(cpu, d);
293 } else {
294 odata = d->reg[com_mcr];
295 debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
296 d->name, (int)odata);
297 }
298 break;
299
300 default:
301 if (writeflag==MEM_READ) {
302 debug("[ ns16550 (%s): read from reg %i ]\n",
303 d->name, (int)relative_addr);
304 odata = d->reg[relative_addr];
305 } else {
306 debug("[ ns16550 (%s): write to reg %i:",
307 d->name, (int)relative_addr);
308 for (i=0; i<len; i++)
309 debug(" %02x", data[i]);
310 debug(" ]\n");
311 d->reg[relative_addr] = idata;
312 }
313 }
314
315 if (writeflag == MEM_READ)
316 memory_writemax64(cpu, data, len, odata);
317
318 return 1;
319 }
320
321
322 DEVINIT(ns16550)
323 {
324 struct ns_data *d;
325 size_t nlen;
326 char *name;
327
328 CHECK_ALLOCATION(d = malloc(sizeof(struct ns_data)));
329 memset(d, 0, sizeof(struct ns_data));
330
331 d->addrmult = devinit->addr_mult;
332 d->in_use = devinit->in_use;
333 d->enable_fifo = 1;
334 d->dlab = 0;
335 d->divisor = 115200 / 9600;
336 d->databits = 8;
337 d->parity = 'N';
338 d->stopbits = "1";
339 d->name = devinit->name2 != NULL? devinit->name2 : "";
340 d->console_handle =
341 console_start_slave(devinit->machine, devinit->name2 != NULL?
342 devinit->name2 : devinit->name, d->in_use);
343
344 INTERRUPT_CONNECT(devinit->interrupt_path, d->irq);
345
346 nlen = strlen(devinit->name) + 10;
347 if (devinit->name2 != NULL)
348 nlen += strlen(devinit->name2);
349 CHECK_ALLOCATION(name = malloc(nlen));
350 if (devinit->name2 != NULL && devinit->name2[0])
351 snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
352 else
353 snprintf(name, nlen, "%s", devinit->name);
354
355 memory_device_register(devinit->machine->memory, name, devinit->addr,
356 DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
357 DM_DEFAULT, NULL);
358 machine_add_tickfunction(devinit->machine,
359 dev_ns16550_tick, d, TICK_SHIFT);
360
361 /*
362 * NOTE: Ugly cast into a pointer, because this is a convenient way
363 * to return the console handle to code in src/machines/.
364 */
365 devinit->return_ptr = (void *)(size_t)d->console_handle;
366
367 return 1;
368 }
369
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