/[gxemul]/trunk/src/devices/dev_ns16550.c
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Contents of /trunk/src/devices/dev_ns16550.c

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Revision 22 - (show annotations)
Mon Oct 8 16:19:37 2007 UTC (16 years, 6 months ago) by dpavlin
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File size: 10331 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 /*
2 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_ns16550.c,v 1.51 2006/02/18 13:42:39 debug Exp $
29 *
30 * NS16550 serial controller.
31 *
32 *
33 * TODO: Implement the FIFO.
34 */
35
36 #include <stdio.h>
37 #include <stdlib.h>
38 #include <string.h>
39
40 #include "console.h"
41 #include "cpu.h"
42 #include "device.h"
43 #include "machine.h"
44 #include "memory.h"
45 #include "misc.h"
46
47 #include "comreg.h"
48
49
50 /* #define debug fatal */
51
52 #define TICK_SHIFT 14
53 #define DEV_NS16550_LENGTH 8
54
55 struct ns_data {
56 int addrmult;
57 int in_use;
58 int irqnr;
59 char *name;
60 int console_handle;
61 int enable_fifo;
62
63 unsigned char reg[DEV_NS16550_LENGTH];
64 unsigned char fcr; /* FIFO control register */
65 int int_asserted;
66 int dlab; /* Divisor Latch Access bit */
67 int divisor;
68
69 int databits;
70 char parity;
71 const char *stopbits;
72 };
73
74
75 /*
76 * dev_ns16550_tick():
77 *
78 * This function is called at regular intervals. An interrupt is caused to the
79 * CPU if there is a character available for reading, or if the transmitter
80 * slot is empty (i.e. the ns16550 is ready to transmit).
81 */
82 void dev_ns16550_tick(struct cpu *cpu, void *extra)
83 {
84 struct ns_data *d = extra;
85
86 d->reg[com_iir] &= ~IIR_RXRDY;
87 if (console_charavail(d->console_handle))
88 d->reg[com_iir] |= IIR_RXRDY;
89
90 /*
91 * If interrupts are enabled, and interrupts are pending, then
92 * cause a CPU interrupt.
93 */
94 if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) ||
95 ((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
96 d->reg[com_iir] &= ~IIR_NOPEND;
97 if (d->reg[com_mcr] & MCR_IENABLE) {
98 cpu_interrupt(cpu, d->irqnr);
99 d->int_asserted = 1;
100 }
101 } else {
102 d->reg[com_iir] |= IIR_NOPEND;
103 if (d->int_asserted)
104 cpu_interrupt_ack(cpu, d->irqnr);
105 d->int_asserted = 0;
106 }
107 }
108
109
110 /*
111 * dev_ns16550_access():
112 */
113 DEVICE_ACCESS(ns16550)
114 {
115 uint64_t idata = 0, odata=0;
116 size_t i;
117 struct ns_data *d = extra;
118
119 if (writeflag == MEM_WRITE)
120 idata = memory_readmax64(cpu, data, len);
121
122 #if 0
123 /* The NS16550 should be accessed using byte read/writes: */
124 if (len != 1)
125 fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
126 d->name, len, (long long)idata);
127 #endif
128
129 /*
130 * Always ready to transmit:
131 */
132 d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE;
133 d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS;
134
135 d->reg[com_iir] &= ~0xf0;
136 if (d->enable_fifo)
137 d->reg[com_iir] |= ((d->fcr << 5) & 0xc0);
138
139 d->reg[com_lsr] &= ~LSR_RXRDY;
140 if (console_charavail(d->console_handle))
141 d->reg[com_lsr] |= LSR_RXRDY;
142
143 relative_addr /= d->addrmult;
144
145 if (relative_addr >= DEV_NS16550_LENGTH) {
146 fatal("[ ns16550 (%s): outside register space? relative_addr="
147 "0x%llx. bad addrmult? bad device length? ]\n", d->name,
148 (long long)relative_addr);
149 return 0;
150 }
151
152 switch (relative_addr) {
153
154 case com_data: /* data AND low byte of the divisor */
155 /* Read/write of the Divisor value: */
156 if (d->dlab) {
157 /* Write or read the low byte of the divisor: */
158 if (writeflag == MEM_WRITE)
159 d->divisor = (d->divisor & 0xff00) | idata;
160 else
161 odata = d->divisor & 0xff;
162 break;
163 }
164
165 /* Read/write of data: */
166 if (writeflag == MEM_WRITE) {
167 if (d->reg[com_mcr] & MCR_LOOPBACK)
168 console_makeavail(d->console_handle, idata);
169 else
170 console_putchar(d->console_handle, idata);
171 d->reg[com_iir] |= IIR_TXRDY;
172 } else {
173 int x = console_readchar(d->console_handle);
174 odata = x < 0? 0 : x;
175 }
176 dev_ns16550_tick(cpu, d);
177 break;
178
179 case com_ier: /* interrupt enable AND high byte of the divisor */
180 /* Read/write of the Divisor value: */
181 if (d->dlab) {
182 if (writeflag == MEM_WRITE) {
183 /* Set the high byte of the divisor: */
184 d->divisor = (d->divisor & 0xff) | (idata << 8);
185 debug("[ ns16550 (%s): speed set to %i bps ]\n",
186 d->name, (int)(115200 / d->divisor));
187 } else
188 odata = d->divisor >> 8;
189 break;
190 }
191
192 /* IER: */
193 if (writeflag == MEM_WRITE) {
194 /* This is to supress Linux' behaviour */
195 if (idata != 0)
196 debug("[ ns16550 (%s): write to ier: 0x%02x ]"
197 "\n", d->name, (int)idata);
198
199 /* Needed for NetBSD 2.0.x, but not 1.6.2? */
200 if (!(d->reg[com_ier] & IER_ETXRDY)
201 && (idata & IER_ETXRDY))
202 d->reg[com_iir] |= IIR_TXRDY;
203
204 d->reg[com_ier] = idata;
205 dev_ns16550_tick(cpu, d);
206 } else
207 odata = d->reg[com_ier];
208 break;
209
210 case com_iir: /* interrupt identification (r), fifo control (w) */
211 if (writeflag == MEM_WRITE) {
212 debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
213 "\n", d->name, (int)idata);
214 d->fcr = idata;
215 } else {
216 odata = d->reg[com_iir];
217 debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
218 d->name, (int)odata);
219 dev_ns16550_tick(cpu, d);
220 }
221 break;
222
223 case com_lsr:
224 if (writeflag == MEM_WRITE) {
225 debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
226 d->name, (int)idata);
227 d->reg[com_lsr] = idata;
228 } else {
229 odata = d->reg[com_lsr];
230 /* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
231 d->name, (int)odata); */
232 }
233 break;
234
235 case com_msr:
236 if (writeflag == MEM_WRITE) {
237 debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
238 d->name, (int)idata);
239 d->reg[com_msr] = idata;
240 } else {
241 odata = d->reg[com_msr];
242 debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
243 d->name, (int)odata);
244 }
245 break;
246
247 case com_lctl:
248 if (writeflag == MEM_WRITE) {
249 d->reg[com_lctl] = idata;
250 switch (idata & 0x7) {
251 case 0: d->databits = 5; d->stopbits = "1"; break;
252 case 1: d->databits = 6; d->stopbits = "1"; break;
253 case 2: d->databits = 7; d->stopbits = "1"; break;
254 case 3: d->databits = 8; d->stopbits = "1"; break;
255 case 4: d->databits = 5; d->stopbits = "1.5"; break;
256 case 5: d->databits = 6; d->stopbits = "2"; break;
257 case 6: d->databits = 7; d->stopbits = "2"; break;
258 case 7: d->databits = 8; d->stopbits = "2"; break;
259 }
260 switch ((idata & 0x38) / 0x8) {
261 case 0: d->parity = 'N'; break; /* none */
262 case 1: d->parity = 'O'; break; /* odd */
263 case 2: d->parity = '?'; break;
264 case 3: d->parity = 'E'; break; /* even */
265 case 4: d->parity = '?'; break;
266 case 5: d->parity = 'Z'; break; /* zero */
267 case 6: d->parity = '?'; break;
268 case 7: d->parity = 'o'; break; /* one */
269 }
270
271 d->dlab = idata & 0x80? 1 : 0;
272
273 debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
274 "setting mode %i%c%s) ]\n", d->name, (int)idata,
275 d->dlab? "Divisor Latch access, " : "",
276 idata&0x40? "sending BREAK, " : "",
277 d->databits, d->parity, d->stopbits);
278 } else {
279 odata = d->reg[com_lctl];
280 debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
281 d->name, (int)odata);
282 }
283 break;
284
285 case com_mcr:
286 if (writeflag == MEM_WRITE) {
287 d->reg[com_mcr] = idata;
288 debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
289 d->name, (int)idata);
290 } else {
291 odata = d->reg[com_mcr];
292 debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
293 d->name, (int)odata);
294 }
295 break;
296
297 default:
298 if (writeflag==MEM_READ) {
299 debug("[ ns16550 (%s): read from reg %i ]\n",
300 d->name, (int)relative_addr);
301 odata = d->reg[relative_addr];
302 } else {
303 debug("[ ns16550 (%s): write to reg %i:",
304 d->name, (int)relative_addr);
305 for (i=0; i<len; i++)
306 debug(" %02x", data[i]);
307 debug(" ]\n");
308 d->reg[relative_addr] = idata;
309 }
310 }
311
312 if (writeflag == MEM_READ)
313 memory_writemax64(cpu, data, len, odata);
314
315 return 1;
316 }
317
318
319 DEVINIT(ns16550)
320 {
321 struct ns_data *d = malloc(sizeof(struct ns_data));
322 size_t nlen;
323 char *name;
324
325 if (d == NULL) {
326 fprintf(stderr, "out of memory\n");
327 exit(1);
328 }
329 memset(d, 0, sizeof(struct ns_data));
330 d->irqnr = devinit->irq_nr;
331 d->addrmult = devinit->addr_mult;
332 d->in_use = devinit->in_use;
333 d->enable_fifo = 1;
334 d->dlab = 0;
335 d->divisor = 115200 / 9600;
336 d->databits = 8;
337 d->parity = 'N';
338 d->stopbits = "1";
339 d->name = devinit->name2 != NULL? devinit->name2 : "";
340 d->console_handle =
341 console_start_slave(devinit->machine, devinit->name2 != NULL?
342 devinit->name2 : devinit->name, d->in_use);
343
344 nlen = strlen(devinit->name) + 10;
345 if (devinit->name2 != NULL)
346 nlen += strlen(devinit->name2);
347 name = malloc(nlen);
348 if (name == NULL) {
349 fprintf(stderr, "out of memory\n");
350 exit(1);
351 }
352 if (devinit->name2 != NULL && devinit->name2[0])
353 snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
354 else
355 snprintf(name, nlen, "%s", devinit->name);
356
357 memory_device_register(devinit->machine->memory, name, devinit->addr,
358 DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
359 DM_DEFAULT, NULL);
360 machine_add_tickfunction(devinit->machine,
361 dev_ns16550_tick, d, TICK_SHIFT);
362
363 /*
364 * NOTE: Ugly cast into a pointer, because this is a convenient way
365 * to return the console handle to code in src/machine.c.
366 */
367 devinit->return_ptr = (void *)(size_t)d->console_handle;
368
369 return 1;
370 }
371

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