src/devices/dev_ns16550.c

/*
 *  Copyright (C) 2003-2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_ns16550.c,v 1.46 2005/11/23 18:16:42 debug Exp $
 *  
 *  NS16550 serial controller.
 *
 *
 *  TODO: Implement the FIFO.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "console.h"
#include "cpu.h"
#include "device.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"

#include "comreg.h"


/*  #define debug fatal  */

#define TICK_SHIFT              14
#define DEV_NS16550_LENGTH      8

struct ns_data {
        int             addrmult;
        int             in_use;
        int             irqnr;
        char            *name;
        int             console_handle;
        int             enable_fifo;

        unsigned char   reg[DEV_NS16550_LENGTH];
        unsigned char   fcr;            /*  FIFO control register  */
        int             int_asserted;
        int             dlab;           /*  Divisor Latch Access bit  */
        int             divisor;

        int             databits;
        char            parity;
        const char      *stopbits;
};


/*
 *  dev_ns16550_tick():
 *
 *  This function is called at regular intervals. An interrupt is caused to the
 *  CPU if there is a character available for reading, or if the transmitter
 *  slot is empty (i.e. the ns16550 is ready to transmit).
 */
void dev_ns16550_tick(struct cpu *cpu, void *extra)
{
        struct ns_data *d = extra;

        d->reg[com_iir] &= ~IIR_RXRDY;
        if (d->in_use && console_charavail(d->console_handle))
                d->reg[com_iir] |= IIR_RXRDY;

        /*
         *  If interrupts are enabled, and interrupts are pending, then
         *  cause a CPU interrupt.
         */
        if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) ||
            ((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
                d->reg[com_iir] &= ~IIR_NOPEND;
                if (d->reg[com_mcr] & MCR_IENABLE) {
                        cpu_interrupt(cpu, d->irqnr);
                        d->int_asserted = 1;
                }
        } else {
                d->reg[com_iir] |= IIR_NOPEND;
                if (d->int_asserted)
                        cpu_interrupt_ack(cpu, d->irqnr);
                d->int_asserted = 0;
        }
}


/*
 *  dev_ns16550_access():
 */
int dev_ns16550_access(struct cpu *cpu, struct memory *mem,
        uint64_t relative_addr, unsigned char *data, size_t len,
        int writeflag, void *extra)
{
        uint64_t idata = 0, odata=0;
        int i;
        struct ns_data *d = extra;

        if (writeflag == MEM_WRITE)
                idata = memory_readmax64(cpu, data, len);

#if 0
        /*  The NS16550 should be accessed using byte read/writes:  */
        if (len != 1)
                fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
                    d->name, len, (long long)idata);
#endif

        /*
         *  Always ready to transmit:
         */
        d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE;
        d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS;

        d->reg[com_iir] &= ~0xf0;
        if (d->enable_fifo)
                d->reg[com_iir] |= ((d->fcr << 5) & 0xc0);

        d->reg[com_lsr] &= ~LSR_RXRDY;
        if (d->in_use && console_charavail(d->console_handle))
                d->reg[com_lsr] |= LSR_RXRDY;

        relative_addr /= d->addrmult;

        if (relative_addr >= DEV_NS16550_LENGTH) {
                fatal("[ ns16550 (%s): outside register space? relative_addr="
                    "0x%llx. bad addrmult? bad device length? ]\n", d->name,
                    (long long)relative_addr);
                return 0;
        }

        switch (relative_addr) {

        case com_data:  /*  data AND low byte of the divisor  */
                /*  Read/write of the Divisor value:  */
                if (d->dlab) {
                        /*  Write or read the low byte of the divisor:  */
                        if (writeflag == MEM_WRITE)
                                d->divisor = (d->divisor & 0xff00) | idata;
                        else
                                odata = d->divisor & 0xff;
                        break;
                }

                /*  Read/write of data:  */
                if (writeflag == MEM_WRITE) {
                        if (d->reg[com_mcr] & MCR_LOOPBACK) {
                                console_makeavail(d->console_handle, idata);
                        } else {
                                console_putchar(d->console_handle, idata);
                                if (console_are_slaves_allowed())
                                        d->in_use = 1;
                        }
                        d->reg[com_iir] |= IIR_TXRDY;
                } else {
                        if (d->in_use)
                                odata = console_readchar(d->console_handle);
                        else
                                odata = 0;
                }
                dev_ns16550_tick(cpu, d);
                break;

        case com_ier:   /*  interrupt enable AND high byte of the divisor  */
                /*  Read/write of the Divisor value:  */
                if (d->dlab) {
                        if (writeflag == MEM_WRITE) {
                                /*  Set the high byte of the divisor:  */
                                d->divisor = (d->divisor & 0xff) | (idata << 8);
                                debug("[ ns16550 (%s): speed set to %i bps ]\n",
                                    d->name, (int)(115200 / d->divisor));
                        } else
                                odata = d->divisor >> 8;
                        break;
                }

                /*  IER:  */
                if (writeflag == MEM_WRITE) {
                        /*  This is to supress Linux' behaviour  */
                        if (idata != 0)
                                debug("[ ns16550 (%s): write to ier: 0x%02x ]"
                                    "\n", d->name, (int)idata);

                        /*  Needed for NetBSD 2.0.x, but not 1.6.2?  */
                        if (!(d->reg[com_ier] & IER_ETXRDY)
                            && (idata & IER_ETXRDY))
                                d->reg[com_iir] |= IIR_TXRDY;

                        d->reg[com_ier] = idata;
                        dev_ns16550_tick(cpu, d);
                } else
                        odata = d->reg[com_ier];
                break;

        case com_iir:   /*  interrupt identification (r), fifo control (w)  */
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
                            "\n", d->name, (int)idata);
                        d->fcr = idata;
                } else {
                        odata = d->reg[com_iir];
                        debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
                            d->name, (int)odata);
                        dev_ns16550_tick(cpu, d);
                }
                break;

        case com_lsr:
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
                            d->name, (int)idata);
                        d->reg[com_lsr] = idata;
                } else {
                        odata = d->reg[com_lsr];
                        /*  debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
                            d->name, (int)odata);  */
                }
                break;

        case com_msr:
                if (writeflag == MEM_WRITE) {
                        debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
                            d->name, (int)idata);
                        d->reg[com_msr] = idata;
                } else {
                        odata = d->reg[com_msr];
                        debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        case com_lctl:
                if (writeflag == MEM_WRITE) {
                        d->reg[com_lctl] = idata;
                        switch (idata & 0x7) {
                        case 0: d->databits = 5; d->stopbits = "1"; break;
                        case 1: d->databits = 6; d->stopbits = "1"; break;
                        case 2: d->databits = 7; d->stopbits = "1"; break;
                        case 3: d->databits = 8; d->stopbits = "1"; break;
                        case 4: d->databits = 5; d->stopbits = "1.5"; break;
                        case 5: d->databits = 6; d->stopbits = "2"; break;
                        case 6: d->databits = 7; d->stopbits = "2"; break;
                        case 7: d->databits = 8; d->stopbits = "2"; break;
                        }
                        switch ((idata & 0x38) / 0x8) {
                        case 0: d->parity = 'N'; break;         /*  none  */
                        case 1: d->parity = 'O'; break;         /*  odd  */
                        case 2: d->parity = '?'; break;
                        case 3: d->parity = 'E'; break;         /*  even  */
                        case 4: d->parity = '?'; break;
                        case 5: d->parity = 'Z'; break;         /*  zero  */
                        case 6: d->parity = '?'; break;
                        case 7: d->parity = 'o'; break;         /*  one  */
                        }

                        d->dlab = idata & 0x80? 1 : 0;

                        debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
                            "setting mode %i%c%s) ]\n", d->name, (int)idata,
                            d->dlab? "Divisor Latch access, " : "",
                            idata&0x40? "sending BREAK, " : "",
                            d->databits, d->parity, d->stopbits);
                } else {
                        odata = d->reg[com_lctl];
                        debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        case com_mcr:
                if (writeflag == MEM_WRITE) {
                        d->reg[com_mcr] = idata;
                        debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
                            d->name, (int)idata);
                } else {
                        odata = d->reg[com_mcr];
                        debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
                            d->name, (int)odata);
                }
                break;

        default:
                if (writeflag==MEM_READ) {
                        debug("[ ns16550 (%s): read from reg %i ]\n",
                            d->name, (int)relative_addr);
                        odata = d->reg[relative_addr];
                } else {
                        debug("[ ns16550 (%s): write to reg %i:",
                            d->name, (int)relative_addr);
                        for (i=0; i<len; i++)
                                debug(" %02x", data[i]);
                        debug(" ]\n");
                        d->reg[relative_addr] = idata;
                }
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


/*
 *  devinit_ns16550():
 */
int devinit_ns16550(struct devinit *devinit)
{
        struct ns_data *d = malloc(sizeof(struct ns_data));
        size_t nlen;
        char *name;

        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct ns_data));
        d->irqnr        = devinit->irq_nr;
        d->addrmult     = devinit->addr_mult;
        d->in_use       = devinit->in_use;
        d->enable_fifo  = 1;
        d->dlab         = 0;
        d->divisor      = 115200 / 9600;
        d->databits     = 8;
        d->parity       = 'N';
        d->stopbits     = "1";
        d->name         = devinit->name2 != NULL? devinit->name2 : "";
        d->console_handle =
            console_start_slave(devinit->machine, devinit->name);

        nlen = strlen(devinit->name) + 10;
        if (devinit->name2 != NULL)
                nlen += strlen(devinit->name2);
        name = malloc(nlen);
        if (name == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        if (devinit->name2 != NULL && devinit->name2[0])
                snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
        else
                snprintf(name, nlen, "%s", devinit->name);

        memory_device_register(devinit->machine->memory, name, devinit->addr,
            DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
            DM_DEFAULT, NULL);
        machine_add_tickfunction(devinit->machine,
            dev_ns16550_tick, d, TICK_SHIFT);

        /*
         *  NOTE:  Ugly cast into a pointer, because this is a convenient way
         *         to return the console handle to code in src/machine.c.
         */
        devinit->return_ptr = (void *)(size_t)d->console_handle;

        return 1;
}

1	/*
2	* Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: dev_ns16550.c,v 1.46 2005/11/23 18:16:42 debug Exp $
29	*
30	* NS16550 serial controller.
31	*
32	*
33	* TODO: Implement the FIFO.
34	*/
35
36	#include <stdio.h>
37	#include <stdlib.h>
38	#include <string.h>
39
40	#include "console.h"
41	#include "cpu.h"
42	#include "device.h"
43	#include "machine.h"
44	#include "memory.h"
45	#include "misc.h"
46
47	#include "comreg.h"
48
49
50	/* #define debug fatal */
51
52	#define TICK_SHIFT 14
53	#define DEV_NS16550_LENGTH 8
54
55	struct ns_data {
56	int addrmult;
57	int in_use;
58	int irqnr;
59	char *name;
60	int console_handle;
61	int enable_fifo;
62
63	unsigned char reg[DEV_NS16550_LENGTH];
64	unsigned char fcr; /* FIFO control register */
65	int int_asserted;
66	int dlab; /* Divisor Latch Access bit */
67	int divisor;
68
69	int databits;
70	char parity;
71	const char *stopbits;
72	};
73
74
75	/*
76	* dev_ns16550_tick():
77	*
78	* This function is called at regular intervals. An interrupt is caused to the
79	* CPU if there is a character available for reading, or if the transmitter
80	* slot is empty (i.e. the ns16550 is ready to transmit).
81	*/
82	void dev_ns16550_tick(struct cpu cpu, void extra)
83	{
84	struct ns_data *d = extra;
85
86	d->reg[com_iir] &= ~IIR_RXRDY;
87	if (d->in_use && console_charavail(d->console_handle))
88	d->reg[com_iir] \|= IIR_RXRDY;
89
90	/*
91	* If interrupts are enabled, and interrupts are pending, then
92	* cause a CPU interrupt.
93	*/
94	if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) \|\|
95	((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
96	d->reg[com_iir] &= ~IIR_NOPEND;
97	if (d->reg[com_mcr] & MCR_IENABLE) {
98	cpu_interrupt(cpu, d->irqnr);
99	d->int_asserted = 1;
100	}
101	} else {
102	d->reg[com_iir] \|= IIR_NOPEND;
103	if (d->int_asserted)
104	cpu_interrupt_ack(cpu, d->irqnr);
105	d->int_asserted = 0;
106	}
107	}
108
109
110	/*
111	* dev_ns16550_access():
112	*/
113	int dev_ns16550_access(struct cpu cpu, struct memory mem,
114	uint64_t relative_addr, unsigned char *data, size_t len,
115	int writeflag, void *extra)
116	{
117	uint64_t idata = 0, odata=0;
118	int i;
119	struct ns_data *d = extra;
120
121	if (writeflag == MEM_WRITE)
122	idata = memory_readmax64(cpu, data, len);
123
124	#if 0
125	/* The NS16550 should be accessed using byte read/writes: */
126	if (len != 1)
127	fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
128	d->name, len, (long long)idata);
129	#endif
130
131	/*
132	* Always ready to transmit:
133	*/
134	d->reg[com_lsr] \|= LSR_TXRDY \| LSR_TSRE;
135	d->reg[com_msr] \|= MSR_DCD \| MSR_DSR \| MSR_CTS;
136
137	d->reg[com_iir] &= ~0xf0;
138	if (d->enable_fifo)
139	d->reg[com_iir] \|= ((d->fcr << 5) & 0xc0);
140
141	d->reg[com_lsr] &= ~LSR_RXRDY;
142	if (d->in_use && console_charavail(d->console_handle))
143	d->reg[com_lsr] \|= LSR_RXRDY;
144
145	relative_addr /= d->addrmult;
146
147	if (relative_addr >= DEV_NS16550_LENGTH) {
148	fatal("[ ns16550 (%s): outside register space? relative_addr="
149	"0x%llx. bad addrmult? bad device length? ]\n", d->name,
150	(long long)relative_addr);
151	return 0;
152	}
153
154	switch (relative_addr) {
155
156	case com_data: /* data AND low byte of the divisor */
157	/* Read/write of the Divisor value: */
158	if (d->dlab) {
159	/* Write or read the low byte of the divisor: */
160	if (writeflag == MEM_WRITE)
161	d->divisor = (d->divisor & 0xff00) \| idata;
162	else
163	odata = d->divisor & 0xff;
164	break;
165	}
166
167	/* Read/write of data: */
168	if (writeflag == MEM_WRITE) {
169	if (d->reg[com_mcr] & MCR_LOOPBACK) {
170	console_makeavail(d->console_handle, idata);
171	} else {
172	console_putchar(d->console_handle, idata);
173	if (console_are_slaves_allowed())
174	d->in_use = 1;
175	}
176	d->reg[com_iir] \|= IIR_TXRDY;
177	} else {
178	if (d->in_use)
179	odata = console_readchar(d->console_handle);
180	else
181	odata = 0;
182	}
183	dev_ns16550_tick(cpu, d);
184	break;
185
186	case com_ier: /* interrupt enable AND high byte of the divisor */
187	/* Read/write of the Divisor value: */
188	if (d->dlab) {
189	if (writeflag == MEM_WRITE) {
190	/* Set the high byte of the divisor: */
191	d->divisor = (d->divisor & 0xff) \| (idata << 8);
192	debug("[ ns16550 (%s): speed set to %i bps ]\n",
193	d->name, (int)(115200 / d->divisor));
194	} else
195	odata = d->divisor >> 8;
196	break;
197	}
198
199	/* IER: */
200	if (writeflag == MEM_WRITE) {
201	/* This is to supress Linux' behaviour */
202	if (idata != 0)
203	debug("[ ns16550 (%s): write to ier: 0x%02x ]"
204	"\n", d->name, (int)idata);
205
206	/* Needed for NetBSD 2.0.x, but not 1.6.2? */
207	if (!(d->reg[com_ier] & IER_ETXRDY)
208	&& (idata & IER_ETXRDY))
209	d->reg[com_iir] \|= IIR_TXRDY;
210
211	d->reg[com_ier] = idata;
212	dev_ns16550_tick(cpu, d);
213	} else
214	odata = d->reg[com_ier];
215	break;
216
217	case com_iir: /* interrupt identification (r), fifo control (w) */
218	if (writeflag == MEM_WRITE) {
219	debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
220	"\n", d->name, (int)idata);
221	d->fcr = idata;
222	} else {
223	odata = d->reg[com_iir];
224	debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
225	d->name, (int)odata);
226	dev_ns16550_tick(cpu, d);
227	}
228	break;
229
230	case com_lsr:
231	if (writeflag == MEM_WRITE) {
232	debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
233	d->name, (int)idata);
234	d->reg[com_lsr] = idata;
235	} else {
236	odata = d->reg[com_lsr];
237	/* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
238	d->name, (int)odata); */
239	}
240	break;
241
242	case com_msr:
243	if (writeflag == MEM_WRITE) {
244	debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
245	d->name, (int)idata);
246	d->reg[com_msr] = idata;
247	} else {
248	odata = d->reg[com_msr];
249	debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
250	d->name, (int)odata);
251	}
252	break;
253
254	case com_lctl:
255	if (writeflag == MEM_WRITE) {
256	d->reg[com_lctl] = idata;
257	switch (idata & 0x7) {
258	case 0: d->databits = 5; d->stopbits = "1"; break;
259	case 1: d->databits = 6; d->stopbits = "1"; break;
260	case 2: d->databits = 7; d->stopbits = "1"; break;
261	case 3: d->databits = 8; d->stopbits = "1"; break;
262	case 4: d->databits = 5; d->stopbits = "1.5"; break;
263	case 5: d->databits = 6; d->stopbits = "2"; break;
264	case 6: d->databits = 7; d->stopbits = "2"; break;
265	case 7: d->databits = 8; d->stopbits = "2"; break;
266	}
267	switch ((idata & 0x38) / 0x8) {
268	case 0: d->parity = 'N'; break; /* none */
269	case 1: d->parity = 'O'; break; /* odd */
270	case 2: d->parity = '?'; break;
271	case 3: d->parity = 'E'; break; /* even */
272	case 4: d->parity = '?'; break;
273	case 5: d->parity = 'Z'; break; /* zero */
274	case 6: d->parity = '?'; break;
275	case 7: d->parity = 'o'; break; /* one */
276	}
277
278	d->dlab = idata & 0x80? 1 : 0;
279
280	debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
281	"setting mode %i%c%s) ]\n", d->name, (int)idata,
282	d->dlab? "Divisor Latch access, " : "",
283	idata&0x40? "sending BREAK, " : "",
284	d->databits, d->parity, d->stopbits);
285	} else {
286	odata = d->reg[com_lctl];
287	debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
288	d->name, (int)odata);
289	}
290	break;
291
292	case com_mcr:
293	if (writeflag == MEM_WRITE) {
294	d->reg[com_mcr] = idata;
295	debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
296	d->name, (int)idata);
297	} else {
298	odata = d->reg[com_mcr];
299	debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
300	d->name, (int)odata);
301	}
302	break;
303
304	default:
305	if (writeflag==MEM_READ) {
306	debug("[ ns16550 (%s): read from reg %i ]\n",
307	d->name, (int)relative_addr);
308	odata = d->reg[relative_addr];
309	} else {
310	debug("[ ns16550 (%s): write to reg %i:",
311	d->name, (int)relative_addr);
312	for (i=0; i<len; i++)
313	debug(" %02x", data[i]);
314	debug(" ]\n");
315	d->reg[relative_addr] = idata;
316	}
317	}
318
319	if (writeflag == MEM_READ)
320	memory_writemax64(cpu, data, len, odata);
321
322	return 1;
323	}
324
325
326	/*
327	* devinit_ns16550():
328	*/
329	int devinit_ns16550(struct devinit *devinit)
330	{
331	struct ns_data *d = malloc(sizeof(struct ns_data));
332	size_t nlen;
333	char *name;
334
335	if (d == NULL) {
336	fprintf(stderr, "out of memory\n");
337	exit(1);
338	}
339	memset(d, 0, sizeof(struct ns_data));
340	d->irqnr = devinit->irq_nr;
341	d->addrmult = devinit->addr_mult;
342	d->in_use = devinit->in_use;
343	d->enable_fifo = 1;
344	d->dlab = 0;
345	d->divisor = 115200 / 9600;
346	d->databits = 8;
347	d->parity = 'N';
348	d->stopbits = "1";
349	d->name = devinit->name2 != NULL? devinit->name2 : "";
350	d->console_handle =
351	console_start_slave(devinit->machine, devinit->name);
352
353	nlen = strlen(devinit->name) + 10;
354	if (devinit->name2 != NULL)
355	nlen += strlen(devinit->name2);
356	name = malloc(nlen);
357	if (name == NULL) {
358	fprintf(stderr, "out of memory\n");
359	exit(1);
360	}
361	if (devinit->name2 != NULL && devinit->name2[0])
362	snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
363	else
364	snprintf(name, nlen, "%s", devinit->name);
365
366	memory_device_register(devinit->machine->memory, name, devinit->addr,
367	DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
368	DM_DEFAULT, NULL);
369	machine_add_tickfunction(devinit->machine,
370	dev_ns16550_tick, d, TICK_SHIFT);
371
372	/*
373	* NOTE: Ugly cast into a pointer, because this is a convenient way
374	* to return the console handle to code in src/machine.c.
375	*/
376	devinit->return_ptr = (void *)(size_t)d->console_handle;
377
378	return 1;
379	}
380