/[gxemul]/trunk/src/devices/dev_ns16550.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /trunk/src/devices/dev_ns16550.c

Parent Directory Parent Directory | Revision Log Revision Log


Revision 20 - (hide annotations)
Mon Oct 8 16:19:23 2007 UTC (16 years, 7 months ago) by dpavlin
File MIME type: text/plain
File size: 10565 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============


1 dpavlin 4 /*
2     * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 20 * $Id: dev_ns16550.c,v 1.46 2005/11/23 18:16:42 debug Exp $
29 dpavlin 4 *
30     * NS16550 serial controller.
31     *
32 dpavlin 12 *
33     * TODO: Implement the FIFO.
34 dpavlin 4 */
35    
36     #include <stdio.h>
37     #include <stdlib.h>
38     #include <string.h>
39    
40     #include "console.h"
41     #include "cpu.h"
42 dpavlin 12 #include "device.h"
43 dpavlin 4 #include "machine.h"
44     #include "memory.h"
45     #include "misc.h"
46    
47     #include "comreg.h"
48    
49    
50 dpavlin 12 /* #define debug fatal */
51 dpavlin 4
52 dpavlin 12 #define TICK_SHIFT 14
53     #define DEV_NS16550_LENGTH 8
54 dpavlin 4
55     struct ns_data {
56 dpavlin 12 int addrmult;
57     int in_use;
58 dpavlin 4 int irqnr;
59 dpavlin 14 char *name;
60 dpavlin 4 int console_handle;
61 dpavlin 12 int enable_fifo;
62 dpavlin 4
63 dpavlin 12 unsigned char reg[DEV_NS16550_LENGTH];
64     unsigned char fcr; /* FIFO control register */
65 dpavlin 20 int int_asserted;
66 dpavlin 4 int dlab; /* Divisor Latch Access bit */
67     int divisor;
68 dpavlin 12
69 dpavlin 4 int databits;
70     char parity;
71     const char *stopbits;
72     };
73    
74    
75     /*
76     * dev_ns16550_tick():
77 dpavlin 12 *
78     * This function is called at regular intervals. An interrupt is caused to the
79     * CPU if there is a character available for reading, or if the transmitter
80     * slot is empty (i.e. the ns16550 is ready to transmit).
81 dpavlin 4 */
82     void dev_ns16550_tick(struct cpu *cpu, void *extra)
83     {
84     struct ns_data *d = extra;
85    
86     d->reg[com_iir] &= ~IIR_RXRDY;
87 dpavlin 12 if (d->in_use && console_charavail(d->console_handle))
88     d->reg[com_iir] |= IIR_RXRDY;
89 dpavlin 4
90 dpavlin 12 /*
91     * If interrupts are enabled, and interrupts are pending, then
92     * cause a CPU interrupt.
93     */
94     if (((d->reg[com_ier] & IER_ETXRDY) && (d->reg[com_iir] & IIR_TXRDY)) ||
95     ((d->reg[com_ier] & IER_ERXRDY) && (d->reg[com_iir] & IIR_RXRDY))) {
96 dpavlin 4 d->reg[com_iir] &= ~IIR_NOPEND;
97 dpavlin 20 if (d->reg[com_mcr] & MCR_IENABLE) {
98 dpavlin 4 cpu_interrupt(cpu, d->irqnr);
99 dpavlin 20 d->int_asserted = 1;
100     }
101 dpavlin 12 } else {
102     d->reg[com_iir] |= IIR_NOPEND;
103 dpavlin 20 if (d->int_asserted)
104     cpu_interrupt_ack(cpu, d->irqnr);
105     d->int_asserted = 0;
106 dpavlin 4 }
107     }
108    
109    
110     /*
111     * dev_ns16550_access():
112     */
113     int dev_ns16550_access(struct cpu *cpu, struct memory *mem,
114     uint64_t relative_addr, unsigned char *data, size_t len,
115     int writeflag, void *extra)
116     {
117     uint64_t idata = 0, odata=0;
118     int i;
119     struct ns_data *d = extra;
120    
121 dpavlin 18 if (writeflag == MEM_WRITE)
122     idata = memory_readmax64(cpu, data, len);
123 dpavlin 4
124 dpavlin 20 #if 0
125 dpavlin 12 /* The NS16550 should be accessed using byte read/writes: */
126     if (len != 1)
127 dpavlin 14 fatal("[ ns16550 (%s): len=%i, idata=0x%16llx! ]\n",
128     d->name, len, (long long)idata);
129 dpavlin 20 #endif
130 dpavlin 12
131     /*
132     * Always ready to transmit:
133     */
134 dpavlin 4 d->reg[com_lsr] |= LSR_TXRDY | LSR_TSRE;
135 dpavlin 12 d->reg[com_msr] |= MSR_DCD | MSR_DSR | MSR_CTS;
136    
137     d->reg[com_iir] &= ~0xf0;
138     if (d->enable_fifo)
139     d->reg[com_iir] |= ((d->fcr << 5) & 0xc0);
140    
141 dpavlin 4 d->reg[com_lsr] &= ~LSR_RXRDY;
142 dpavlin 12 if (d->in_use && console_charavail(d->console_handle))
143     d->reg[com_lsr] |= LSR_RXRDY;
144 dpavlin 4
145 dpavlin 12 relative_addr /= d->addrmult;
146 dpavlin 4
147 dpavlin 12 if (relative_addr >= DEV_NS16550_LENGTH) {
148 dpavlin 14 fatal("[ ns16550 (%s): outside register space? relative_addr="
149     "0x%llx. bad addrmult? bad device length? ]\n", d->name,
150 dpavlin 12 (long long)relative_addr);
151     return 0;
152 dpavlin 4 }
153    
154 dpavlin 12 switch (relative_addr) {
155 dpavlin 4
156 dpavlin 12 case com_data: /* data AND low byte of the divisor */
157 dpavlin 4 /* Read/write of the Divisor value: */
158     if (d->dlab) {
159 dpavlin 12 /* Write or read the low byte of the divisor: */
160     if (writeflag == MEM_WRITE)
161     d->divisor = (d->divisor & 0xff00) | idata;
162     else
163 dpavlin 4 odata = d->divisor & 0xff;
164     break;
165     }
166    
167 dpavlin 12 /* Read/write of data: */
168 dpavlin 4 if (writeflag == MEM_WRITE) {
169 dpavlin 20 if (d->reg[com_mcr] & MCR_LOOPBACK) {
170 dpavlin 4 console_makeavail(d->console_handle, idata);
171 dpavlin 20 } else {
172 dpavlin 4 console_putchar(d->console_handle, idata);
173 dpavlin 20 if (console_are_slaves_allowed())
174     d->in_use = 1;
175     }
176 dpavlin 4 d->reg[com_iir] |= IIR_TXRDY;
177     } else {
178     if (d->in_use)
179     odata = console_readchar(d->console_handle);
180     else
181     odata = 0;
182     }
183 dpavlin 12 dev_ns16550_tick(cpu, d);
184 dpavlin 4 break;
185 dpavlin 12
186 dpavlin 4 case com_ier: /* interrupt enable AND high byte of the divisor */
187     /* Read/write of the Divisor value: */
188     if (d->dlab) {
189     if (writeflag == MEM_WRITE) {
190     /* Set the high byte of the divisor: */
191 dpavlin 12 d->divisor = (d->divisor & 0xff) | (idata << 8);
192 dpavlin 14 debug("[ ns16550 (%s): speed set to %i bps ]\n",
193     d->name, (int)(115200 / d->divisor));
194 dpavlin 12 } else
195     odata = d->divisor >> 8;
196 dpavlin 4 break;
197     }
198    
199     /* IER: */
200     if (writeflag == MEM_WRITE) {
201     /* This is to supress Linux' behaviour */
202     if (idata != 0)
203 dpavlin 14 debug("[ ns16550 (%s): write to ier: 0x%02x ]"
204     "\n", d->name, (int)idata);
205 dpavlin 4
206 dpavlin 12 /* Needed for NetBSD 2.0.x, but not 1.6.2? */
207     if (!(d->reg[com_ier] & IER_ETXRDY)
208 dpavlin 4 && (idata & IER_ETXRDY))
209     d->reg[com_iir] |= IIR_TXRDY;
210    
211 dpavlin 12 d->reg[com_ier] = idata;
212 dpavlin 4 dev_ns16550_tick(cpu, d);
213 dpavlin 12 } else
214     odata = d->reg[com_ier];
215 dpavlin 4 break;
216 dpavlin 12
217 dpavlin 4 case com_iir: /* interrupt identification (r), fifo control (w) */
218     if (writeflag == MEM_WRITE) {
219 dpavlin 14 debug("[ ns16550 (%s): write to fifo control: 0x%02x ]"
220     "\n", d->name, (int)idata);
221 dpavlin 12 d->fcr = idata;
222 dpavlin 4 } else {
223 dpavlin 12 odata = d->reg[com_iir];
224 dpavlin 14 debug("[ ns16550 (%s): read from iir: 0x%02x ]\n",
225     d->name, (int)odata);
226 dpavlin 4 dev_ns16550_tick(cpu, d);
227     }
228     break;
229 dpavlin 12
230 dpavlin 4 case com_lsr:
231     if (writeflag == MEM_WRITE) {
232 dpavlin 14 debug("[ ns16550 (%s): write to lsr: 0x%02x ]\n",
233     d->name, (int)idata);
234 dpavlin 12 d->reg[com_lsr] = idata;
235 dpavlin 4 } else {
236 dpavlin 12 odata = d->reg[com_lsr];
237 dpavlin 14 /* debug("[ ns16550 (%s): read from lsr: 0x%02x ]\n",
238     d->name, (int)odata); */
239 dpavlin 4 }
240     break;
241 dpavlin 12
242 dpavlin 4 case com_msr:
243     if (writeflag == MEM_WRITE) {
244 dpavlin 14 debug("[ ns16550 (%s): write to msr: 0x%02x ]\n",
245     d->name, (int)idata);
246 dpavlin 12 d->reg[com_msr] = idata;
247 dpavlin 4 } else {
248 dpavlin 12 odata = d->reg[com_msr];
249 dpavlin 14 debug("[ ns16550 (%s): read from msr: 0x%02x ]\n",
250     d->name, (int)odata);
251 dpavlin 4 }
252     break;
253 dpavlin 12
254 dpavlin 4 case com_lctl:
255     if (writeflag == MEM_WRITE) {
256 dpavlin 12 d->reg[com_lctl] = idata;
257 dpavlin 4 switch (idata & 0x7) {
258     case 0: d->databits = 5; d->stopbits = "1"; break;
259     case 1: d->databits = 6; d->stopbits = "1"; break;
260     case 2: d->databits = 7; d->stopbits = "1"; break;
261     case 3: d->databits = 8; d->stopbits = "1"; break;
262     case 4: d->databits = 5; d->stopbits = "1.5"; break;
263     case 5: d->databits = 6; d->stopbits = "2"; break;
264     case 6: d->databits = 7; d->stopbits = "2"; break;
265     case 7: d->databits = 8; d->stopbits = "2"; break;
266     }
267     switch ((idata & 0x38) / 0x8) {
268     case 0: d->parity = 'N'; break; /* none */
269     case 1: d->parity = 'O'; break; /* odd */
270     case 2: d->parity = '?'; break;
271     case 3: d->parity = 'E'; break; /* even */
272     case 4: d->parity = '?'; break;
273     case 5: d->parity = 'Z'; break; /* zero */
274     case 6: d->parity = '?'; break;
275     case 7: d->parity = 'o'; break; /* one */
276     }
277    
278     d->dlab = idata & 0x80? 1 : 0;
279    
280 dpavlin 14 debug("[ ns16550 (%s): write to lctl: 0x%02x (%s%s"
281     "setting mode %i%c%s) ]\n", d->name, (int)idata,
282 dpavlin 4 d->dlab? "Divisor Latch access, " : "",
283     idata&0x40? "sending BREAK, " : "",
284     d->databits, d->parity, d->stopbits);
285     } else {
286 dpavlin 12 odata = d->reg[com_lctl];
287 dpavlin 14 debug("[ ns16550 (%s): read from lctl: 0x%02x ]\n",
288     d->name, (int)odata);
289 dpavlin 4 }
290     break;
291 dpavlin 12
292 dpavlin 4 case com_mcr:
293     if (writeflag == MEM_WRITE) {
294 dpavlin 12 d->reg[com_mcr] = idata;
295 dpavlin 14 debug("[ ns16550 (%s): write to mcr: 0x%02x ]\n",
296     d->name, (int)idata);
297 dpavlin 4 } else {
298 dpavlin 12 odata = d->reg[com_mcr];
299 dpavlin 14 debug("[ ns16550 (%s): read from mcr: 0x%02x ]\n",
300     d->name, (int)odata);
301 dpavlin 4 }
302     break;
303 dpavlin 12
304 dpavlin 4 default:
305     if (writeflag==MEM_READ) {
306 dpavlin 14 debug("[ ns16550 (%s): read from reg %i ]\n",
307     d->name, (int)relative_addr);
308 dpavlin 4 odata = d->reg[relative_addr];
309     } else {
310 dpavlin 14 debug("[ ns16550 (%s): write to reg %i:",
311     d->name, (int)relative_addr);
312 dpavlin 4 for (i=0; i<len; i++)
313     debug(" %02x", data[i]);
314     debug(" ]\n");
315     d->reg[relative_addr] = idata;
316     }
317     }
318    
319     if (writeflag == MEM_READ)
320     memory_writemax64(cpu, data, len, odata);
321    
322     return 1;
323     }
324    
325    
326     /*
327 dpavlin 12 * devinit_ns16550():
328 dpavlin 4 */
329 dpavlin 12 int devinit_ns16550(struct devinit *devinit)
330 dpavlin 4 {
331 dpavlin 12 struct ns_data *d = malloc(sizeof(struct ns_data));
332 dpavlin 10 size_t nlen;
333 dpavlin 12 char *name;
334 dpavlin 4
335     if (d == NULL) {
336     fprintf(stderr, "out of memory\n");
337     exit(1);
338     }
339     memset(d, 0, sizeof(struct ns_data));
340 dpavlin 14 d->irqnr = devinit->irq_nr;
341     d->addrmult = devinit->addr_mult;
342     d->in_use = devinit->in_use;
343     d->enable_fifo = 1;
344     d->dlab = 0;
345     d->divisor = 115200 / 9600;
346     d->databits = 8;
347     d->parity = 'N';
348     d->stopbits = "1";
349     d->name = devinit->name2 != NULL? devinit->name2 : "";
350 dpavlin 12 d->console_handle =
351     console_start_slave(devinit->machine, devinit->name);
352 dpavlin 4
353 dpavlin 12 nlen = strlen(devinit->name) + 10;
354     if (devinit->name2 != NULL)
355     nlen += strlen(devinit->name2);
356     name = malloc(nlen);
357     if (name == NULL) {
358     fprintf(stderr, "out of memory\n");
359 dpavlin 4 exit(1);
360     }
361 dpavlin 12 if (devinit->name2 != NULL && devinit->name2[0])
362     snprintf(name, nlen, "%s [%s]", devinit->name, devinit->name2);
363 dpavlin 4 else
364 dpavlin 12 snprintf(name, nlen, "%s", devinit->name);
365 dpavlin 4
366 dpavlin 12 memory_device_register(devinit->machine->memory, name, devinit->addr,
367     DEV_NS16550_LENGTH * d->addrmult, dev_ns16550_access, d,
368 dpavlin 20 DM_DEFAULT, NULL);
369 dpavlin 12 machine_add_tickfunction(devinit->machine,
370     dev_ns16550_tick, d, TICK_SHIFT);
371 dpavlin 4
372 dpavlin 12 /*
373     * NOTE: Ugly cast into a pointer, because this is a convenient way
374     * to return the console handle to code in src/machine.c.
375     */
376     devinit->return_ptr = (void *)(size_t)d->console_handle;
377    
378     return 1;
379 dpavlin 4 }
380    

  ViewVC Help
Powered by ViewVC 1.1.26