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/* |
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* Copyright (C) 2003-2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_mp.c,v 1.29 2005/10/26 14:37:04 debug Exp $ |
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* |
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* This is a fake multiprocessor (MP) device. It can be useful for |
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* theoretical experiments, but probably bares no resemblance to any |
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* multiprocessor controller used in any real machine. |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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|
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#include "cpu.h" |
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#include "cpu_mips.h" |
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#include "device.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "mp.h" |
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|
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|
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struct mp_data { |
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struct cpu **cpus; |
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uint64_t startup_addr; |
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uint64_t stack_addr; |
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uint64_t pause_addr; |
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|
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/* Each CPU has an array of pending ipis. */ |
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int *n_pending_ipis; |
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int **ipi; |
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}; |
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|
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|
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extern int single_step; |
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|
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|
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/* |
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* dev_mp_access(): |
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*/ |
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int dev_mp_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr, |
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unsigned char *data, size_t len, int writeflag, void *extra) |
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{ |
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struct mp_data *d = extra; |
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int i, which_cpu; |
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uint64_t idata = 0, odata = 0; |
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|
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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|
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/* |
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* NOTE: It is up to the user of this device to read or write |
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* correct addresses. (A write to NCPUS is pretty useless, |
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* for example.) |
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*/ |
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|
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switch (relative_addr) { |
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|
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case DEV_MP_WHOAMI: |
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odata = cpu->cpu_id; |
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break; |
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|
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case DEV_MP_NCPUS: |
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odata = cpu->machine->ncpus; |
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break; |
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|
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case DEV_MP_STARTUPCPU: |
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which_cpu = idata; |
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d->cpus[which_cpu]->pc = d->startup_addr; |
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switch (cpu->machine->arch) { |
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case ARCH_MIPS: |
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d->cpus[which_cpu]->cd.mips.gpr[MIPS_GPR_SP] = |
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d->stack_addr; |
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break; |
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case ARCH_PPC: |
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d->cpus[which_cpu]->cd.ppc.gpr[1] = d->stack_addr; |
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break; |
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default: |
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fatal("dev_mp(): DEV_MP_STARTUPCPU: not for this" |
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" arch yet!\n"); |
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exit(1); |
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} |
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d->cpus[which_cpu]->running = 1; |
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/* debug("[ dev_mp: starting up cpu%i at 0x%llx ]\n", |
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which_cpu, (long long)d->startup_addr); */ |
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break; |
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|
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case DEV_MP_STARTUPADDR: |
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if (len==4 && (idata >> 32) == 0 && (idata & 0x80000000ULL)) |
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idata |= 0xffffffff00000000ULL; |
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d->startup_addr = idata; |
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break; |
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|
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case DEV_MP_PAUSE_ADDR: |
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d->pause_addr = idata; |
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break; |
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|
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case DEV_MP_PAUSE_CPU: |
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/* Pause all cpus except our selves: */ |
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which_cpu = idata; |
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|
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for (i=0; i<cpu->machine->ncpus; i++) |
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if (i!=which_cpu) |
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d->cpus[i]->running = 0; |
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break; |
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|
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case DEV_MP_UNPAUSE_CPU: |
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/* Unpause all cpus except our selves: */ |
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which_cpu = idata; |
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for (i=0; i<cpu->machine->ncpus; i++) |
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if (i!=which_cpu) |
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d->cpus[i]->running = 1; |
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break; |
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|
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case DEV_MP_STARTUPSTACK: |
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if (len == 4 && (idata >> 32) == 0 && (idata & 0x80000000ULL)) |
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idata |= 0xffffffff00000000ULL; |
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d->stack_addr = idata; |
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break; |
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|
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case DEV_MP_HARDWARE_RANDOM: |
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/* Return (up to) 64 bits of "hardware random": */ |
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odata = random(); |
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odata = (odata << 31) ^ random(); |
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odata = (odata << 31) ^ random(); |
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break; |
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|
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case DEV_MP_MEMORY: |
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/* |
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* Return the number of bytes of memory in the system. |
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* |
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* (It is assumed to be located at physical address 0. |
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* It is actually located at machine->memory_offset_in_mb |
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* but that is only used for SGI emulation so far.) |
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*/ |
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odata = cpu->machine->physical_ram_in_mb * 1048576; |
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break; |
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|
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case DEV_MP_IPI_ONE: |
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case DEV_MP_IPI_MANY: |
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/* |
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* idata should be of the form: |
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* |
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* (IPI_nr << 16) | cpu_id |
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* |
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* This will send an Inter-processor interrupt to a specific |
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* CPU. (DEV_MP_IPI_MANY sends to all _except_ the specific |
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* CPU.) |
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* |
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* Sending an IPI means adding the IPI last in the list of |
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* pending IPIs, and asserting the IPI "pin". |
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*/ |
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which_cpu = (idata & 0xffff); |
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for (i=0; i<cpu->machine->ncpus; i++) { |
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int send_it = 0; |
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if (relative_addr == DEV_MP_IPI_ONE && i == which_cpu) |
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send_it = 1; |
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if (relative_addr == DEV_MP_IPI_MANY && i != which_cpu) |
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send_it = 1; |
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if (send_it) { |
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d->n_pending_ipis[i] ++; |
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d->ipi[i] = realloc(d->ipi[i], |
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d->n_pending_ipis[i] * sizeof(int)); |
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if (d->ipi[i] == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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/* Add the IPI last in the array: */ |
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d->ipi[i][d->n_pending_ipis[i] - 1] = |
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idata >> 16; |
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cpu_interrupt(d->cpus[i], MIPS_IPI_INT); |
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} |
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} |
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break; |
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|
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case DEV_MP_IPI_READ: |
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/* |
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* If the current CPU has any IPIs pending, accessing this |
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* address reads the IPI value. (Writing to this address |
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* discards _all_ pending IPIs.) If there is no pending |
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* IPI, then 0 is returned. Usage of the value 0 for real |
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* IPIs should thus be avoided. |
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*/ |
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if (writeflag == MEM_WRITE) { |
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d->n_pending_ipis[cpu->cpu_id] = 0; |
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} |
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odata = 0; |
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if (d->n_pending_ipis[cpu->cpu_id] > 0) { |
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odata = d->ipi[cpu->cpu_id][0]; |
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if (d->n_pending_ipis[cpu->cpu_id]-- > 1) |
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memmove(&d->ipi[cpu->cpu_id][0], |
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&d->ipi[cpu->cpu_id][1], |
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d->n_pending_ipis[cpu->cpu_id]); |
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} |
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/* Deassert the interrupt, if there are no pending IPIs: */ |
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if (d->n_pending_ipis[cpu->cpu_id] == 0) |
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cpu_interrupt_ack(d->cpus[cpu->cpu_id], MIPS_IPI_INT); |
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break; |
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|
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case DEV_MP_NCYCLES: |
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/* |
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* Return approximately the number of cycles executed |
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* in this machine. (This value is not updated for each |
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* instruction.) |
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*/ |
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odata = cpu->machine->ncycles; |
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break; |
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|
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default: |
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fatal("[ dev_mp: unimplemented relative addr 0x%x ]\n", |
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relative_addr); |
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} |
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|
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if (writeflag == MEM_READ) |
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memory_writemax64(cpu, data, len, odata); |
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|
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return 1; |
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} |
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|
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|
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/* |
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* devinit_mp(): |
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*/ |
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int devinit_mp(struct devinit *devinit) |
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{ |
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struct mp_data *d; |
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int n; |
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|
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d = malloc(sizeof(struct mp_data)); |
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if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d, 0, sizeof(struct mp_data)); |
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d->cpus = devinit->machine->cpus; |
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d->startup_addr = INITIAL_PC; |
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d->stack_addr = INITIAL_STACK_POINTER; |
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|
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n = devinit->machine->ncpus; |
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d->n_pending_ipis = malloc(n * sizeof(int)); |
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d->ipi = malloc(n * sizeof(int *)); |
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if (d->ipi == NULL || d->n_pending_ipis == NULL) { |
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fprintf(stderr, "out of memory\n"); |
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exit(1); |
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} |
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memset(d->n_pending_ipis, 0, sizeof(int) * n); |
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memset(d->ipi, 0, sizeof(int *) * n); |
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|
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memory_device_register(devinit->machine->memory, devinit->name, |
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devinit->addr, DEV_MP_LENGTH, dev_mp_access, d, MEM_DEFAULT, NULL); |
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|
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return 1; |
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} |
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