/[gxemul]/trunk/src/devices/dev_mp.c
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Contents of /trunk/src/devices/dev_mp.c

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Revision 42 - (show annotations)
Mon Oct 8 16:22:32 2007 UTC (14 years, 3 months ago) by dpavlin
File MIME type: text/plain
File size: 8039 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============


1 /*
2 * Copyright (C) 2003-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_mp.c,v 1.42 2007/06/15 19:57:33 debug Exp $
29 *
30 * COMMENT: Generic Multi-processor controller for the test machines
31 *
32 * This is a fake multiprocessor (MP) device. It can be useful for
33 * theoretical experiments, but probably bares no resemblance to any
34 * multiprocessor controller used in any real machine.
35 *
36 * NOTE: The devinit irq string should be the part _after_ "cpu[%i].".
37 * For MIPS, it will be MIPS_IPI_INT.
38 */
39
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include <string.h>
43
44 #include "cpu.h"
45 #include "device.h"
46 #include "machine.h"
47 #include "interrupt.h"
48 #include "memory.h"
49 #include "misc.h"
50
51 #include "testmachine/dev_mp.h"
52
53
54 struct mp_data {
55 struct cpu **cpus;
56 uint64_t startup_addr;
57 uint64_t stack_addr;
58 uint64_t pause_addr;
59
60 /* Each CPU has an array of pending ipis. */
61 int *n_pending_ipis;
62 int **ipi;
63
64 /* Connections to all CPUs' IPI pins: */
65 struct interrupt *ipi_irq;
66 };
67
68
69 extern int single_step;
70
71
72 DEVICE_ACCESS(mp)
73 {
74 struct mp_data *d = extra;
75 int i, which_cpu;
76 uint64_t idata = 0, odata = 0;
77
78 if (writeflag == MEM_WRITE)
79 idata = memory_readmax64(cpu, data, len);
80
81 /*
82 * NOTE: It is up to the user of this device to read or write
83 * correct addresses. (A write to NCPUS is pretty useless,
84 * for example.)
85 */
86
87 switch (relative_addr) {
88
89 case DEV_MP_WHOAMI:
90 odata = cpu->cpu_id;
91 break;
92
93 case DEV_MP_NCPUS:
94 odata = cpu->machine->ncpus;
95 break;
96
97 case DEV_MP_STARTUPCPU:
98 which_cpu = idata;
99 d->cpus[which_cpu]->pc = d->startup_addr;
100 switch (cpu->machine->arch) {
101 case ARCH_MIPS:
102 d->cpus[which_cpu]->cd.mips.gpr[MIPS_GPR_SP] =
103 d->stack_addr;
104 break;
105 case ARCH_PPC:
106 d->cpus[which_cpu]->cd.ppc.gpr[1] = d->stack_addr;
107 break;
108 default:
109 fatal("dev_mp(): DEV_MP_STARTUPCPU: not for this"
110 " arch yet!\n");
111 exit(1);
112 }
113 d->cpus[which_cpu]->running = 1;
114 /* debug("[ dev_mp: starting up cpu%i at 0x%llx ]\n",
115 which_cpu, (long long)d->startup_addr); */
116 break;
117
118 case DEV_MP_STARTUPADDR:
119 if (len==4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
120 idata |= 0xffffffff00000000ULL;
121 d->startup_addr = idata;
122 break;
123
124 case DEV_MP_PAUSE_ADDR:
125 d->pause_addr = idata;
126 break;
127
128 case DEV_MP_PAUSE_CPU:
129 /* Pause all cpus except a specific CPU: */
130 which_cpu = idata;
131
132 for (i=0; i<cpu->machine->ncpus; i++)
133 if (i != which_cpu)
134 d->cpus[i]->running = 0;
135 break;
136
137 case DEV_MP_UNPAUSE_CPU:
138 /* Unpause a specific CPU: */
139 which_cpu = idata;
140
141 if (which_cpu >= 0 && which_cpu <cpu->machine->ncpus)
142 d->cpus[which_cpu]->running = 1;
143 break;
144
145 case DEV_MP_STARTUPSTACK:
146 if (len == 4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
147 idata |= 0xffffffff00000000ULL;
148 d->stack_addr = idata;
149 break;
150
151 case DEV_MP_HARDWARE_RANDOM:
152 /*
153 * Return (up to) 64 bits of "hardware random":
154 *
155 * NOTE: Remember that random() is (usually) 31 bits of
156 * random data, _NOT_ 32, hence this construction.
157 */
158 odata = random();
159 odata = (odata << 31) ^ random();
160 odata = (odata << 31) ^ random();
161 break;
162
163 case DEV_MP_MEMORY:
164 /*
165 * Return the number of bytes of memory in the system.
166 *
167 * (It is assumed to be located at physical address 0.
168 * It is actually located at machine->memory_offset_in_mb
169 * but that is only used for SGI emulation so far.)
170 */
171 odata = cpu->machine->physical_ram_in_mb * 1048576;
172 break;
173
174 case DEV_MP_IPI_ONE:
175 case DEV_MP_IPI_MANY:
176 /*
177 * idata should be of the form:
178 *
179 * (IPI_nr << 16) | cpu_id
180 *
181 * This will send an Inter-processor interrupt to a specific
182 * CPU. (DEV_MP_IPI_MANY sends to all _except_ the specific
183 * CPU.)
184 *
185 * Sending an IPI means adding the IPI last in the list of
186 * pending IPIs, and asserting the IPI "pin".
187 */
188 which_cpu = (idata & 0xffff);
189 for (i=0; i<cpu->machine->ncpus; i++) {
190 int send_it = 0;
191 if (relative_addr == DEV_MP_IPI_ONE && i == which_cpu)
192 send_it = 1;
193 if (relative_addr == DEV_MP_IPI_MANY && i != which_cpu)
194 send_it = 1;
195 if (send_it) {
196 d->n_pending_ipis[i] ++;
197 CHECK_ALLOCATION(d->ipi[i] = realloc(d->ipi[i],
198 d->n_pending_ipis[i] * sizeof(int)));
199
200 /* Add the IPI last in the array: */
201 d->ipi[i][d->n_pending_ipis[i] - 1] =
202 idata >> 16;
203
204 INTERRUPT_ASSERT(d->ipi_irq[i]);
205 }
206 }
207 break;
208
209 case DEV_MP_IPI_READ:
210 /*
211 * If the current CPU has any IPIs pending, accessing this
212 * address reads the IPI value. (Writing to this address
213 * discards _all_ pending IPIs.) If there is no pending
214 * IPI, then 0 is returned. Usage of the value 0 for real
215 * IPIs should thus be avoided.
216 */
217 if (writeflag == MEM_WRITE) {
218 d->n_pending_ipis[cpu->cpu_id] = 0;
219 }
220 odata = 0;
221 if (d->n_pending_ipis[cpu->cpu_id] > 0) {
222 odata = d->ipi[cpu->cpu_id][0];
223 if (d->n_pending_ipis[cpu->cpu_id]-- > 1)
224 memmove(&d->ipi[cpu->cpu_id][0],
225 &d->ipi[cpu->cpu_id][1],
226 d->n_pending_ipis[cpu->cpu_id]);
227 }
228
229 /* Deassert the interrupt, if there are no pending IPIs: */
230 if (d->n_pending_ipis[cpu->cpu_id] == 0)
231 INTERRUPT_DEASSERT(d->ipi_irq[cpu->cpu_id]);
232 break;
233
234 case DEV_MP_NCYCLES:
235 /*
236 * Return _approximately_ the number of cycles executed
237 * on this CPU.
238 *
239 * (This value is not updated for each instruction.)
240 */
241 odata = cpu->ninstrs;
242 break;
243
244 default:
245 fatal("[ dev_mp: unimplemented relative addr 0x%x ]\n",
246 relative_addr);
247 }
248
249 if (writeflag == MEM_READ)
250 memory_writemax64(cpu, data, len, odata);
251
252 return 1;
253 }
254
255
256 DEVINIT(mp)
257 {
258 struct mp_data *d;
259 int n, i;
260
261 CHECK_ALLOCATION(d = malloc(sizeof(struct mp_data)));
262 memset(d, 0, sizeof(struct mp_data));
263
264 d->cpus = devinit->machine->cpus;
265 d->startup_addr = INITIAL_PC;
266 d->stack_addr = INITIAL_STACK_POINTER;
267
268 n = devinit->machine->ncpus;
269
270 /* Connect to all CPUs' IPI pins: */
271 CHECK_ALLOCATION(d->ipi_irq = malloc(n * sizeof(struct interrupt)));
272
273 for (i=0; i<n; i++) {
274 char tmpstr[200];
275 snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].%s",
276 devinit->machine->path, i, devinit->interrupt_path);
277 INTERRUPT_CONNECT(tmpstr, d->ipi_irq[i]);
278 }
279
280 CHECK_ALLOCATION(d->n_pending_ipis = malloc(n * sizeof(int)));
281 memset(d->n_pending_ipis, 0, sizeof(int) * n);
282
283 CHECK_ALLOCATION(d->ipi = malloc(n * sizeof(int *)));
284 memset(d->ipi, 0, sizeof(int *) * n);
285
286 memory_device_register(devinit->machine->memory, devinit->name,
287 devinit->addr, DEV_MP_LENGTH, dev_mp_access, d, DM_DEFAULT, NULL);
288
289 return 1;
290 }
291

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