src/devices/dev_mp.c

/*
 *  Copyright (C) 2003-2006  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_mp.c,v 1.37 2006/07/01 21:15:46 debug Exp $
 *
 *  This is a fake multiprocessor (MP) device. It can be useful for
 *  theoretical experiments, but probably bares no resemblance to any
 *  multiprocessor controller used in any real machine.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "cpu.h"
#include "cpu_mips.h"
#include "device.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"

#include "testmachine/dev_mp.h"


struct mp_data {
        struct cpu      **cpus;
        uint64_t        startup_addr;
        uint64_t        stack_addr;
        uint64_t        pause_addr;

        /*  Each CPU has an array of pending ipis.  */
        int             *n_pending_ipis;
        int             **ipi;
};


extern int single_step;


/*
 *  dev_mp_access():
 */
DEVICE_ACCESS(mp)
{
        struct mp_data *d = extra;
        int i, which_cpu;
        uint64_t idata = 0, odata = 0;

        if (writeflag == MEM_WRITE)
                idata = memory_readmax64(cpu, data, len);

        /*
         *  NOTE: It is up to the user of this device to read or write
         *  correct addresses. (A write to NCPUS is pretty useless,
         *  for example.)
         */

        switch (relative_addr) {

        case DEV_MP_WHOAMI:
                odata = cpu->cpu_id;
                break;

        case DEV_MP_NCPUS:
                odata = cpu->machine->ncpus;
                break;

        case DEV_MP_STARTUPCPU:
                which_cpu = idata;
                d->cpus[which_cpu]->pc = d->startup_addr;
                switch (cpu->machine->arch) {
                case ARCH_MIPS:
                        d->cpus[which_cpu]->cd.mips.gpr[MIPS_GPR_SP] =
                            d->stack_addr;
                        break;
                case ARCH_PPC:
                        d->cpus[which_cpu]->cd.ppc.gpr[1] = d->stack_addr;
                        break;
                default:
                        fatal("dev_mp(): DEV_MP_STARTUPCPU: not for this"
                            " arch yet!\n");
                        exit(1);
                }
                d->cpus[which_cpu]->running = 1;
                /*  debug("[ dev_mp: starting up cpu%i at 0x%llx ]\n", 
                    which_cpu, (long long)d->startup_addr);  */
                break;

        case DEV_MP_STARTUPADDR:
                if (len==4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
                        idata |= 0xffffffff00000000ULL;
                d->startup_addr = idata;
                break;

        case DEV_MP_PAUSE_ADDR:
                d->pause_addr = idata;
                break;

        case DEV_MP_PAUSE_CPU:
                /*  Pause all cpus except a specific CPU:  */
                which_cpu = idata;

                for (i=0; i<cpu->machine->ncpus; i++)
                        if (i != which_cpu)
                                d->cpus[i]->running = 0;
                break;

        case DEV_MP_UNPAUSE_CPU:
                /*  Unpause a specific CPU:  */
                which_cpu = idata;

                if (which_cpu >= 0 && which_cpu <cpu->machine->ncpus)
                        d->cpus[which_cpu]->running = 1;
                break;

        case DEV_MP_STARTUPSTACK:
                if (len == 4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
                        idata |= 0xffffffff00000000ULL;
                d->stack_addr = idata;
                break;

        case DEV_MP_HARDWARE_RANDOM:
                /*
                 *  Return (up to) 64 bits of "hardware random":
                 *
                 *  NOTE: Remember that random() is (usually) 31 bits of
                 *        random data, _NOT_ 32, hence this construction.
                 */
                odata = random();
                odata = (odata << 31) ^ random();
                odata = (odata << 31) ^ random();
                break;

        case DEV_MP_MEMORY:
                /*
                 *  Return the number of bytes of memory in the system.
                 *
                 *  (It is assumed to be located at physical address 0.
                 *  It is actually located at machine->memory_offset_in_mb
                 *  but that is only used for SGI emulation so far.)
                 */
                odata = cpu->machine->physical_ram_in_mb * 1048576;
                break;

        case DEV_MP_IPI_ONE:
        case DEV_MP_IPI_MANY:
                /*
                 *  idata should be of the form:
                 *
                 *              (IPI_nr << 16) | cpu_id
                 *
                 *  This will send an Inter-processor interrupt to a specific
                 *  CPU. (DEV_MP_IPI_MANY sends to all _except_ the specific
                 *  CPU.)
                 *
                 *  Sending an IPI means adding the IPI last in the list of
                 *  pending IPIs, and asserting the IPI "pin".
                 */
                which_cpu = (idata & 0xffff);
                for (i=0; i<cpu->machine->ncpus; i++) {
                        int send_it = 0;
                        if (relative_addr == DEV_MP_IPI_ONE && i == which_cpu)
                                send_it = 1;
                        if (relative_addr == DEV_MP_IPI_MANY && i != which_cpu)
                                send_it = 1;
                        if (send_it) {
                                d->n_pending_ipis[i] ++;
                                d->ipi[i] = realloc(d->ipi[i],
                                    d->n_pending_ipis[i] * sizeof(int));
                                if (d->ipi[i] == NULL) {
                                        fprintf(stderr, "out of memory\n");
                                        exit(1);
                                }
                                /*  Add the IPI last in the array:  */
                                d->ipi[i][d->n_pending_ipis[i] - 1] =
                                    idata >> 16;
                                cpu_interrupt(d->cpus[i], MIPS_IPI_INT);
                        }
                }
                break;

        case DEV_MP_IPI_READ:
                /*
                 *  If the current CPU has any IPIs pending, accessing this
                 *  address reads the IPI value. (Writing to this address
                 *  discards _all_ pending IPIs.)  If there is no pending
                 *  IPI, then 0 is returned. Usage of the value 0 for real
                 *  IPIs should thus be avoided.
                 */
                if (writeflag == MEM_WRITE) {
                        d->n_pending_ipis[cpu->cpu_id] = 0;
                }
                odata = 0;
                if (d->n_pending_ipis[cpu->cpu_id] > 0) {
                        odata = d->ipi[cpu->cpu_id][0];
                        if (d->n_pending_ipis[cpu->cpu_id]-- > 1)
                                memmove(&d->ipi[cpu->cpu_id][0],
                                    &d->ipi[cpu->cpu_id][1],
                                    d->n_pending_ipis[cpu->cpu_id]);
                }
                /*  Deassert the interrupt, if there are no pending IPIs:  */
                if (d->n_pending_ipis[cpu->cpu_id] == 0)
                        cpu_interrupt_ack(d->cpus[cpu->cpu_id], MIPS_IPI_INT);
                break;

        case DEV_MP_NCYCLES:
                /*
                 *  Return _approximately_ the number of cycles executed
                 *  in this machine.
                 *
                 *  Note: At the moment, this is actually the number of
                 *  instructions executed on CPU 0.
                 *
                 *  (This value is not updated for each instruction.)
                 */
                odata = cpu->machine->ninstrs;
                break;

        default:
                fatal("[ dev_mp: unimplemented relative addr 0x%x ]\n",
                    relative_addr);
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


DEVINIT(mp)
{
        struct mp_data *d;
        int n;

        d = malloc(sizeof(struct mp_data));
        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct mp_data));
        d->cpus = devinit->machine->cpus;
        d->startup_addr = INITIAL_PC;
        d->stack_addr = INITIAL_STACK_POINTER;

        n = devinit->machine->ncpus;
        d->n_pending_ipis = malloc(n * sizeof(int));
        d->ipi = malloc(n * sizeof(int *));
        if (d->ipi == NULL || d->n_pending_ipis == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d->n_pending_ipis, 0, sizeof(int) * n);
        memset(d->ipi, 0, sizeof(int *) * n);

        memory_device_register(devinit->machine->memory, devinit->name,
            devinit->addr, DEV_MP_LENGTH, dev_mp_access, d, DM_DEFAULT, NULL);

        return 1;
}

1	dpavlin	4	/*
2	dpavlin	22	* Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3	dpavlin	4	*
4			* Redistribution and use in source and binary forms, with or without
5			* modification, are permitted provided that the following conditions are met:
6			*
7			* 1. Redistributions of source code must retain the above copyright
8			* notice, this list of conditions and the following disclaimer.
9			* 2. Redistributions in binary form must reproduce the above copyright
10			* notice, this list of conditions and the following disclaimer in the
11			* documentation and/or other materials provided with the distribution.
12			* 3. The name of the author may not be used to endorse or promote products
13			* derived from this software without specific prior written permission.
14			*
15			* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16			* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17			* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18			* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19			* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20			* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21			* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22			* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23			* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24			* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25			* SUCH DAMAGE.
26			*
27			*
28	dpavlin	28	* $Id: dev_mp.c,v 1.37 2006/07/01 21:15:46 debug Exp $
29	dpavlin	4	*
30			* This is a fake multiprocessor (MP) device. It can be useful for
31			* theoretical experiments, but probably bares no resemblance to any
32			* multiprocessor controller used in any real machine.
33			*/
34
35			#include <stdio.h>
36			#include <stdlib.h>
37			#include <string.h>
38
39			#include "cpu.h"
40			#include "cpu_mips.h"
41			#include "device.h"
42			#include "machine.h"
43			#include "memory.h"
44			#include "misc.h"
45
46	dpavlin	24	#include "testmachine/dev_mp.h"
47	dpavlin	4
48	dpavlin	24
49	dpavlin	4	struct mp_data {
50			struct cpu **cpus;
51			uint64_t startup_addr;
52			uint64_t stack_addr;
53			uint64_t pause_addr;
54	dpavlin	8
55			/* Each CPU has an array of pending ipis. */
56			int *n_pending_ipis;
57			int **ipi;
58	dpavlin	4	};
59
60
61	dpavlin	8	extern int single_step;
62
63
64	dpavlin	4	/*
65			* dev_mp_access():
66			*/
67	dpavlin	22	DEVICE_ACCESS(mp)
68	dpavlin	4	{
69			struct mp_data *d = extra;
70			int i, which_cpu;
71			uint64_t idata = 0, odata = 0;
72
73	dpavlin	18	if (writeflag == MEM_WRITE)
74			idata = memory_readmax64(cpu, data, len);
75	dpavlin	4
76			/*
77			* NOTE: It is up to the user of this device to read or write
78			* correct addresses. (A write to NCPUS is pretty useless,
79			* for example.)
80			*/
81
82			switch (relative_addr) {
83
84			case DEV_MP_WHOAMI:
85			odata = cpu->cpu_id;
86			break;
87
88			case DEV_MP_NCPUS:
89			odata = cpu->machine->ncpus;
90			break;
91
92			case DEV_MP_STARTUPCPU:
93			which_cpu = idata;
94			d->cpus[which_cpu]->pc = d->startup_addr;
95			switch (cpu->machine->arch) {
96			case ARCH_MIPS:
97			d->cpus[which_cpu]->cd.mips.gpr[MIPS_GPR_SP] =
98			d->stack_addr;
99			break;
100			case ARCH_PPC:
101			d->cpus[which_cpu]->cd.ppc.gpr[1] = d->stack_addr;
102			break;
103			default:
104			fatal("dev_mp(): DEV_MP_STARTUPCPU: not for this"
105			" arch yet!\n");
106			exit(1);
107			}
108			d->cpus[which_cpu]->running = 1;
109			/* debug("[ dev_mp: starting up cpu%i at 0x%llx ]\n",
110			which_cpu, (long long)d->startup_addr); */
111			break;
112
113			case DEV_MP_STARTUPADDR:
114			if (len==4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
115			idata \|= 0xffffffff00000000ULL;
116			d->startup_addr = idata;
117			break;
118
119			case DEV_MP_PAUSE_ADDR:
120			d->pause_addr = idata;
121			break;
122
123			case DEV_MP_PAUSE_CPU:
124	dpavlin	24	/* Pause all cpus except a specific CPU: */
125	dpavlin	4	which_cpu = idata;
126
127			for (i=0; i<cpu->machine->ncpus; i++)
128	dpavlin	22	if (i != which_cpu)
129	dpavlin	4	d->cpus[i]->running = 0;
130			break;
131
132			case DEV_MP_UNPAUSE_CPU:
133	dpavlin	22	/* Unpause a specific CPU: */
134	dpavlin	4	which_cpu = idata;
135	dpavlin	22
136			if (which_cpu >= 0 && which_cpu <cpu->machine->ncpus)
137			d->cpus[which_cpu]->running = 1;
138	dpavlin	4	break;
139
140			case DEV_MP_STARTUPSTACK:
141			if (len == 4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
142			idata \|= 0xffffffff00000000ULL;
143			d->stack_addr = idata;
144			break;
145
146			case DEV_MP_HARDWARE_RANDOM:
147	dpavlin	22	/*
148			* Return (up to) 64 bits of "hardware random":
149			*
150			* NOTE: Remember that random() is (usually) 31 bits of
151			* random data, _NOT_ 32, hence this construction.
152			*/
153	dpavlin	4	odata = random();
154			odata = (odata << 31) ^ random();
155			odata = (odata << 31) ^ random();
156			break;
157
158			case DEV_MP_MEMORY:
159			/*
160			* Return the number of bytes of memory in the system.
161			*
162			* (It is assumed to be located at physical address 0.
163			* It is actually located at machine->memory_offset_in_mb
164			* but that is only used for SGI emulation so far.)
165			*/
166			odata = cpu->machine->physical_ram_in_mb * 1048576;
167			break;
168
169	dpavlin	8	case DEV_MP_IPI_ONE:
170			case DEV_MP_IPI_MANY:
171			/*
172			* idata should be of the form:
173			*
174			* (IPI_nr << 16) \| cpu_id
175			*
176			* This will send an Inter-processor interrupt to a specific
177			* CPU. (DEV_MP_IPI_MANY sends to all _except_ the specific
178			* CPU.)
179			*
180			* Sending an IPI means adding the IPI last in the list of
181			* pending IPIs, and asserting the IPI "pin".
182			*/
183			which_cpu = (idata & 0xffff);
184			for (i=0; i<cpu->machine->ncpus; i++) {
185			int send_it = 0;
186			if (relative_addr == DEV_MP_IPI_ONE && i == which_cpu)
187			send_it = 1;
188			if (relative_addr == DEV_MP_IPI_MANY && i != which_cpu)
189			send_it = 1;
190			if (send_it) {
191			d->n_pending_ipis[i] ++;
192			d->ipi[i] = realloc(d->ipi[i],
193			d->n_pending_ipis[i] * sizeof(int));
194			if (d->ipi[i] == NULL) {
195			fprintf(stderr, "out of memory\n");
196			exit(1);
197			}
198			/* Add the IPI last in the array: */
199			d->ipi[i][d->n_pending_ipis[i] - 1] =
200			idata >> 16;
201			cpu_interrupt(d->cpus[i], MIPS_IPI_INT);
202			}
203			}
204			break;
205
206			case DEV_MP_IPI_READ:
207			/*
208			* If the current CPU has any IPIs pending, accessing this
209			* address reads the IPI value. (Writing to this address
210			* discards _all_ pending IPIs.) If there is no pending
211			* IPI, then 0 is returned. Usage of the value 0 for real
212			* IPIs should thus be avoided.
213			*/
214			if (writeflag == MEM_WRITE) {
215			d->n_pending_ipis[cpu->cpu_id] = 0;
216			}
217			odata = 0;
218			if (d->n_pending_ipis[cpu->cpu_id] > 0) {
219			odata = d->ipi[cpu->cpu_id][0];
220			if (d->n_pending_ipis[cpu->cpu_id]-- > 1)
221			memmove(&d->ipi[cpu->cpu_id][0],
222			&d->ipi[cpu->cpu_id][1],
223			d->n_pending_ipis[cpu->cpu_id]);
224			}
225			/* Deassert the interrupt, if there are no pending IPIs: */
226			if (d->n_pending_ipis[cpu->cpu_id] == 0)
227			cpu_interrupt_ack(d->cpus[cpu->cpu_id], MIPS_IPI_INT);
228			break;
229
230	dpavlin	14	case DEV_MP_NCYCLES:
231			/*
232	dpavlin	28	* Return _approximately_ the number of cycles executed
233			* in this machine.
234			*
235			* Note: At the moment, this is actually the number of
236			* instructions executed on CPU 0.
237			*
238			* (This value is not updated for each instruction.)
239	dpavlin	14	*/
240	dpavlin	28	odata = cpu->machine->ninstrs;
241	dpavlin	14	break;
242
243	dpavlin	4	default:
244			fatal("[ dev_mp: unimplemented relative addr 0x%x ]\n",
245			relative_addr);
246			}
247
248			if (writeflag == MEM_READ)
249			memory_writemax64(cpu, data, len, odata);
250
251			return 1;
252			}
253
254
255	dpavlin	22	DEVINIT(mp)
256	dpavlin	4	{
257			struct mp_data *d;
258	dpavlin	8	int n;
259
260	dpavlin	4	d = malloc(sizeof(struct mp_data));
261			if (d == NULL) {
262			fprintf(stderr, "out of memory\n");
263			exit(1);
264			}
265			memset(d, 0, sizeof(struct mp_data));
266			d->cpus = devinit->machine->cpus;
267			d->startup_addr = INITIAL_PC;
268			d->stack_addr = INITIAL_STACK_POINTER;
269
270	dpavlin	8	n = devinit->machine->ncpus;
271			d->n_pending_ipis = malloc(n * sizeof(int));
272			d->ipi = malloc(n * sizeof(int *));
273			if (d->ipi == NULL \|\| d->n_pending_ipis == NULL) {
274			fprintf(stderr, "out of memory\n");
275			exit(1);
276			}
277			memset(d->n_pending_ipis, 0, sizeof(int) * n);
278			memset(d->ipi, 0, sizeof(int ) n);
279	dpavlin	4
280	dpavlin	8	memory_device_register(devinit->machine->memory, devinit->name,
281	dpavlin	20	devinit->addr, DEV_MP_LENGTH, dev_mp_access, d, DM_DEFAULT, NULL);
282	dpavlin	8
283	dpavlin	4	return 1;
284			}
285