/[gxemul]/trunk/src/devices/dev_mp.c
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Annotation of /trunk/src/devices/dev_mp.c

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Mon Oct 8 16:19:37 2007 UTC (14 years, 7 months ago) by dpavlin
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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 dpavlin 4 /*
2 dpavlin 22 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 dpavlin 4 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 22 * $Id: dev_mp.c,v 1.34 2006/02/09 20:02:59 debug Exp $
29 dpavlin 4 *
30     * This is a fake multiprocessor (MP) device. It can be useful for
31     * theoretical experiments, but probably bares no resemblance to any
32     * multiprocessor controller used in any real machine.
33     */
34    
35     #include <stdio.h>
36     #include <stdlib.h>
37     #include <string.h>
38    
39     #include "cpu.h"
40     #include "cpu_mips.h"
41     #include "device.h"
42     #include "machine.h"
43     #include "memory.h"
44     #include "misc.h"
45     #include "mp.h"
46    
47    
48     struct mp_data {
49     struct cpu **cpus;
50     uint64_t startup_addr;
51     uint64_t stack_addr;
52     uint64_t pause_addr;
53 dpavlin 8
54     /* Each CPU has an array of pending ipis. */
55     int *n_pending_ipis;
56     int **ipi;
57 dpavlin 4 };
58    
59    
60 dpavlin 8 extern int single_step;
61    
62    
63 dpavlin 4 /*
64     * dev_mp_access():
65     */
66 dpavlin 22 DEVICE_ACCESS(mp)
67 dpavlin 4 {
68     struct mp_data *d = extra;
69     int i, which_cpu;
70     uint64_t idata = 0, odata = 0;
71    
72 dpavlin 18 if (writeflag == MEM_WRITE)
73     idata = memory_readmax64(cpu, data, len);
74 dpavlin 4
75     /*
76     * NOTE: It is up to the user of this device to read or write
77     * correct addresses. (A write to NCPUS is pretty useless,
78     * for example.)
79     */
80    
81     switch (relative_addr) {
82    
83     case DEV_MP_WHOAMI:
84     odata = cpu->cpu_id;
85     break;
86    
87     case DEV_MP_NCPUS:
88     odata = cpu->machine->ncpus;
89     break;
90    
91     case DEV_MP_STARTUPCPU:
92     which_cpu = idata;
93     d->cpus[which_cpu]->pc = d->startup_addr;
94     switch (cpu->machine->arch) {
95     case ARCH_MIPS:
96     d->cpus[which_cpu]->cd.mips.gpr[MIPS_GPR_SP] =
97     d->stack_addr;
98     break;
99     case ARCH_PPC:
100     d->cpus[which_cpu]->cd.ppc.gpr[1] = d->stack_addr;
101     break;
102     default:
103     fatal("dev_mp(): DEV_MP_STARTUPCPU: not for this"
104     " arch yet!\n");
105     exit(1);
106     }
107     d->cpus[which_cpu]->running = 1;
108     /* debug("[ dev_mp: starting up cpu%i at 0x%llx ]\n",
109     which_cpu, (long long)d->startup_addr); */
110     break;
111    
112     case DEV_MP_STARTUPADDR:
113     if (len==4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
114     idata |= 0xffffffff00000000ULL;
115     d->startup_addr = idata;
116     break;
117    
118     case DEV_MP_PAUSE_ADDR:
119     d->pause_addr = idata;
120     break;
121    
122     case DEV_MP_PAUSE_CPU:
123     /* Pause all cpus except our selves: */
124     which_cpu = idata;
125    
126     for (i=0; i<cpu->machine->ncpus; i++)
127 dpavlin 22 if (i != which_cpu)
128 dpavlin 4 d->cpus[i]->running = 0;
129     break;
130    
131     case DEV_MP_UNPAUSE_CPU:
132 dpavlin 22 /* Unpause a specific CPU: */
133 dpavlin 4 which_cpu = idata;
134 dpavlin 22
135     if (which_cpu >= 0 && which_cpu <cpu->machine->ncpus)
136     d->cpus[which_cpu]->running = 1;
137 dpavlin 4 break;
138    
139     case DEV_MP_STARTUPSTACK:
140     if (len == 4 && (idata >> 32) == 0 && (idata & 0x80000000ULL))
141     idata |= 0xffffffff00000000ULL;
142     d->stack_addr = idata;
143     break;
144    
145     case DEV_MP_HARDWARE_RANDOM:
146 dpavlin 22 /*
147     * Return (up to) 64 bits of "hardware random":
148     *
149     * NOTE: Remember that random() is (usually) 31 bits of
150     * random data, _NOT_ 32, hence this construction.
151     */
152 dpavlin 4 odata = random();
153     odata = (odata << 31) ^ random();
154     odata = (odata << 31) ^ random();
155     break;
156    
157     case DEV_MP_MEMORY:
158     /*
159     * Return the number of bytes of memory in the system.
160     *
161     * (It is assumed to be located at physical address 0.
162     * It is actually located at machine->memory_offset_in_mb
163     * but that is only used for SGI emulation so far.)
164     */
165     odata = cpu->machine->physical_ram_in_mb * 1048576;
166     break;
167    
168 dpavlin 8 case DEV_MP_IPI_ONE:
169     case DEV_MP_IPI_MANY:
170     /*
171     * idata should be of the form:
172     *
173     * (IPI_nr << 16) | cpu_id
174     *
175     * This will send an Inter-processor interrupt to a specific
176     * CPU. (DEV_MP_IPI_MANY sends to all _except_ the specific
177     * CPU.)
178     *
179     * Sending an IPI means adding the IPI last in the list of
180     * pending IPIs, and asserting the IPI "pin".
181     */
182     which_cpu = (idata & 0xffff);
183     for (i=0; i<cpu->machine->ncpus; i++) {
184     int send_it = 0;
185     if (relative_addr == DEV_MP_IPI_ONE && i == which_cpu)
186     send_it = 1;
187     if (relative_addr == DEV_MP_IPI_MANY && i != which_cpu)
188     send_it = 1;
189     if (send_it) {
190     d->n_pending_ipis[i] ++;
191     d->ipi[i] = realloc(d->ipi[i],
192     d->n_pending_ipis[i] * sizeof(int));
193     if (d->ipi[i] == NULL) {
194     fprintf(stderr, "out of memory\n");
195     exit(1);
196     }
197     /* Add the IPI last in the array: */
198     d->ipi[i][d->n_pending_ipis[i] - 1] =
199     idata >> 16;
200     cpu_interrupt(d->cpus[i], MIPS_IPI_INT);
201     }
202     }
203     break;
204    
205     case DEV_MP_IPI_READ:
206     /*
207     * If the current CPU has any IPIs pending, accessing this
208     * address reads the IPI value. (Writing to this address
209     * discards _all_ pending IPIs.) If there is no pending
210     * IPI, then 0 is returned. Usage of the value 0 for real
211     * IPIs should thus be avoided.
212     */
213     if (writeflag == MEM_WRITE) {
214     d->n_pending_ipis[cpu->cpu_id] = 0;
215     }
216     odata = 0;
217     if (d->n_pending_ipis[cpu->cpu_id] > 0) {
218     odata = d->ipi[cpu->cpu_id][0];
219     if (d->n_pending_ipis[cpu->cpu_id]-- > 1)
220     memmove(&d->ipi[cpu->cpu_id][0],
221     &d->ipi[cpu->cpu_id][1],
222     d->n_pending_ipis[cpu->cpu_id]);
223     }
224     /* Deassert the interrupt, if there are no pending IPIs: */
225     if (d->n_pending_ipis[cpu->cpu_id] == 0)
226     cpu_interrupt_ack(d->cpus[cpu->cpu_id], MIPS_IPI_INT);
227     break;
228    
229 dpavlin 14 case DEV_MP_NCYCLES:
230     /*
231     * Return approximately the number of cycles executed
232     * in this machine. (This value is not updated for each
233     * instruction.)
234     */
235     odata = cpu->machine->ncycles;
236     break;
237    
238 dpavlin 4 default:
239     fatal("[ dev_mp: unimplemented relative addr 0x%x ]\n",
240     relative_addr);
241     }
242    
243     if (writeflag == MEM_READ)
244     memory_writemax64(cpu, data, len, odata);
245    
246     return 1;
247     }
248    
249    
250 dpavlin 22 DEVINIT(mp)
251 dpavlin 4 {
252     struct mp_data *d;
253 dpavlin 8 int n;
254    
255 dpavlin 4 d = malloc(sizeof(struct mp_data));
256     if (d == NULL) {
257     fprintf(stderr, "out of memory\n");
258     exit(1);
259     }
260     memset(d, 0, sizeof(struct mp_data));
261     d->cpus = devinit->machine->cpus;
262     d->startup_addr = INITIAL_PC;
263     d->stack_addr = INITIAL_STACK_POINTER;
264    
265 dpavlin 8 n = devinit->machine->ncpus;
266     d->n_pending_ipis = malloc(n * sizeof(int));
267     d->ipi = malloc(n * sizeof(int *));
268     if (d->ipi == NULL || d->n_pending_ipis == NULL) {
269     fprintf(stderr, "out of memory\n");
270     exit(1);
271     }
272     memset(d->n_pending_ipis, 0, sizeof(int) * n);
273     memset(d->ipi, 0, sizeof(int *) * n);
274 dpavlin 4
275 dpavlin 8 memory_device_register(devinit->machine->memory, devinit->name,
276 dpavlin 20 devinit->addr, DEV_MP_LENGTH, dev_mp_access, d, DM_DEFAULT, NULL);
277 dpavlin 8
278 dpavlin 4 return 1;
279     }
280    

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