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/* |
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* Copyright (C) 2003-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_mc146818.c,v 1.91 2006/10/07 03:20:19 debug Exp $ |
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* |
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* MC146818 real-time clock, used by many different machines types. |
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* (DS1687 as used in some other machines is also similar to the MC146818.) |
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* |
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* This device contains Date/time, the machine's ethernet address (on |
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* DECstation 3100), and can cause periodic (hardware) interrupts. |
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* |
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* NOTE: Many register offsets are multiplied by 4 in this code; this is |
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* because I originally wrote it for DECstation 3100 emulation, where the |
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* registered are spaced that way. |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include <time.h> |
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#include "cpu.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "timer.h" |
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#include "mc146818reg.h" |
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#define to_bcd(x) ( ((x)/10) * 16 + ((x)%10) ) |
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#define from_bcd(x) ( ((x)>>4) * 10 + ((x)&15) ) |
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|
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/* #define MC146818_DEBUG */ |
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#define TICK_SHIFT 14 |
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/* 256 on DECstation, SGI uses reg at 72*4 as the Century */ |
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#define N_REGISTERS 1024 |
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struct mc_data { |
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int access_style; |
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int last_addr; |
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|
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int register_choice; |
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int reg[N_REGISTERS]; |
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int addrdiv; |
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|
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int use_bcd; |
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|
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int timebase_hz; |
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int interrupt_hz; |
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int old_interrupt_hz; |
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int irq_nr; |
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struct timer *timer; |
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volatile int pending_timer_interrupts; |
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|
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int previous_second; |
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int n_seconds_elapsed; |
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int uip_threshold; |
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|
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int ugly_netbsd_prep_hack_done; |
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int ugly_netbsd_prep_hack_sec; |
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}; |
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/* |
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* Ugly hack to fool NetBSD/prep to accept the clock. (See mcclock_isa_match |
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* in NetBSD's arch/prep/isa/mcclock_isa.c for details.) |
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*/ |
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#define NETBSD_HACK_INIT 0 |
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#define NETBSD_HACK_FIRST_1 1 |
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#define NETBSD_HACK_FIRST_2 2 |
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#define NETBSD_HACK_SECOND_1 3 |
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#define NETBSD_HACK_SECOND_2 4 |
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#define NETBSD_HACK_DONE 5 |
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/* |
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* timer_tick(): |
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* |
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* Called d->interrupt_hz times per (real-world) second. |
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*/ |
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static void timer_tick(struct timer *timer, void *extra) |
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{ |
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struct mc_data *d = (struct mc_data *) extra; |
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d->pending_timer_interrupts ++; |
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} |
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DEVICE_TICK(mc146818) |
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{ |
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struct mc_data *d = extra; |
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int pti = d->pending_timer_interrupts; |
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|
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if ((d->reg[MC_REGB * 4] & MC_REGB_PIE) && pti > 0) { |
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static int warned = 0; |
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if (pti > 800 && !warned) { |
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warned = 1; |
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fatal("[ WARNING: MC146818 interrupts lost, " |
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"host too slow? ]\n"); |
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} |
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#if 0 |
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/* For debugging, to see how much the interrupts are |
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lagging behind the real clock: */ |
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{ |
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static int x = 0; |
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if (++x == 1) { |
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x = 0; |
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printf("%i ", pti); |
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fflush(stdout); |
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} |
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} |
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#endif |
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|
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cpu_interrupt(cpu, d->irq_nr); |
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|
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d->reg[MC_REGC * 4] |= MC_REGC_PF; |
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} |
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if (d->reg[MC_REGC * 4] & MC_REGC_UF || |
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d->reg[MC_REGC * 4] & MC_REGC_AF || |
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d->reg[MC_REGC * 4] & MC_REGC_PF) |
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d->reg[MC_REGC * 4] |= MC_REGC_IRQF; |
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} |
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/* |
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* dev_mc146818_jazz_access(): |
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* |
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* It seems like JAZZ machines accesses the mc146818 by writing one byte to |
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* 0x90000070 and then reading or writing another byte at 0x......0004000. |
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*/ |
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int dev_mc146818_jazz_access(struct cpu *cpu, struct memory *mem, |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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{ |
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struct mc_data *d = extra; |
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#ifdef MC146818_DEBUG |
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if (writeflag == MEM_WRITE) { |
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int i; |
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fatal("[ mc146818_jazz: write to addr=0x%04x: ", |
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(int)relative_addr); |
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for (i=0; i<len; i++) |
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fatal("%02x ", data[i]); |
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fatal("]\n"); |
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} else |
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fatal("[ mc146818_jazz: read from addr=0x%04x ]\n", |
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(int)relative_addr); |
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#endif |
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if (writeflag == MEM_WRITE) { |
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d->last_addr = data[0]; |
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return 1; |
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} else { |
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data[0] = d->last_addr; |
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return 1; |
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} |
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} |
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/* |
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* mc146818_update_time(): |
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* |
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* This function updates the MC146818 registers by reading |
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* the host's clock. |
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*/ |
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static void mc146818_update_time(struct mc_data *d) |
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{ |
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struct tm *tmp; |
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time_t timet; |
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timet = time(NULL); |
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tmp = gmtime(&timet); |
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d->reg[4 * MC_SEC] = tmp->tm_sec; |
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d->reg[4 * MC_MIN] = tmp->tm_min; |
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d->reg[4 * MC_HOUR] = tmp->tm_hour; |
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d->reg[4 * MC_DOW] = tmp->tm_wday + 1; |
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d->reg[4 * MC_DOM] = tmp->tm_mday; |
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d->reg[4 * MC_MONTH] = tmp->tm_mon + 1; |
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d->reg[4 * MC_YEAR] = tmp->tm_year; |
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/* |
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* Special hacks for emulating the behaviour of various machines: |
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*/ |
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switch (d->access_style) { |
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case MC146818_ALGOR: |
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/* |
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* NetBSD/evbmips sources indicate that the Algor year base |
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* is 1920. This makes the time work with NetBSD in Malta |
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* emulation. However, for Linux, commenting out this line |
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* works better. (TODO: Find a way to make both work?) |
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*/ |
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d->reg[4 * MC_YEAR] += 80; |
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break; |
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case MC146818_ARC_NEC: |
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d->reg[4 * MC_YEAR] += (0x18 - 104); |
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break; |
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case MC146818_CATS: |
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d->reg[4 * MC_YEAR] %= 100; |
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break; |
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case MC146818_SGI: |
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/* |
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* NetBSD/sgimips assumes data in BCD format. |
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* Also, IRIX stores the year value in a weird |
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* format, according to ../arch/sgimips/sgimips/clockvar.h |
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* in NetBSD: |
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* |
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* "If year < 1985, store (year - 1970), else |
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* (year - 1940). This matches IRIX semantics." |
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* |
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* Another rule: It seems that a real SGI IP32 box |
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* uses the value 5 for the year 2005. |
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*/ |
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d->reg[4 * MC_YEAR] = |
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d->reg[4 * MC_YEAR] >= 100 ? |
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(d->reg[4 * MC_YEAR] - 100) : |
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( |
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d->reg[4 * MC_YEAR] < 85 ? |
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(d->reg[4 * MC_YEAR] - 30 + 40) |
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: (d->reg[4 * MC_YEAR] - 40) |
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); |
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/* Century: */ |
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d->reg[72 * 4] = 19 + (tmp->tm_year / 100); |
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break; |
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case MC146818_DEC: |
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/* |
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* DECstations must have 72 or 73 in the |
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* Year field, or Ultrix screems. (Weird.) |
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*/ |
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d->reg[4 * MC_YEAR] = 72; |
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/* |
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* Linux on DECstation stores the year in register 63, |
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* but no other DECstation OS does? (Hm.) |
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*/ |
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d->reg[4 * 63] = tmp->tm_year - 100; |
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break; |
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} |
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if (d->use_bcd) { |
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d->reg[4 * MC_SEC] = to_bcd(d->reg[4 * MC_SEC]); |
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d->reg[4 * MC_MIN] = to_bcd(d->reg[4 * MC_MIN]); |
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d->reg[4 * MC_HOUR] = to_bcd(d->reg[4 * MC_HOUR]); |
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d->reg[4 * MC_DOW] = to_bcd(d->reg[4 * MC_DOW]); |
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d->reg[4 * MC_DOM] = to_bcd(d->reg[4 * MC_DOM]); |
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d->reg[4 * MC_MONTH] = to_bcd(d->reg[4 * MC_MONTH]); |
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d->reg[4 * MC_YEAR] = to_bcd(d->reg[4 * MC_YEAR]); |
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/* Used by Linux on DECstation: (Hm) */ |
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d->reg[4 * 63] = to_bcd(d->reg[4 * 63]); |
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/* Used on SGI: */ |
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d->reg[4 * 72] = to_bcd(d->reg[4 * 72]); |
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} |
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} |
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286 |
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287 |
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/* |
288 |
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* dev_mc146818_access(): |
289 |
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* |
290 |
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* TODO: This access function only handles 8-bit accesses! |
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*/ |
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int dev_mc146818_access(struct cpu *cpu, struct memory *mem, |
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uint64_t r, unsigned char *data, size_t len, |
294 |
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int writeflag, void *extra) |
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{ |
296 |
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struct tm *tmp; |
297 |
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time_t timet; |
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struct mc_data *d = extra; |
299 |
dpavlin |
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int relative_addr = r; |
300 |
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size_t i; |
301 |
dpavlin |
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302 |
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relative_addr /= d->addrdiv; |
303 |
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304 |
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/* Different ways of accessing the registers: */ |
305 |
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switch (d->access_style) { |
306 |
dpavlin |
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case MC146818_ALGOR: |
307 |
dpavlin |
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case MC146818_CATS: |
308 |
dpavlin |
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case MC146818_PC_CMOS: |
309 |
dpavlin |
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if ((relative_addr & 1) == 0x00) { |
310 |
dpavlin |
4 |
if (writeflag == MEM_WRITE) { |
311 |
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d->last_addr = data[0]; |
312 |
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return 1; |
313 |
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} else { |
314 |
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data[0] = d->last_addr; |
315 |
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return 1; |
316 |
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} |
317 |
dpavlin |
16 |
} else |
318 |
dpavlin |
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relative_addr = d->last_addr * 4; |
319 |
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break; |
320 |
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case MC146818_ARC_NEC: |
321 |
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if (relative_addr == 0x01) { |
322 |
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if (writeflag == MEM_WRITE) { |
323 |
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d->last_addr = data[0]; |
324 |
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return 1; |
325 |
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} else { |
326 |
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data[0] = d->last_addr; |
327 |
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return 1; |
328 |
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} |
329 |
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} else if (relative_addr == 0x00) |
330 |
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relative_addr = d->last_addr * 4; |
331 |
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else { |
332 |
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fatal("[ mc146818: not accessed as an " |
333 |
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"MC146818_ARC_NEC device! ]\n"); |
334 |
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} |
335 |
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break; |
336 |
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case MC146818_ARC_JAZZ: |
337 |
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/* See comment for dev_mc146818_jazz_access(). */ |
338 |
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relative_addr = d->last_addr * 4; |
339 |
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break; |
340 |
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case MC146818_DEC: |
341 |
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case MC146818_SGI: |
342 |
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/* |
343 |
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* This device was originally written for DECstation |
344 |
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* emulation, so no changes are necessary for that access |
345 |
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* style. |
346 |
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* |
347 |
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* SGI access bytes 0x0..0xd at offsets 0x0yz..0xdyz, where yz |
348 |
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* should be ignored. It works _almost_ as DEC, if offsets are |
349 |
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* divided by 0x40. |
350 |
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*/ |
351 |
dpavlin |
20 |
break; |
352 |
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case MC146818_PMPPC: |
353 |
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relative_addr *= 4; |
354 |
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break; |
355 |
dpavlin |
4 |
default: |
356 |
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; |
357 |
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} |
358 |
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359 |
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#ifdef MC146818_DEBUG |
360 |
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if (writeflag == MEM_WRITE) { |
361 |
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fatal("[ mc146818: write to addr=0x%04x (len %i): ", |
362 |
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(int)relative_addr, (int)len); |
363 |
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for (i=0; i<len; i++) |
364 |
dpavlin |
20 |
fatal("0x%02x ", data[i]); |
365 |
dpavlin |
4 |
fatal("]\n"); |
366 |
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} |
367 |
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#endif |
368 |
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369 |
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/* |
370 |
dpavlin |
12 |
* Sprite seems to wants UF interrupt status, once every second, or |
371 |
dpavlin |
4 |
* it hangs forever during bootup. (These do not cause interrupts, |
372 |
|
|
* but it is good enough... Sprite polls this, iirc.) |
373 |
dpavlin |
12 |
* |
374 |
|
|
* Linux on at least sgimips and evbmips (Malta) wants the UIP bit |
375 |
|
|
* in REGA to be updated once a second. |
376 |
dpavlin |
4 |
*/ |
377 |
dpavlin |
20 |
if (relative_addr == MC_REGA*4 || relative_addr == MC_REGC*4) { |
378 |
|
|
timet = time(NULL); |
379 |
|
|
tmp = gmtime(&timet); |
380 |
|
|
d->reg[MC_REGC * 4] &= ~MC_REGC_UF; |
381 |
|
|
if (tmp->tm_sec != d->previous_second) { |
382 |
|
|
d->n_seconds_elapsed ++; |
383 |
|
|
d->previous_second = tmp->tm_sec; |
384 |
|
|
} |
385 |
|
|
if (d->n_seconds_elapsed > d->uip_threshold) { |
386 |
|
|
d->n_seconds_elapsed = 0; |
387 |
dpavlin |
12 |
|
388 |
dpavlin |
20 |
d->reg[MC_REGA * 4] |= MC_REGA_UIP; |
389 |
dpavlin |
12 |
|
390 |
dpavlin |
20 |
d->reg[MC_REGC * 4] |= MC_REGC_UF; |
391 |
|
|
d->reg[MC_REGC * 4] |= MC_REGC_IRQF; |
392 |
dpavlin |
4 |
|
393 |
dpavlin |
20 |
/* For some reason, some Linux/DECstation KN04 |
394 |
|
|
kernels want the PF (periodic flag) bit set, |
395 |
|
|
even though interrupts are not enabled? */ |
396 |
|
|
d->reg[MC_REGC * 4] |= MC_REGC_PF; |
397 |
|
|
} else |
398 |
|
|
d->reg[MC_REGA * 4] &= ~MC_REGA_UIP; |
399 |
|
|
} |
400 |
dpavlin |
4 |
|
401 |
|
|
/* RTC data is in either BCD format or binary: */ |
402 |
dpavlin |
12 |
if (d->use_bcd) |
403 |
dpavlin |
4 |
d->reg[MC_REGB * 4] &= ~(1 << 2); |
404 |
dpavlin |
12 |
else |
405 |
dpavlin |
4 |
d->reg[MC_REGB * 4] |= (1 << 2); |
406 |
|
|
|
407 |
|
|
/* RTC date/time is always Valid: */ |
408 |
|
|
d->reg[MC_REGD * 4] |= MC_REGD_VRT; |
409 |
|
|
|
410 |
|
|
if (writeflag == MEM_WRITE) { |
411 |
|
|
/* WRITE: */ |
412 |
|
|
switch (relative_addr) { |
413 |
|
|
case MC_REGA*4: |
414 |
|
|
if ((data[0] & MC_REGA_DVMASK) == MC_BASE_32_KHz) |
415 |
|
|
d->timebase_hz = 32000; |
416 |
|
|
if ((data[0] & MC_REGA_DVMASK) == MC_BASE_1_MHz) |
417 |
|
|
d->timebase_hz = 1000000; |
418 |
|
|
if ((data[0] & MC_REGA_DVMASK) == MC_BASE_4_MHz) |
419 |
|
|
d->timebase_hz = 4000000; |
420 |
|
|
switch (data[0] & MC_REGA_RSMASK) { |
421 |
|
|
case MC_RATE_NONE: |
422 |
|
|
d->interrupt_hz = 0; |
423 |
|
|
break; |
424 |
|
|
case MC_RATE_1: |
425 |
|
|
if (d->timebase_hz == 32000) |
426 |
|
|
d->interrupt_hz = 256; |
427 |
|
|
else |
428 |
|
|
d->interrupt_hz = 32768; |
429 |
|
|
break; |
430 |
|
|
case MC_RATE_2: |
431 |
|
|
if (d->timebase_hz == 32000) |
432 |
|
|
d->interrupt_hz = 128; |
433 |
|
|
else |
434 |
|
|
d->interrupt_hz = 16384; |
435 |
|
|
break; |
436 |
|
|
case MC_RATE_8192_Hz: d->interrupt_hz = 8192; break; |
437 |
|
|
case MC_RATE_4096_Hz: d->interrupt_hz = 4096; break; |
438 |
|
|
case MC_RATE_2048_Hz: d->interrupt_hz = 2048; break; |
439 |
|
|
case MC_RATE_1024_Hz: d->interrupt_hz = 1024; break; |
440 |
|
|
case MC_RATE_512_Hz: d->interrupt_hz = 512; break; |
441 |
|
|
case MC_RATE_256_Hz: d->interrupt_hz = 256; break; |
442 |
|
|
case MC_RATE_128_Hz: d->interrupt_hz = 128; break; |
443 |
|
|
case MC_RATE_64_Hz: d->interrupt_hz = 64; break; |
444 |
|
|
case MC_RATE_32_Hz: d->interrupt_hz = 32; break; |
445 |
|
|
case MC_RATE_16_Hz: d->interrupt_hz = 16; break; |
446 |
|
|
case MC_RATE_8_Hz: d->interrupt_hz = 8; break; |
447 |
|
|
case MC_RATE_4_Hz: d->interrupt_hz = 4; break; |
448 |
|
|
case MC_RATE_2_Hz: d->interrupt_hz = 2; break; |
449 |
dpavlin |
20 |
default:/* debug("[ mc146818: unimplemented " |
450 |
dpavlin |
4 |
"MC_REGA RS: %i ]\n", |
451 |
|
|
data[0] & MC_REGA_RSMASK); */ |
452 |
|
|
; |
453 |
|
|
} |
454 |
|
|
|
455 |
dpavlin |
32 |
if (d->interrupt_hz != d->old_interrupt_hz) { |
456 |
|
|
debug("[ rtc changed to interrupt at %i Hz ]\n", |
457 |
|
|
d->interrupt_hz); |
458 |
dpavlin |
4 |
|
459 |
dpavlin |
32 |
d->old_interrupt_hz = d->interrupt_hz; |
460 |
dpavlin |
4 |
|
461 |
dpavlin |
32 |
if (d->timer == NULL) |
462 |
|
|
d->timer = timer_add(d->interrupt_hz, |
463 |
|
|
timer_tick, d); |
464 |
|
|
else |
465 |
|
|
timer_update_frequency(d->timer, |
466 |
|
|
d->interrupt_hz); |
467 |
|
|
} |
468 |
|
|
|
469 |
dpavlin |
4 |
d->reg[MC_REGA * 4] = |
470 |
|
|
data[0] & (MC_REGA_RSMASK | MC_REGA_DVMASK); |
471 |
|
|
break; |
472 |
|
|
case MC_REGB*4: |
473 |
|
|
d->reg[MC_REGB*4] = data[0]; |
474 |
|
|
if (!(data[0] & MC_REGB_PIE)) { |
475 |
|
|
cpu_interrupt_ack(cpu, d->irq_nr); |
476 |
|
|
} |
477 |
dpavlin |
32 |
|
478 |
dpavlin |
4 |
/* debug("[ mc146818: write to MC_REGB, data[0] " |
479 |
|
|
"= 0x%02x ]\n", data[0]); */ |
480 |
|
|
break; |
481 |
|
|
case MC_REGC*4: |
482 |
|
|
d->reg[MC_REGC * 4] = data[0]; |
483 |
|
|
debug("[ mc146818: write to MC_REGC, data[0] = " |
484 |
|
|
"0x%02x ]\n", data[0]); |
485 |
|
|
break; |
486 |
|
|
case 0x128: |
487 |
|
|
d->reg[relative_addr] = data[0]; |
488 |
|
|
if (data[0] & 8) { |
489 |
dpavlin |
22 |
int j; |
490 |
|
|
|
491 |
dpavlin |
4 |
/* Used on SGI to power off the machine. */ |
492 |
|
|
fatal("[ md146818: power off ]\n"); |
493 |
dpavlin |
22 |
for (j=0; j<cpu->machine->ncpus; j++) |
494 |
|
|
cpu->machine->cpus[j]->running = 0; |
495 |
dpavlin |
4 |
cpu->machine-> |
496 |
|
|
exit_without_entering_debugger = 1; |
497 |
|
|
} |
498 |
|
|
break; |
499 |
|
|
default: |
500 |
|
|
d->reg[relative_addr] = data[0]; |
501 |
|
|
|
502 |
|
|
debug("[ mc146818: unimplemented write to " |
503 |
|
|
"relative_addr = %08lx: ", (long)relative_addr); |
504 |
|
|
for (i=0; i<len; i++) |
505 |
|
|
debug("%02x ", data[i]); |
506 |
|
|
debug("]\n"); |
507 |
|
|
} |
508 |
|
|
} else { |
509 |
|
|
/* READ: */ |
510 |
|
|
switch (relative_addr) { |
511 |
|
|
case 0x01: /* Station's ethernet address (6 bytes) */ |
512 |
|
|
case 0x05: /* (on DECstation 3100) */ |
513 |
|
|
case 0x09: |
514 |
|
|
case 0x0d: |
515 |
|
|
case 0x11: |
516 |
|
|
case 0x15: |
517 |
|
|
break; |
518 |
|
|
case 4 * MC_SEC: |
519 |
dpavlin |
20 |
if (d->ugly_netbsd_prep_hack_done < NETBSD_HACK_DONE) { |
520 |
|
|
d->ugly_netbsd_prep_hack_done ++; |
521 |
|
|
switch (d->ugly_netbsd_prep_hack_done) { |
522 |
|
|
case NETBSD_HACK_FIRST_1: |
523 |
|
|
d->ugly_netbsd_prep_hack_sec = |
524 |
|
|
from_bcd(d->reg[relative_addr]); |
525 |
|
|
break; |
526 |
|
|
case NETBSD_HACK_FIRST_2: |
527 |
|
|
d->reg[relative_addr] = to_bcd( |
528 |
|
|
d->ugly_netbsd_prep_hack_sec); |
529 |
|
|
break; |
530 |
|
|
case NETBSD_HACK_SECOND_1: |
531 |
|
|
case NETBSD_HACK_SECOND_2: |
532 |
|
|
d->reg[relative_addr] = to_bcd((1 + |
533 |
|
|
d->ugly_netbsd_prep_hack_sec) % 60); |
534 |
|
|
break; |
535 |
|
|
} |
536 |
|
|
} |
537 |
dpavlin |
4 |
case 4 * MC_MIN: |
538 |
|
|
case 4 * MC_HOUR: |
539 |
|
|
case 4 * MC_DOW: |
540 |
|
|
case 4 * MC_DOM: |
541 |
|
|
case 4 * MC_MONTH: |
542 |
|
|
case 4 * MC_YEAR: |
543 |
|
|
case 4 * 63: /* 63 is used by Linux on DECstation */ |
544 |
|
|
case 4 * 72: /* 72 is Century, on SGI (DS1687) */ |
545 |
|
|
/* |
546 |
|
|
* If the SET bit is set, then we don't automatically |
547 |
|
|
* update the values. Otherwise, we update them by |
548 |
|
|
* reading from the host's clock: |
549 |
|
|
*/ |
550 |
|
|
if (d->reg[MC_REGB * 4] & MC_REGB_SET) |
551 |
|
|
break; |
552 |
|
|
|
553 |
dpavlin |
20 |
if (d->ugly_netbsd_prep_hack_done >= NETBSD_HACK_DONE) |
554 |
|
|
mc146818_update_time(d); |
555 |
dpavlin |
4 |
break; |
556 |
dpavlin |
20 |
case 4 * MC_REGA: |
557 |
|
|
break; |
558 |
dpavlin |
4 |
case 4 * MC_REGC: /* Interrupt ack. */ |
559 |
|
|
/* NOTE: Acking is done below, _after_ the |
560 |
|
|
register has been read. */ |
561 |
|
|
break; |
562 |
dpavlin |
20 |
default:debug("[ mc146818: read from relative_addr = " |
563 |
dpavlin |
4 |
"%04x ]\n", (int)relative_addr); |
564 |
|
|
} |
565 |
|
|
|
566 |
|
|
data[0] = d->reg[relative_addr]; |
567 |
|
|
|
568 |
|
|
if (relative_addr == MC_REGC*4) { |
569 |
|
|
cpu_interrupt_ack(cpu, d->irq_nr); |
570 |
dpavlin |
32 |
|
571 |
|
|
/* |
572 |
|
|
* Acknowledging an interrupt decreases the |
573 |
|
|
* number of pending "real world" timer ticks. |
574 |
|
|
*/ |
575 |
|
|
if (d->reg[MC_REGC * 4] & MC_REGC_PF) |
576 |
|
|
d->pending_timer_interrupts --; |
577 |
|
|
|
578 |
dpavlin |
4 |
d->reg[MC_REGC * 4] = 0x00; |
579 |
|
|
} |
580 |
|
|
} |
581 |
|
|
|
582 |
|
|
#ifdef MC146818_DEBUG |
583 |
|
|
if (writeflag == MEM_READ) { |
584 |
|
|
fatal("[ mc146818: read from addr=0x%04x (len %i): ", |
585 |
|
|
(int)relative_addr, (int)len); |
586 |
|
|
for (i=0; i<len; i++) |
587 |
dpavlin |
20 |
fatal("0x%02x ", data[i]); |
588 |
dpavlin |
4 |
fatal("]\n"); |
589 |
|
|
} |
590 |
|
|
#endif |
591 |
|
|
|
592 |
|
|
return 1; |
593 |
|
|
} |
594 |
|
|
|
595 |
|
|
|
596 |
|
|
/* |
597 |
|
|
* dev_mc146818_init(): |
598 |
|
|
* |
599 |
|
|
* This needs to work for both DECstation emulation and other machine types, |
600 |
|
|
* so it contains both rtc related stuff and the station's Ethernet address. |
601 |
|
|
*/ |
602 |
|
|
void dev_mc146818_init(struct machine *machine, struct memory *mem, |
603 |
|
|
uint64_t baseaddr, int irq_nr, int access_style, int addrdiv) |
604 |
|
|
{ |
605 |
|
|
unsigned char ether_address[6]; |
606 |
|
|
int i, dev_len; |
607 |
|
|
struct mc_data *d; |
608 |
|
|
|
609 |
|
|
d = malloc(sizeof(struct mc_data)); |
610 |
|
|
if (d == NULL) { |
611 |
|
|
fprintf(stderr, "out of memory\n"); |
612 |
|
|
exit(1); |
613 |
|
|
} |
614 |
|
|
|
615 |
|
|
memset(d, 0, sizeof(struct mc_data)); |
616 |
|
|
d->irq_nr = irq_nr; |
617 |
|
|
d->access_style = access_style; |
618 |
|
|
d->addrdiv = addrdiv; |
619 |
|
|
|
620 |
dpavlin |
6 |
d->use_bcd = 0; |
621 |
dpavlin |
20 |
switch (access_style) { |
622 |
|
|
case MC146818_SGI: |
623 |
|
|
case MC146818_PC_CMOS: |
624 |
|
|
case MC146818_PMPPC: |
625 |
dpavlin |
6 |
d->use_bcd = 1; |
626 |
dpavlin |
20 |
} |
627 |
dpavlin |
6 |
|
628 |
dpavlin |
20 |
if (machine->machine_type != MACHINE_PREP) { |
629 |
|
|
/* NetBSD/prep has a really ugly clock detection code; |
630 |
dpavlin |
22 |
no other machines/OSes don't need this. */ |
631 |
dpavlin |
20 |
d->ugly_netbsd_prep_hack_done = NETBSD_HACK_DONE; |
632 |
|
|
} |
633 |
|
|
|
634 |
dpavlin |
6 |
if (access_style == MC146818_DEC) { |
635 |
dpavlin |
4 |
/* Station Ethernet Address, on DECstation 3100: */ |
636 |
|
|
for (i=0; i<6; i++) |
637 |
|
|
ether_address[i] = 0x10 * (i+1); |
638 |
|
|
|
639 |
dpavlin |
6 |
d->reg[0x01] = ether_address[0]; |
640 |
|
|
d->reg[0x05] = ether_address[1]; |
641 |
|
|
d->reg[0x09] = ether_address[2]; |
642 |
|
|
d->reg[0x0d] = ether_address[3]; |
643 |
|
|
d->reg[0x11] = ether_address[4]; |
644 |
|
|
d->reg[0x15] = ether_address[5]; |
645 |
|
|
/* TODO: 19, 1d, 21, 25 = checksum bytes 1,2,2,1 resp. */ |
646 |
|
|
d->reg[0x29] = ether_address[5]; |
647 |
|
|
d->reg[0x2d] = ether_address[4]; |
648 |
|
|
d->reg[0x31] = ether_address[3]; |
649 |
|
|
d->reg[0x35] = ether_address[2]; |
650 |
|
|
d->reg[0x39] = ether_address[1]; |
651 |
|
|
d->reg[0x3d] = ether_address[1]; |
652 |
|
|
d->reg[0x41] = ether_address[0]; |
653 |
|
|
d->reg[0x45] = ether_address[1]; |
654 |
|
|
d->reg[0x49] = ether_address[2]; |
655 |
|
|
d->reg[0x4d] = ether_address[3]; |
656 |
|
|
d->reg[0x51] = ether_address[4]; |
657 |
|
|
d->reg[0x55] = ether_address[5]; |
658 |
|
|
/* TODO: 59, 5d = checksum bytes 1,2 resp. */ |
659 |
|
|
d->reg[0x61] = 0xff; |
660 |
|
|
d->reg[0x65] = 0x00; |
661 |
|
|
d->reg[0x69] = 0x55; |
662 |
|
|
d->reg[0x6d] = 0xaa; |
663 |
|
|
d->reg[0x71] = 0xff; |
664 |
|
|
d->reg[0x75] = 0x00; |
665 |
|
|
d->reg[0x79] = 0x55; |
666 |
|
|
d->reg[0x7d] = 0xaa; |
667 |
dpavlin |
4 |
|
668 |
|
|
/* Battery valid, for DECstations */ |
669 |
|
|
d->reg[0xf8] = 1; |
670 |
|
|
} |
671 |
|
|
|
672 |
dpavlin |
20 |
/* |
673 |
|
|
* uip_threshold should ideally be 1, but when Linux polls the UIP bit |
674 |
|
|
* it looses speed. This hack gives Linux the impression that the cpu |
675 |
|
|
* is uip_threshold times faster than the slow clock it would |
676 |
|
|
* otherwise detect. |
677 |
|
|
* |
678 |
|
|
* TODO: Find out if this messes up Sprite emulation; if so, then |
679 |
|
|
* this hack has to be removed. |
680 |
|
|
*/ |
681 |
dpavlin |
22 |
d->uip_threshold = 8; |
682 |
dpavlin |
20 |
|
683 |
dpavlin |
4 |
if (access_style == MC146818_ARC_JAZZ) |
684 |
|
|
memory_device_register(mem, "mc146818_jazz", 0x90000070ULL, |
685 |
dpavlin |
20 |
1, dev_mc146818_jazz_access, d, DM_DEFAULT, NULL); |
686 |
dpavlin |
4 |
|
687 |
|
|
dev_len = DEV_MC146818_LENGTH; |
688 |
|
|
switch (access_style) { |
689 |
dpavlin |
16 |
case MC146818_CATS: |
690 |
dpavlin |
4 |
case MC146818_PC_CMOS: |
691 |
|
|
dev_len = 2; |
692 |
|
|
break; |
693 |
|
|
case MC146818_SGI: |
694 |
|
|
dev_len = 0x400; |
695 |
|
|
} |
696 |
|
|
|
697 |
|
|
memory_device_register(mem, "mc146818", baseaddr, |
698 |
|
|
dev_len * addrdiv, dev_mc146818_access, |
699 |
dpavlin |
20 |
d, DM_DEFAULT, NULL); |
700 |
dpavlin |
4 |
|
701 |
|
|
mc146818_update_time(d); |
702 |
|
|
|
703 |
dpavlin |
24 |
machine_add_tickfunction(machine, dev_mc146818_tick, d, |
704 |
|
|
TICK_SHIFT, 0.0); |
705 |
dpavlin |
4 |
} |
706 |
|
|
|