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/* |
/* |
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* Copyright (C) 2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2006-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_lca.c,v 1.4 2006/08/29 15:55:10 debug Exp $ |
* $Id: dev_lca.c,v 1.8 2006/12/30 13:30:58 debug Exp $ |
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* |
* |
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* LCA PCI bus (for Alpha machines). |
* LCA PCI bus (for Alpha machines). |
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*/ |
*/ |
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#include "cpu.h" |
#include "cpu.h" |
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#include "device.h" |
#include "device.h" |
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#include "emul.h" |
#include "emul.h" |
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#include "interrupt.h" |
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#include "machine.h" |
#include "machine.h" |
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#include "memory.h" |
#include "memory.h" |
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#include "misc.h" |
#include "misc.h" |
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}; |
}; |
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/* |
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* lca_interrupt_assert(): |
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* |
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* Line 0 = ISA interrupt. |
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*/ |
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void lca_interrupt_assert(struct interrupt *interrupt) |
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{ |
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fatal("lca_interrupt_assert: TODO\n"); |
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exit(1); |
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} |
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/* |
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* lca_interrupt_deassert(): |
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* |
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* Line 0 = ISA interrupt. |
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*/ |
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void lca_interrupt_deassert(struct interrupt *interrupt) |
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{ |
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fatal("lca_interrupt_deassert: TODO\n"); |
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exit(1); |
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} |
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DEVICE_ACCESS(lca_pci_conf) |
DEVICE_ACCESS(lca_pci_conf) |
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{ |
{ |
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uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
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DEVINIT(lca) |
DEVINIT(lca) |
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{ |
{ |
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char *interrupt_path; |
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struct interrupt interrupt_template; |
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struct lca_data *d = malloc(sizeof(struct lca_data)); |
struct lca_data *d = malloc(sizeof(struct lca_data)); |
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if (d == NULL) { |
if (d == NULL) { |
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fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
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/* Register a PCI bus: */ |
/* Register a PCI bus: */ |
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d->pci_data = bus_pci_init( |
d->pci_data = bus_pci_init( |
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devinit->machine, |
devinit->machine, |
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0 /* pciirq: TODO */, |
"TODO: irq" /* pciirq: TODO */, |
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LCA_PCI_SIO, /* pci device io offset */ |
LCA_PCI_SIO, /* pci device io offset */ |
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0x00000000, /* pci device mem offset: TODO */ |
0x00000000, /* pci device mem offset: TODO */ |
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0x00000000, /* PCI portbase: TODO */ |
0x00000000, /* PCI portbase: TODO */ |
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0x00000000, /* PCI membase: TODO */ |
0x00000000, /* PCI membase: TODO */ |
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0x00000000, /* PCI irqbase: TODO */ |
"TODO: pci irq base", /* PCI irqbase: TODO */ |
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LCA_ISA_BASE, /* ISA portbase */ |
LCA_ISA_BASE, /* ISA portbase */ |
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LCA_ISA_MEMBASE, /* ISA membase */ |
LCA_ISA_MEMBASE, /* ISA membase */ |
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8); /* ISA irqbase: TODO */ |
"TODO: irqbase isa"); /* ISA irqbase: TODO */ |
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/* Add the "sio0" controller (as seen by NetBSD): */ |
/* Add the "sio0" controller (as seen by NetBSD): */ |
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bus_pci_add(devinit->machine, d->pci_data, devinit->machine->memory, |
bus_pci_add(devinit->machine, d->pci_data, devinit->machine->memory, |
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LCA_IOC_BASE, 0x20000000, dev_lca_ioc_access, (void *)d, |
LCA_IOC_BASE, 0x20000000, dev_lca_ioc_access, (void *)d, |
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DM_DEFAULT, NULL); |
DM_DEFAULT, NULL); |
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/* TODO: IRQs etc. */ |
interrupt_path = malloc(strlen(devinit->machine->path) + 10); |
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bus_isa_init(devinit->machine, BUS_ISA_IDE0 | BUS_ISA_IDE1, |
snprintf(interrupt_path, strlen(devinit->machine->path) + 10, |
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LCA_ISA_BASE, LCA_ISA_MEMBASE, 32, 48); |
"%s.lca", devinit->machine->path); |
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memset(&interrupt_template, 0, sizeof(interrupt_template)); |
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interrupt_template.line = 0; |
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interrupt_template.name = interrupt_path; |
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interrupt_template.extra = d; |
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interrupt_template.interrupt_assert = lca_interrupt_assert; |
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interrupt_template.interrupt_deassert = lca_interrupt_deassert; |
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interrupt_handler_register(&interrupt_template); |
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bus_isa_init(devinit->machine, interrupt_path, |
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BUS_ISA_IDE0 | BUS_ISA_IDE1, LCA_ISA_BASE, LCA_ISA_MEMBASE); |
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return 1; |
return 1; |
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} |
} |