1 |
dpavlin |
4 |
/* |
2 |
|
|
* Copyright (C) 2004-2005 Anders Gavare. All rights reserved. |
3 |
|
|
* |
4 |
|
|
* Redistribution and use in source and binary forms, with or without |
5 |
|
|
* modification, are permitted provided that the following conditions are met: |
6 |
|
|
* |
7 |
|
|
* 1. Redistributions of source code must retain the above copyright |
8 |
|
|
* notice, this list of conditions and the following disclaimer. |
9 |
|
|
* 2. Redistributions in binary form must reproduce the above copyright |
10 |
|
|
* notice, this list of conditions and the following disclaimer in the |
11 |
|
|
* documentation and/or other materials provided with the distribution. |
12 |
|
|
* 3. The name of the author may not be used to endorse or promote products |
13 |
|
|
* derived from this software without specific prior written permission. |
14 |
|
|
* |
15 |
|
|
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
16 |
|
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
17 |
|
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
18 |
|
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
19 |
|
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
20 |
|
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
21 |
|
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
22 |
|
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
23 |
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
24 |
|
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
25 |
|
|
* SUCH DAMAGE. |
26 |
|
|
* |
27 |
|
|
* |
28 |
|
|
* $Id: dev_kn220.c,v 1.3 2005/02/21 07:01:08 debug Exp $ |
29 |
|
|
* |
30 |
|
|
* DEC KN220 (DECsystem 5500) devices. |
31 |
|
|
* |
32 |
|
|
* o) I/O board |
33 |
|
|
* o) SGEC (ethernet) (Called "ne" in Ultrix.) |
34 |
|
|
* |
35 |
|
|
* TODO: Study docs. |
36 |
|
|
*/ |
37 |
|
|
|
38 |
|
|
#include <stdio.h> |
39 |
|
|
#include <stdlib.h> |
40 |
|
|
#include <string.h> |
41 |
|
|
|
42 |
|
|
#include "devices.h" |
43 |
|
|
#include "memory.h" |
44 |
|
|
#include "misc.h" |
45 |
|
|
|
46 |
|
|
#define IOBOARD_DEBUG |
47 |
|
|
|
48 |
|
|
struct dec5500_ioboard_data { |
49 |
|
|
int dummy; |
50 |
|
|
}; |
51 |
|
|
|
52 |
|
|
#define SGEC_DEBUG |
53 |
|
|
|
54 |
|
|
struct sgec_data { |
55 |
|
|
int irq_nr; |
56 |
|
|
}; |
57 |
|
|
|
58 |
|
|
|
59 |
|
|
/* |
60 |
|
|
* dev_dec5500_ioboard_access(): |
61 |
|
|
*/ |
62 |
|
|
int dev_dec5500_ioboard_access(struct cpu *cpu, struct memory *mem, |
63 |
|
|
uint64_t relative_addr, unsigned char *data, size_t len, |
64 |
|
|
int writeflag, void *extra) |
65 |
|
|
{ |
66 |
|
|
/* struct dec5500_ioboard_data *d = |
67 |
|
|
(struct dec5500_ioboard_data *) extra; */ |
68 |
|
|
uint64_t idata = 0, odata = 0; |
69 |
|
|
|
70 |
|
|
idata = memory_readmax64(cpu, data, len); |
71 |
|
|
|
72 |
|
|
#ifdef IOBOARD_DEBUG |
73 |
|
|
if (writeflag == MEM_WRITE) |
74 |
|
|
debug("[ dec5500_ioboard: write to address 0x%llx, " |
75 |
|
|
"data=0x%016llx ]\n", (long long)relative_addr, |
76 |
|
|
(long long)idata); |
77 |
|
|
else |
78 |
|
|
debug("[ dec5500_ioboard: read from address 0x%llx ]\n", |
79 |
|
|
(long long)relative_addr); |
80 |
|
|
#endif |
81 |
|
|
|
82 |
|
|
switch (relative_addr) { |
83 |
|
|
case 0: |
84 |
|
|
if (writeflag == MEM_READ) |
85 |
|
|
/* |
86 |
|
|
* TODO: One of these bits indicate I/O board |
87 |
|
|
* present. |
88 |
|
|
*/ |
89 |
|
|
odata = 0xffffffffULL; |
90 |
|
|
break; |
91 |
|
|
|
92 |
|
|
default: |
93 |
|
|
if (writeflag == MEM_WRITE) |
94 |
|
|
debug("[ dec5500_ioboard: unimplemented write to " |
95 |
|
|
"address 0x%llx, data=0x%016llx ]\n", |
96 |
|
|
(long long)relative_addr, (long long)idata); |
97 |
|
|
else |
98 |
|
|
debug("[ dec5500_ioboard: unimplemented read from" |
99 |
|
|
" address 0x%llx ]\n", (long long)relative_addr); |
100 |
|
|
} |
101 |
|
|
|
102 |
|
|
if (writeflag == MEM_READ) |
103 |
|
|
memory_writemax64(cpu, data, len, odata); |
104 |
|
|
|
105 |
|
|
return 1; |
106 |
|
|
} |
107 |
|
|
|
108 |
|
|
|
109 |
|
|
/* |
110 |
|
|
* dev_sgec_access(): |
111 |
|
|
*/ |
112 |
|
|
int dev_sgec_access(struct cpu *cpu, struct memory *mem, |
113 |
|
|
uint64_t relative_addr, unsigned char *data, size_t len, |
114 |
|
|
int writeflag, void *extra) |
115 |
|
|
{ |
116 |
|
|
/* struct sgec_data *d = (struct sgec_data *) extra; */ |
117 |
|
|
uint64_t idata = 0, odata = 0; |
118 |
|
|
|
119 |
|
|
idata = memory_readmax64(cpu, data, len); |
120 |
|
|
|
121 |
|
|
#ifdef SGEC_DEBUG |
122 |
|
|
if (writeflag == MEM_WRITE) |
123 |
|
|
debug("[ sgec: write to address 0x%llx, data=0x%016llx ]\n", |
124 |
|
|
(long long)relative_addr, (long long)idata); |
125 |
|
|
else |
126 |
|
|
debug("[ sgec: read from address 0x%llx ]\n", |
127 |
|
|
(long long)relative_addr); |
128 |
|
|
#endif |
129 |
|
|
|
130 |
|
|
switch (relative_addr) { |
131 |
|
|
case 0x14: |
132 |
|
|
if (writeflag == MEM_READ) |
133 |
|
|
odata = 0x80000000; |
134 |
|
|
break; |
135 |
|
|
|
136 |
|
|
default: |
137 |
|
|
if (writeflag == MEM_WRITE) |
138 |
|
|
debug("[ sgec: unimplemented write to address 0x%llx," |
139 |
|
|
" data=0x%016llx ]\n", (long long)relative_addr, |
140 |
|
|
(long long)idata); |
141 |
|
|
else |
142 |
|
|
debug("[ sgec: unimplemented read from address " |
143 |
|
|
"0x%llx ]\n", (long long)relative_addr); |
144 |
|
|
} |
145 |
|
|
|
146 |
|
|
if (writeflag == MEM_READ) |
147 |
|
|
memory_writemax64(cpu, data, len, odata); |
148 |
|
|
|
149 |
|
|
return 1; |
150 |
|
|
} |
151 |
|
|
|
152 |
|
|
|
153 |
|
|
/* |
154 |
|
|
* dev_sgec_init(): |
155 |
|
|
*/ |
156 |
|
|
void dev_sgec_init(struct memory *mem, uint64_t baseaddr, int irq_nr) |
157 |
|
|
{ |
158 |
|
|
struct sgec_data *d = malloc(sizeof(struct sgec_data)); |
159 |
|
|
if (d == NULL) { |
160 |
|
|
fprintf(stderr, "out of memory\n"); |
161 |
|
|
exit(1); |
162 |
|
|
} |
163 |
|
|
memset(d, 0, sizeof(struct sgec_data)); |
164 |
|
|
d->irq_nr = irq_nr; |
165 |
|
|
|
166 |
|
|
memory_device_register(mem, "sgec", baseaddr, DEV_SGEC_LENGTH, |
167 |
|
|
dev_sgec_access, (void *)d, MEM_DEFAULT, NULL); |
168 |
|
|
} |
169 |
|
|
|
170 |
|
|
|
171 |
|
|
/* |
172 |
|
|
* dev_dec5500_ioboard_init(): |
173 |
|
|
*/ |
174 |
|
|
struct dec5500_ioboard_data *dev_dec5500_ioboard_init(struct cpu *cpu, |
175 |
|
|
struct memory *mem, uint64_t baseaddr) |
176 |
|
|
{ |
177 |
|
|
struct dec5500_ioboard_data *d = |
178 |
|
|
malloc(sizeof(struct dec5500_ioboard_data)); |
179 |
|
|
if (d == NULL) { |
180 |
|
|
fprintf(stderr, "out of memory\n"); |
181 |
|
|
exit(1); |
182 |
|
|
} |
183 |
|
|
memset(d, 0, sizeof(struct dec5500_ioboard_data)); |
184 |
|
|
|
185 |
|
|
memory_device_register(mem, "dec5500_ioboard", baseaddr, |
186 |
|
|
DEV_DEC5500_IOBOARD_LENGTH, dev_dec5500_ioboard_access, |
187 |
|
|
(void *)d, MEM_DEFAULT, NULL); |
188 |
|
|
|
189 |
|
|
return d; |
190 |
|
|
} |
191 |
|
|
|