/[gxemul]/trunk/src/devices/dev_gt.c
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Contents of /trunk/src/devices/dev_gt.c

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Revision 22 - (show annotations)
Mon Oct 8 16:19:37 2007 UTC (16 years, 6 months ago) by dpavlin
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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============
1 /*
2 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_gt.c,v 1.40 2006/01/14 11:29:36 debug Exp $
29 *
30 * Galileo Technology GT-64xxx PCI controller.
31 *
32 * GT-64011 Used in Cobalt machines.
33 * GT-64120 Used in evbmips machines (Malta).
34 * GT-64260 Used in mvmeppc machines.
35 *
36 * TODO: This more or less just a dummy device, so far. It happens to work
37 * with some NetBSD ports in some cases, and perhaps with Linux too,
38 * but it is not really working for anything else.
39 */
40
41 #include <stdio.h>
42 #include <stdlib.h>
43 #include <string.h>
44
45 #include "bus_pci.h"
46 #include "cpu.h"
47 #include "devices.h"
48 #include "machine.h"
49 #include "memory.h"
50 #include "misc.h"
51
52
53 #define TICK_SHIFT 14
54
55 /* #define debug fatal */
56
57 #define PCI_PRODUCT_GALILEO_GT64011 0x4146 /* GT-64011 */
58 #define PCI_PRODUCT_GALILEO_GT64120 0x4620 /* GT-64120 */
59 #define PCI_PRODUCT_GALILEO_GT64260 0x6430 /* GT-64260 */
60
61 struct gt_data {
62 int irqnr;
63 int pciirq;
64 int type;
65
66 struct pci_data *pci_data;
67 };
68
69
70 /*
71 * dev_gt_tick():
72 */
73 void dev_gt_tick(struct cpu *cpu, void *extra)
74 {
75 struct gt_data *gt_data = extra;
76
77 cpu_interrupt(cpu, gt_data->irqnr);
78 }
79
80
81 /*
82 * dev_gt_access():
83 */
84 DEVICE_ACCESS(gt)
85 {
86 uint64_t idata = 0, odata = 0;
87 int bus, dev, func, reg;
88 size_t i;
89 struct gt_data *d = extra;
90
91 if (writeflag == MEM_WRITE)
92 idata = memory_readmax64(cpu, data, len);
93
94 switch (relative_addr) {
95
96 case 0x48:
97 switch (d->type) {
98 case PCI_PRODUCT_GALILEO_GT64120:
99 /*
100 * This is needed for Linux on Malta, according
101 * to Alec Voropay. (TODO: Remove this hack when
102 * things have stabilized.)
103 */
104 if (writeflag == MEM_READ) {
105 odata = 0x18000000 >> 21;
106 debug("[ gt: read from 0x48: 0x%08x ]\n",
107 (int)odata);
108 }
109 break;
110 default:
111 fatal("[ gt: access to 0x48? (type %i) ]\n", d->type);
112 }
113 break;
114
115 case 0xc18:
116 if (writeflag == MEM_WRITE) {
117 debug("[ gt: write to 0xc18: 0x%08x ]\n", (int)idata);
118 return 1;
119 } else {
120 odata = 0xffffffffULL;
121 /*
122 * ??? interrupt something...
123 *
124 * TODO: Remove this hack when things have stabilized.
125 */
126 odata = 0x00000100;
127 /* netbsd/cobalt cobalt/machdep.c:cpu_intr() */
128
129 cpu_interrupt_ack(cpu, d->irqnr);
130
131 debug("[ gt: read from 0xc18 (0x%08x) ]\n", (int)odata);
132 }
133 break;
134
135 case 0xc34: /* GT_PCI0_INTR_ACK */
136 odata = cpu->machine->isa_pic_data.last_int;
137 cpu_interrupt_ack(cpu, 8 + odata);
138 break;
139
140 case 0xcf8: /* PCI ADDR */
141 if (cpu->byte_order != EMUL_LITTLE_ENDIAN) {
142 fatal("[ gt: TODO: big endian PCI access ]\n");
143 exit(1);
144 }
145 bus_pci_decompose_1(idata, &bus, &dev, &func, &reg);
146 bus_pci_setaddr(cpu, d->pci_data, bus, dev, func, reg);
147 break;
148
149 case 0xcfc: /* PCI DATA */
150 if (cpu->byte_order != EMUL_LITTLE_ENDIAN) {
151 fatal("[ gt: TODO: big endian PCI access ]\n");
152 exit(1);
153 }
154 bus_pci_data_access(cpu, d->pci_data, writeflag == MEM_READ?
155 &odata : &idata, len, writeflag);
156 break;
157
158 default:
159 if (writeflag == MEM_READ) {
160 debug("[ gt: read from addr 0x%x ]\n",
161 (int)relative_addr);
162 } else {
163 debug("[ gt: write to addr 0x%x:", (int)relative_addr);
164 for (i=0; i<len; i++)
165 debug(" %02x", data[i]);
166 debug(" ]\n");
167 }
168 }
169
170 if (writeflag == MEM_READ)
171 memory_writemax64(cpu, data, len, odata);
172
173 return 1;
174 }
175
176
177 /*
178 * dev_gt_init():
179 *
180 * Initialize a GT device. Return a pointer to the pci_data used, so that
181 * the caller may add PCI devices. First, however, we add the GT device
182 * itself.
183 */
184 struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
185 uint64_t baseaddr, int irq_nr, int pciirq, int type)
186 {
187 struct gt_data *d;
188 uint64_t pci_portbase = 0, pci_membase = 0;
189 uint64_t isa_portbase = 0, isa_membase = 0;
190 int isa_irqbase = 0, pci_irqbase = 0;
191 uint64_t pci_io_offset = 0, pci_mem_offset = 0;
192 char *gt_name = "NO";
193
194 d = malloc(sizeof(struct gt_data));
195 if (d == NULL) {
196 fprintf(stderr, "out of memory\n");
197 exit(1);
198 }
199 memset(d, 0, sizeof(struct gt_data));
200 d->irqnr = irq_nr;
201 d->pciirq = pciirq;
202
203 switch (type) {
204 case 11:
205 /* Cobalt: */
206 d->type = PCI_PRODUCT_GALILEO_GT64011;
207 gt_name = "gt64011";
208 pci_io_offset = 0;
209 pci_mem_offset = 0;
210 pci_portbase = 0x10000000ULL;
211 pci_membase = 0x10100000ULL;
212 pci_irqbase = 0;
213 isa_portbase = 0x10000000ULL;
214 isa_membase = 0x10100000ULL;
215 isa_irqbase = 8;
216 break;
217 case 120:
218 /* EVBMIPS (Malta): */
219 d->type = PCI_PRODUCT_GALILEO_GT64120;
220 gt_name = "gt64120";
221 pci_io_offset = 0;
222 pci_mem_offset = 0;
223 pci_portbase = 0x18000000ULL;
224 pci_membase = 0x10000000ULL;
225 pci_irqbase = 8;
226 isa_portbase = 0x18000000ULL;
227 isa_membase = 0x10000000ULL;
228 isa_irqbase = 8;
229 break;
230 case 260:
231 /* MVMEPPC (mvme5500): */
232 d->type = PCI_PRODUCT_GALILEO_GT64260;
233 gt_name = "gt64260";
234 pci_io_offset = 0;
235 pci_mem_offset = 0;
236 pci_portbase = 0x18000000ULL;
237 pci_membase = 0x10000000ULL;
238 pci_irqbase = 8;
239 isa_portbase = 0x18000000ULL;
240 isa_membase = 0x10000000ULL;
241 isa_irqbase = 8;
242 break;
243 default:fatal("dev_gt_init(): unimplemented GT type (%i).\n", type);
244 exit(1);
245 }
246
247 d->pci_data = bus_pci_init(machine,
248 pciirq, pci_io_offset, pci_mem_offset,
249 pci_portbase, pci_membase, pci_irqbase,
250 isa_portbase, isa_membase, isa_irqbase);
251
252 /*
253 * According to NetBSD/cobalt:
254 * pchb0 at pci0 dev 0 function 0: Galileo GT-64011
255 * System Controller, rev 1
256 */
257 bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, gt_name);
258
259 memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH,
260 dev_gt_access, d, DM_DEFAULT, NULL);
261 machine_add_tickfunction(machine, dev_gt_tick, d, TICK_SHIFT);
262
263 return d->pci_data;
264 }
265
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