/[gxemul]/trunk/src/devices/dev_gt.c
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Contents of /trunk/src/devices/dev_gt.c

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Revision 20 - (show annotations)
Mon Oct 8 16:19:23 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 6581 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============
1 /*
2 * Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_gt.c,v 1.35 2005/11/21 09:17:26 debug Exp $
29 *
30 * Galileo Technology GT-64xxx PCI controller.
31 *
32 * GT-64011 Used in Cobalt machines.
33 * GT-64120 Used in evbmips machines (Malta).
34 *
35 * TODO: This more or less just a dummy device, so far. It happens to work
36 * with NetBSD/cobalt and /evbmips, and in some cases it might happen
37 * to work with Linux as well, but don't rely on it for anything else.
38 */
39
40 #include <stdio.h>
41 #include <stdlib.h>
42 #include <string.h>
43
44 #include "bus_pci.h"
45 #include "cpu.h"
46 #include "devices.h"
47 #include "machine.h"
48 #include "memory.h"
49 #include "misc.h"
50
51
52 #define TICK_SHIFT 14
53
54 /* #define debug fatal */
55
56 #define PCI_PRODUCT_GALILEO_GT64011 0x4146 /* GT-64011 */
57 #define PCI_PRODUCT_GALILEO_GT64120 0x4620 /* GT-64120 */
58
59 struct gt_data {
60 int irqnr;
61 int pciirq;
62 int type;
63
64 struct pci_data *pci_data;
65 };
66
67
68 /*
69 * dev_gt_tick():
70 */
71 void dev_gt_tick(struct cpu *cpu, void *extra)
72 {
73 struct gt_data *gt_data = extra;
74
75 cpu_interrupt(cpu, gt_data->irqnr);
76 }
77
78
79 /*
80 * dev_gt_access():
81 */
82 int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
83 unsigned char *data, size_t len, int writeflag, void *extra)
84 {
85 uint64_t idata = 0, odata = 0;
86 int i;
87 struct gt_data *d = extra;
88
89 if (writeflag == MEM_WRITE)
90 idata = memory_readmax64(cpu, data, len);
91
92 switch (relative_addr) {
93
94 case 0x48:
95 switch (d->type) {
96 case PCI_PRODUCT_GALILEO_GT64120:
97 /*
98 * This is needed for Linux on Malta, according
99 * to Alec Voropay. (TODO: Remove this hack when
100 * things have stabilized.)
101 */
102 if (writeflag == MEM_READ) {
103 odata = 0x18000000 >> 21;
104 debug("[ gt: read from 0x48: 0x%08x ]\n",
105 (int)odata);
106 }
107 break;
108 default:
109 fatal("[ gt: access to 0x48? (type %i) ]\n", d->type);
110 }
111 break;
112
113 case 0xc18:
114 if (writeflag == MEM_WRITE) {
115 debug("[ gt: write to 0xc18: 0x%08x ]\n", (int)idata);
116 return 1;
117 } else {
118 odata = 0xffffffffULL;
119 /*
120 * ??? interrupt something...
121 *
122 * TODO: Remove this hack when things have stabilized.
123 */
124 odata = 0x00000100;
125 /* netbsd/cobalt cobalt/machdep.c:cpu_intr() */
126
127 cpu_interrupt_ack(cpu, d->irqnr);
128
129 debug("[ gt: read from 0xc18 (0x%08x) ]\n", (int)odata);
130 }
131 break;
132
133 case 0xc34: /* GT_PCI0_INTR_ACK */
134 odata = cpu->machine->isa_pic_data.last_int;
135 cpu_interrupt_ack(cpu, 8 + odata);
136 break;
137
138 case 0xcf8: /* PCI ADDR */
139 case 0xcfc: /* PCI DATA */
140 if (writeflag == MEM_WRITE) {
141 bus_pci_access(cpu, mem, relative_addr, &idata,
142 len, writeflag, d->pci_data);
143 } else {
144 bus_pci_access(cpu, mem, relative_addr, &odata,
145 len, writeflag, d->pci_data);
146 }
147 break;
148 default:
149 if (writeflag == MEM_READ) {
150 debug("[ gt: read from addr 0x%x ]\n",
151 (int)relative_addr);
152 } else {
153 debug("[ gt: write to addr 0x%x:", (int)relative_addr);
154 for (i=0; i<len; i++)
155 debug(" %02x", data[i]);
156 debug(" ]\n");
157 }
158 }
159
160 if (writeflag == MEM_READ)
161 memory_writemax64(cpu, data, len, odata);
162
163 return 1;
164 }
165
166
167 /*
168 * dev_gt_init():
169 *
170 * Initialize a GT device. Return a pointer to the pci_data used, so that
171 * the caller may add PCI devices. First, however, we add the GT device
172 * itself.
173 */
174 struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
175 uint64_t baseaddr, int irq_nr, int pciirq, int type)
176 {
177 struct gt_data *d;
178 uint64_t pci_portbase = 0, pci_membase = 0;
179 uint64_t isa_portbase = 0, isa_membase = 0;
180 int isa_irqbase = 0, pci_irqbase = 0;
181 uint64_t pci_io_offset = 0, pci_mem_offset = 0;
182
183 d = malloc(sizeof(struct gt_data));
184 if (d == NULL) {
185 fprintf(stderr, "out of memory\n");
186 exit(1);
187 }
188 memset(d, 0, sizeof(struct gt_data));
189 d->irqnr = irq_nr;
190 d->pciirq = pciirq;
191
192 switch (type) {
193 case 11:
194 /* Cobalt: */
195 d->type = PCI_PRODUCT_GALILEO_GT64011;
196 pci_io_offset = 0;
197 pci_mem_offset = 0;
198 pci_portbase = 0x10000000ULL;
199 pci_membase = 0x10100000ULL;
200 pci_irqbase = 0;
201 isa_portbase = 0x10000000ULL;
202 isa_membase = 0x10100000ULL;
203 isa_irqbase = 8;
204 break;
205 case 120:
206 /* EVBMIPS (Malta): */
207 d->type = PCI_PRODUCT_GALILEO_GT64120;
208 pci_io_offset = 0;
209 pci_mem_offset = 0;
210 pci_portbase = 0x18000000ULL;
211 pci_membase = 0x10000000ULL;
212 pci_irqbase = 8;
213 isa_portbase = 0x18000000ULL;
214 isa_membase = 0x10000000ULL;
215 isa_irqbase = 8;
216 break;
217 default:fatal("dev_gt_init(): type must be 11 or 120.\n");
218 exit(1);
219 }
220
221 d->pci_data = bus_pci_init(
222 pciirq, pci_io_offset, pci_mem_offset,
223 pci_portbase, pci_membase, pci_irqbase,
224 isa_portbase, isa_membase, isa_irqbase);
225
226 /*
227 * According to NetBSD/cobalt:
228 * pchb0 at pci0 dev 0 function 0: Galileo GT-64011
229 * System Controller, rev 1
230 */
231 bus_pci_add(machine, d->pci_data, mem, 0, 0, 0,
232 d->type == PCI_PRODUCT_GALILEO_GT64011? "gt64011" : "gt64120");
233
234 memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH,
235 dev_gt_access, d, DM_DEFAULT, NULL);
236 machine_add_tickfunction(machine, dev_gt_tick, d, TICK_SHIFT);
237
238 return d->pci_data;
239 }
240
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