src/devices/dev_gt.c

/*
 *  Copyright (C) 2003-2005  Anders Gavare.  All rights reserved.
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are met:
 *
 *  1. Redistributions of source code must retain the above copyright
 *     notice, this list of conditions and the following disclaimer.
 *  2. Redistributions in binary form must reproduce the above copyright  
 *     notice, this list of conditions and the following disclaimer in the 
 *     documentation and/or other materials provided with the distribution.
 *  3. The name of the author may not be used to endorse or promote products
 *     derived from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
 *  ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 *  ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE   
 *  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 *  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 *  OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 *  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 *  LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 *  OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 *  SUCH DAMAGE.
 *   
 *
 *  $Id: dev_gt.c,v 1.27 2005/09/21 19:10:34 debug Exp $
 *  
 *  Galileo Technology GT-64xxx PCI controller.
 *
 *      GT-64011        Used in Cobalt machines.
 *      GT-64120        Used in evbmips machines (Malta).
 *
 *  TODO: This more or less just a dummy device, so far. It happens to work
 *        with NetBSD/cobalt and /evbmips, and in some cases it might happen
 *        to work with Linux as well, but don't rely on it for anything else.
 */

#include <stdio.h>
#include <stdlib.h>
#include <string.h>

#include "bus_pci.h"
#include "cpu.h"
#include "devices.h"
#include "machine.h"
#include "memory.h"
#include "misc.h"


#define TICK_SHIFT              14

/*  #define debug fatal  */

#define PCI_VENDOR_GALILEO           0x11ab    /* Galileo Technology */
#define PCI_PRODUCT_GALILEO_GT64011  0x4146    /* GT-64011 System Controller */
#define PCI_PRODUCT_GALILEO_GT64120  0x4620    /* GT-64120 */

struct gt_data {
        int     irqnr;
        int     pciirq;
        int     type;

        struct pci_data *pci_data;
};


/*
 *  dev_gt_tick():
 */
void dev_gt_tick(struct cpu *cpu, void *extra)
{
        struct gt_data *gt_data = extra;

        cpu_interrupt(cpu, gt_data->irqnr);
}


/*
 *  dev_gt_access():
 */
int dev_gt_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
        unsigned char *data, size_t len, int writeflag, void *extra)
{
        uint64_t idata = 0, odata = 0;
        int i, asserted;
        struct gt_data *d = extra;

        idata = memory_readmax64(cpu, data, len);

        switch (relative_addr) {

        case 0x48:
                switch (d->type) {
                case PCI_PRODUCT_GALILEO_GT64120:
                        /*
                         *  This is needed for Linux on Malta, according
                         *  to Alec Voropay.  (TODO: Remove this hack when
                         *  things have stabilized.)
                         */
                        if (writeflag == MEM_READ) {
                                odata = 0x18000000 >> 21;
                                debug("[ gt: read from 0x48: 0x%08x ]\n",
                                    (int)odata);
                        }
                        break;
                default:
                        fatal("[ gt: access to 0x48? (type %i) ]\n", d->type);
                }
                break;

        case 0xc18:
                if (writeflag == MEM_WRITE) {
                        debug("[ gt: write to  0xc18: 0x%08x ]\n", (int)idata);
                        return 1;
                } else {
                        odata = 0xffffffffULL;
                        /*  ???  interrupt something...  */

/*
 *  TODO: Remove this hack when things have stabilized.
 */
odata = 0x00000100;     /*  netbsd/cobalt cobalt/machdep.c:cpu_intr()  */

cpu_interrupt_ack(cpu, d->irqnr);

                        debug("[ gt: read from 0xc18 (0x%08x) ]\n", (int)odata);
                }
                break;

        case 0xc34:     /*  GT_PCI0_INTR_ACK  */
                /*
                 *  Ugly hack, which works for at least evbmips/Malta:
                 */
                asserted =
                    (cpu->machine->isa_pic_data.pic1->irr &
                    ~cpu->machine->isa_pic_data.pic1->ier) |
                    ((cpu->machine->isa_pic_data.pic2->irr &
                     ~cpu->machine->isa_pic_data.pic2->ier) << 8);
                odata = 7;      /*  "Spurious interrupt" defaults to 7.  */
                for (i=0; i<16; i++)
                        if ((asserted >> i) & 1) {
                                odata = i;
                                break;
                        }
                break;

        case 0xcf8:     /*  PCI ADDR  */
        case 0xcfc:     /*  PCI DATA  */
                if (writeflag == MEM_WRITE) {
                        bus_pci_access(cpu, mem, relative_addr, &idata,
                            writeflag, d->pci_data);
                } else {
                        bus_pci_access(cpu, mem, relative_addr, &odata,
                            writeflag, d->pci_data);
                }
                break;
        default:
                if (writeflag==MEM_READ) {
                        debug("[ gt: read from addr 0x%x ]\n",
                            (int)relative_addr);
                } else {
                        debug("[ gt: write to addr 0x%x:", (int)relative_addr);
                        for (i=0; i<len; i++)
                                debug(" %02x", data[i]);
                        debug(" ]\n");
                }
        }

        if (writeflag == MEM_READ)
                memory_writemax64(cpu, data, len, odata);

        return 1;
}


/*
 *  pci_gt_rr_011():
 */
static uint32_t pci_gt_rr_011(int reg)
{
        switch (reg) {
        case 0x00:
                return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64011 << 16);
        case 0x08:
                return 0x06000001;      /*  Revision 1  */
        default:
                return 0;
        }
}


/*
 *  pci_gt_rr_120():
 */
static uint32_t pci_gt_rr_120(int reg)
{
        switch (reg) {
        case 0x00:
                return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64120 << 16);
        case 0x08:
                return 0x06000002;      /*  Revision 2?  */
        default:
                return 0;
        }
}


/*
 *  pci_gt_init():
 */
void pci_gt_init(struct machine *machine, struct memory *mem)
{
}


/*
 *  dev_gt_init():
 *
 *  Initialize a GT device.  Return a pointer to the pci_data used, so that
 *  the caller may add PCI devices.  First, however, we add the GT device
 *  itself.
 */
struct pci_data *dev_gt_init(struct machine *machine, struct memory *mem,
        uint64_t baseaddr, int irq_nr, int pciirq, int type)
{
        struct gt_data *d;

        d = malloc(sizeof(struct gt_data));
        if (d == NULL) {
                fprintf(stderr, "out of memory\n");
                exit(1);
        }
        memset(d, 0, sizeof(struct gt_data));
        d->irqnr    = irq_nr;
        d->pciirq   = pciirq;
        d->pci_data = bus_pci_init(pciirq);

        switch (type) {
        case 11:
                d->type = PCI_PRODUCT_GALILEO_GT64011;
                break;
        case 120:
                d->type = PCI_PRODUCT_GALILEO_GT64120;
                break;
        default:fatal("dev_gt_init(): type must be 11 or 120.\n");
                exit(1);
        }

        /*
         *  According to NetBSD/cobalt:
         *  pchb0 at pci0 dev 0 function 0: Galileo GT-64011
         *  System Controller, rev 1
         */
        bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, pci_gt_init,
            d->type == PCI_PRODUCT_GALILEO_GT64011?
            pci_gt_rr_011 : pci_gt_rr_120);

        memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH,
            dev_gt_access, d, MEM_DEFAULT, NULL);
        machine_add_tickfunction(machine, dev_gt_tick, d, TICK_SHIFT);

        return d->pci_data;
}

1	/*
2	* Copyright (C) 2003-2005 Anders Gavare. All rights reserved.
3	*
4	* Redistribution and use in source and binary forms, with or without
5	* modification, are permitted provided that the following conditions are met:
6	*
7	* 1. Redistributions of source code must retain the above copyright
8	* notice, this list of conditions and the following disclaimer.
9	* 2. Redistributions in binary form must reproduce the above copyright
10	* notice, this list of conditions and the following disclaimer in the
11	* documentation and/or other materials provided with the distribution.
12	* 3. The name of the author may not be used to endorse or promote products
13	* derived from this software without specific prior written permission.
14	*
15	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25	* SUCH DAMAGE.
26	*
27	*
28	* $Id: dev_gt.c,v 1.27 2005/09/21 19:10:34 debug Exp $
29	*
30	* Galileo Technology GT-64xxx PCI controller.
31	*
32	* GT-64011 Used in Cobalt machines.
33	* GT-64120 Used in evbmips machines (Malta).
34	*
35	* TODO: This more or less just a dummy device, so far. It happens to work
36	* with NetBSD/cobalt and /evbmips, and in some cases it might happen
37	* to work with Linux as well, but don't rely on it for anything else.
38	*/
39
40	#include <stdio.h>
41	#include <stdlib.h>
42	#include <string.h>
43
44	#include "bus_pci.h"
45	#include "cpu.h"
46	#include "devices.h"
47	#include "machine.h"
48	#include "memory.h"
49	#include "misc.h"
50
51
52	#define TICK_SHIFT 14
53
54	/* #define debug fatal */
55
56	#define PCI_VENDOR_GALILEO 0x11ab /* Galileo Technology */
57	#define PCI_PRODUCT_GALILEO_GT64011 0x4146 /* GT-64011 System Controller */
58	#define PCI_PRODUCT_GALILEO_GT64120 0x4620 /* GT-64120 */
59
60	struct gt_data {
61	int irqnr;
62	int pciirq;
63	int type;
64
65	struct pci_data *pci_data;
66	};
67
68
69	/*
70	* dev_gt_tick():
71	*/
72	void dev_gt_tick(struct cpu cpu, void extra)
73	{
74	struct gt_data *gt_data = extra;
75
76	cpu_interrupt(cpu, gt_data->irqnr);
77	}
78
79
80	/*
81	* dev_gt_access():
82	*/
83	int dev_gt_access(struct cpu cpu, struct memory mem, uint64_t relative_addr,
84	unsigned char data, size_t len, int writeflag, void extra)
85	{
86	uint64_t idata = 0, odata = 0;
87	int i, asserted;
88	struct gt_data *d = extra;
89
90	idata = memory_readmax64(cpu, data, len);
91
92	switch (relative_addr) {
93
94	case 0x48:
95	switch (d->type) {
96	case PCI_PRODUCT_GALILEO_GT64120:
97	/*
98	* This is needed for Linux on Malta, according
99	* to Alec Voropay. (TODO: Remove this hack when
100	* things have stabilized.)
101	*/
102	if (writeflag == MEM_READ) {
103	odata = 0x18000000 >> 21;
104	debug("[ gt: read from 0x48: 0x%08x ]\n",
105	(int)odata);
106	}
107	break;
108	default:
109	fatal("[ gt: access to 0x48? (type %i) ]\n", d->type);
110	}
111	break;
112
113	case 0xc18:
114	if (writeflag == MEM_WRITE) {
115	debug("[ gt: write to 0xc18: 0x%08x ]\n", (int)idata);
116	return 1;
117	} else {
118	odata = 0xffffffffULL;
119	/* ??? interrupt something... */
120
121	/*
122	* TODO: Remove this hack when things have stabilized.
123	*/
124	odata = 0x00000100; /* netbsd/cobalt cobalt/machdep.c:cpu_intr() */
125
126	cpu_interrupt_ack(cpu, d->irqnr);
127
128	debug("[ gt: read from 0xc18 (0x%08x) ]\n", (int)odata);
129	}
130	break;
131
132	case 0xc34: /* GT_PCI0_INTR_ACK */
133	/*
134	* Ugly hack, which works for at least evbmips/Malta:
135	*/
136	asserted =
137	(cpu->machine->isa_pic_data.pic1->irr &
138	~cpu->machine->isa_pic_data.pic1->ier) \|
139	((cpu->machine->isa_pic_data.pic2->irr &
140	~cpu->machine->isa_pic_data.pic2->ier) << 8);
141	odata = 7; /* "Spurious interrupt" defaults to 7. */
142	for (i=0; i<16; i++)
143	if ((asserted >> i) & 1) {
144	odata = i;
145	break;
146	}
147	break;
148
149	case 0xcf8: /* PCI ADDR */
150	case 0xcfc: /* PCI DATA */
151	if (writeflag == MEM_WRITE) {
152	bus_pci_access(cpu, mem, relative_addr, &idata,
153	writeflag, d->pci_data);
154	} else {
155	bus_pci_access(cpu, mem, relative_addr, &odata,
156	writeflag, d->pci_data);
157	}
158	break;
159	default:
160	if (writeflag==MEM_READ) {
161	debug("[ gt: read from addr 0x%x ]\n",
162	(int)relative_addr);
163	} else {
164	debug("[ gt: write to addr 0x%x:", (int)relative_addr);
165	for (i=0; i<len; i++)
166	debug(" %02x", data[i]);
167	debug(" ]\n");
168	}
169	}
170
171	if (writeflag == MEM_READ)
172	memory_writemax64(cpu, data, len, odata);
173
174	return 1;
175	}
176
177
178	/*
179	* pci_gt_rr_011():
180	*/
181	static uint32_t pci_gt_rr_011(int reg)
182	{
183	switch (reg) {
184	case 0x00:
185	return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64011 << 16);
186	case 0x08:
187	return 0x06000001; /* Revision 1 */
188	default:
189	return 0;
190	}
191	}
192
193
194	/*
195	* pci_gt_rr_120():
196	*/
197	static uint32_t pci_gt_rr_120(int reg)
198	{
199	switch (reg) {
200	case 0x00:
201	return PCI_VENDOR_GALILEO + (PCI_PRODUCT_GALILEO_GT64120 << 16);
202	case 0x08:
203	return 0x06000002; /* Revision 2? */
204	default:
205	return 0;
206	}
207	}
208
209
210	/*
211	* pci_gt_init():
212	*/
213	void pci_gt_init(struct machine machine, struct memory mem)
214	{
215	}
216
217
218	/*
219	* dev_gt_init():
220	*
221	* Initialize a GT device. Return a pointer to the pci_data used, so that
222	* the caller may add PCI devices. First, however, we add the GT device
223	* itself.
224	*/
225	struct pci_data dev_gt_init(struct machine machine, struct memory *mem,
226	uint64_t baseaddr, int irq_nr, int pciirq, int type)
227	{
228	struct gt_data *d;
229
230	d = malloc(sizeof(struct gt_data));
231	if (d == NULL) {
232	fprintf(stderr, "out of memory\n");
233	exit(1);
234	}
235	memset(d, 0, sizeof(struct gt_data));
236	d->irqnr = irq_nr;
237	d->pciirq = pciirq;
238	d->pci_data = bus_pci_init(pciirq);
239
240	switch (type) {
241	case 11:
242	d->type = PCI_PRODUCT_GALILEO_GT64011;
243	break;
244	case 120:
245	d->type = PCI_PRODUCT_GALILEO_GT64120;
246	break;
247	default:fatal("dev_gt_init(): type must be 11 or 120.\n");
248	exit(1);
249	}
250
251	/*
252	* According to NetBSD/cobalt:
253	* pchb0 at pci0 dev 0 function 0: Galileo GT-64011
254	* System Controller, rev 1
255	*/
256	bus_pci_add(machine, d->pci_data, mem, 0, 0, 0, pci_gt_init,
257	d->type == PCI_PRODUCT_GALILEO_GT64011?
258	pci_gt_rr_011 : pci_gt_rr_120);
259
260	memory_device_register(mem, "gt", baseaddr, DEV_GT_LENGTH,
261	dev_gt_access, d, MEM_DEFAULT, NULL);
262	machine_add_tickfunction(machine, dev_gt_tick, d, TICK_SHIFT);
263
264	return d->pci_data;
265	}
266