1 |
/* |
/* |
2 |
* Copyright (C) 2005 Anders Gavare. All rights reserved. |
* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
3 |
* |
* |
4 |
* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: dev_footbridge.c,v 1.22 2005/10/07 15:10:02 debug Exp $ |
* $Id: dev_footbridge.c,v 1.44 2006/08/11 17:43:30 debug Exp $ |
29 |
* |
* |
30 |
* Footbridge. Used in Netwinder and Cats. |
* Footbridge. Used in Netwinder and Cats. |
31 |
* |
* |
32 |
* TODO: Most things. For example: |
* TODO: |
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* |
|
33 |
* o) Add actual support for the fcom serial port. |
* o) Add actual support for the fcom serial port. |
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* o) FIQs. |
* o) FIQs. |
35 |
* o) Lots of other things. |
* o) Pretty much everything else as well :) (This entire thing |
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* is a quick hack to work primarily with NetBSD and OpenBSD |
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* as a guest OS.) |
38 |
*/ |
*/ |
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#include <stdio.h> |
#include <stdio.h> |
45 |
#include "console.h" |
#include "console.h" |
46 |
#include "cpu.h" |
#include "cpu.h" |
47 |
#include "device.h" |
#include "device.h" |
48 |
#include "devices.h" /* for struct footbridge_data */ |
#include "devices.h" |
49 |
#include "machine.h" |
#include "machine.h" |
50 |
#include "memory.h" |
#include "memory.h" |
51 |
#include "misc.h" |
#include "misc.h" |
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56 |
#define DEV_FOOTBRIDGE_TICK_SHIFT 14 |
#define DEV_FOOTBRIDGE_TICK_SHIFT 14 |
57 |
#define DEV_FOOTBRIDGE_LENGTH 0x400 |
#define DEV_FOOTBRIDGE_LENGTH 0x400 |
58 |
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#define TIMER_POLL_THRESHOLD 15 |
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60 |
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61 |
/* |
/* |
70 |
int i; |
int i; |
71 |
struct footbridge_data *d = (struct footbridge_data *) extra; |
struct footbridge_data *d = (struct footbridge_data *) extra; |
72 |
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73 |
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if (!d->timer_being_read) |
74 |
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d->timer_poll_mode = 0; |
75 |
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76 |
for (i=0; i<N_FOOTBRIDGE_TIMERS; i++) { |
for (i=0; i<N_FOOTBRIDGE_TIMERS; i++) { |
77 |
int amount = 1 << DEV_FOOTBRIDGE_TICK_SHIFT; |
unsigned int amount = 1 << DEV_FOOTBRIDGE_TICK_SHIFT; |
78 |
if (d->timer_control[i] & TIMER_FCLK_16) |
if (d->timer_control[i] & TIMER_FCLK_16) |
79 |
amount >>= 4; |
amount >>= 4; |
80 |
else if (d->timer_control[i] & TIMER_FCLK_256) |
else if (d->timer_control[i] & TIMER_FCLK_256) |
104 |
/* |
/* |
105 |
* dev_footbridge_isa_access(): |
* dev_footbridge_isa_access(): |
106 |
* |
* |
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* NetBSD seems to read 0x79000000 to find out which ISA interrupt occurred, |
* Reading the byte at 0x79000000 is a quicker way to figure out which ISA |
108 |
* a quicker way than dealing with legacy 0x20/0xa0 ISA ports. |
* interrupt has occurred (and acknowledging it at the same time), than |
109 |
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* dealing with the legacy 0x20/0xa0 ISA ports. |
110 |
*/ |
*/ |
111 |
int dev_footbridge_isa_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(footbridge_isa) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
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112 |
{ |
{ |
113 |
/* struct footbridge_data *d = extra; */ |
/* struct footbridge_data *d = extra; */ |
114 |
uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
115 |
int x; |
int x; |
116 |
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|
117 |
idata = memory_readmax64(cpu, data, len); |
if (writeflag == MEM_WRITE) { |
118 |
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idata = memory_readmax64(cpu, data, len); |
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if (writeflag == MEM_WRITE) |
|
119 |
fatal("[ footbridge_isa: WARNING/TODO: write! ]\n"); |
fatal("[ footbridge_isa: WARNING/TODO: write! ]\n"); |
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/* |
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* NetBSD seems to want a value of 0x20 + x, where x is the highest |
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* priority ISA interrupt which is currently asserted and not masked. |
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*/ |
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for (x=0; x<16; x++) { |
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if (x == 2) |
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continue; |
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if (x < 8 && (cpu->machine->isa_pic_data.pic1->irr & |
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~cpu->machine->isa_pic_data.pic1->ier & |
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(1 << x))) |
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break; |
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if (x >= 8 && (cpu->machine->isa_pic_data.pic2->irr & |
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~cpu->machine->isa_pic_data.pic2->ier & |
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(1 << (x&7)))) |
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break; |
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120 |
} |
} |
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if (x == 16) |
x = cpu->machine->isa_pic_data.last_int; |
123 |
fatal("_\n_ SPORADIC but INVALID ISA interrupt\n_\n"); |
if (x == 0) |
124 |
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cpu_interrupt_ack(cpu, 32 + x); |
125 |
odata = 0x20 + (x & 15); |
|
126 |
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if (x < 8) |
127 |
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odata = cpu->machine->isa_pic_data.pic1->irq_base + x; |
128 |
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else |
129 |
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odata = cpu->machine->isa_pic_data.pic2->irq_base + x - 8; |
130 |
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|
131 |
if (writeflag == MEM_READ) |
if (writeflag == MEM_READ) |
132 |
memory_writemax64(cpu, data, len, odata); |
memory_writemax64(cpu, data, len, odata); |
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137 |
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138 |
/* |
/* |
139 |
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* Reset pin at ISA port 0x338, at least in the NetWinder: |
140 |
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* |
141 |
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* TODO: NOT WORKING YET! |
142 |
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*/ |
143 |
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DEVICE_ACCESS(footbridge_reset) |
144 |
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{ |
145 |
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uint64_t idata = 0; |
146 |
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147 |
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if (writeflag == MEM_WRITE) { |
148 |
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idata = memory_readmax64(cpu, data, len); |
149 |
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if (idata & 0x40) { |
150 |
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debug("[ footbridge_reset: GP16: Halting. ]\n"); |
151 |
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cpu->running = 0; |
152 |
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exit(1); |
153 |
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} |
154 |
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} |
155 |
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156 |
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return 1; |
157 |
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} |
158 |
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159 |
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160 |
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/* |
161 |
* dev_footbridge_pci_access(): |
* dev_footbridge_pci_access(): |
162 |
* |
* |
163 |
* The Footbridge PCI configuration space is not implemented as "address + |
* The Footbridge PCI configuration space is implemented as a direct memory |
164 |
* data port" pair, but instead a 24-bit (16 MB) chunk of physical memory |
* space (i.e. not one port for addr and one port for data). This function |
165 |
* decodes as the address. This function translates that into bus_pci_access |
* translates that into bus_pci calls. |
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* calls. |
|
166 |
*/ |
*/ |
167 |
int dev_footbridge_pci_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(footbridge_pci) |
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uint64_t relative_addr, unsigned char *data, size_t len, |
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int writeflag, void *extra) |
|
168 |
{ |
{ |
169 |
struct footbridge_data *d = extra; |
struct footbridge_data *d = extra; |
170 |
uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
171 |
int bus, device, function, regnr, res; |
int bus, dev, func, reg; |
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uint64_t pci_word; |
|
172 |
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173 |
idata = memory_readmax64(cpu, data, len); |
if (writeflag == MEM_WRITE) |
174 |
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idata = memory_readmax64(cpu, data, len|MEM_PCI_LITTLE_ENDIAN); |
175 |
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|
176 |
bus = (relative_addr >> 16) & 0xff; |
/* Decompose the (direct) address into its components: */ |
177 |
device = (relative_addr >> 11) & 0x1f; |
bus_pci_decompose_1(relative_addr, &bus, &dev, &func, ®); |
178 |
function = (relative_addr >> 8) & 0x7; |
bus_pci_setaddr(cpu, d->pcibus, bus, dev, func, reg); |
|
regnr = relative_addr & 0xff; |
|
179 |
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|
180 |
if (bus == 255) { |
if (bus == 255) { |
181 |
fatal("[ footbridge DEBUG ERROR: bus 255 unlikely," |
fatal("[ footbridge DEBUG ERROR: bus 255 unlikely," |
183 |
exit(1); |
exit(1); |
184 |
} |
} |
185 |
|
|
186 |
debug("[ footbridge_pci: %s bus %i, device %i, function " |
debug("[ footbridge pci: %s bus %i, device %i, function %i, register " |
187 |
"%i, register %i ]\n", writeflag == MEM_READ? "read from" |
"%i ]\n", writeflag == MEM_READ? "read from" : "write to", bus, |
188 |
: "write to", bus, device, function, regnr); |
dev, func, reg); |
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if (d->pcibus == NULL) { |
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fatal("dev_footbridge_pci_access(): no PCI bus?\n"); |
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return 0; |
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} |
|
189 |
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190 |
pci_word = relative_addr & 0x00ffffff; |
bus_pci_data_access(cpu, d->pcibus, writeflag == MEM_READ? |
191 |
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&odata : &idata, len, writeflag); |
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res = bus_pci_access(cpu, mem, BUS_PCI_ADDR, |
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&pci_word, MEM_WRITE, d->pcibus); |
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if (writeflag == MEM_READ) { |
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res = bus_pci_access(cpu, mem, BUS_PCI_DATA, |
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&pci_word, MEM_READ, d->pcibus); |
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odata = pci_word; |
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} else { |
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pci_word = idata; |
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res = bus_pci_access(cpu, mem, BUS_PCI_DATA, |
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&pci_word, MEM_WRITE, d->pcibus); |
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} |
|
192 |
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|
193 |
if (writeflag == MEM_READ) |
if (writeflag == MEM_READ) |
194 |
memory_writemax64(cpu, data, len, odata); |
memory_writemax64(cpu, data, len|MEM_PCI_LITTLE_ENDIAN, odata); |
195 |
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|
196 |
return 1; |
return 1; |
197 |
} |
} |
202 |
* |
* |
203 |
* The DC21285 registers. |
* The DC21285 registers. |
204 |
*/ |
*/ |
205 |
int dev_footbridge_access(struct cpu *cpu, struct memory *mem, |
DEVICE_ACCESS(footbridge) |
|
uint64_t relative_addr, unsigned char *data, size_t len, |
|
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int writeflag, void *extra) |
|
206 |
{ |
{ |
207 |
struct footbridge_data *d = extra; |
struct footbridge_data *d = extra; |
208 |
uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
209 |
int timer_nr = 0; |
int timer_nr = 0; |
210 |
|
|
211 |
idata = memory_readmax64(cpu, data, len); |
if (writeflag == MEM_WRITE) |
212 |
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idata = memory_readmax64(cpu, data, len); |
213 |
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|
214 |
if (relative_addr >= TIMER_1_LOAD && relative_addr <= TIMER_4_CLEAR) { |
if (relative_addr >= TIMER_1_LOAD && relative_addr <= TIMER_4_CLEAR) { |
215 |
timer_nr = (relative_addr >> 5) & (N_FOOTBRIDGE_TIMERS - 1); |
timer_nr = (relative_addr >> 5) & (N_FOOTBRIDGE_TIMERS - 1); |
226 |
odata = 0x1065; /* DC21285_DEVICE_ID */ |
odata = 0x1065; /* DC21285_DEVICE_ID */ |
227 |
break; |
break; |
228 |
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229 |
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case 0x04: |
230 |
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case 0x0c: |
231 |
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case 0x10: |
232 |
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case 0x14: |
233 |
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case 0x18: |
234 |
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/* TODO. Written to by Linux. */ |
235 |
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break; |
236 |
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case REVISION: |
case REVISION: |
238 |
odata = 3; /* footbridge revision number */ |
odata = 3; /* footbridge revision number */ |
239 |
break; |
break; |
240 |
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241 |
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case PCI_ADDRESS_EXTENSION: |
242 |
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/* TODO: Written to by Linux. */ |
243 |
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if (writeflag == MEM_WRITE && idata != 0) |
244 |
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fatal("[ footbridge: TODO: write to PCI_ADDRESS_" |
245 |
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"EXTENSION: 0x%llx ]\n", (long long)idata); |
246 |
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break; |
247 |
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248 |
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case SA_CONTROL: |
249 |
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/* Read by Linux: */ |
250 |
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odata = PCI_CENTRAL_FUNCTION; |
251 |
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break; |
252 |
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|
253 |
case UART_DATA: |
case UART_DATA: |
254 |
if (writeflag == MEM_WRITE) |
if (writeflag == MEM_WRITE) |
255 |
console_putchar(d->console_handle, idata); |
console_putchar(d->console_handle, idata); |
287 |
d->irq_enable |= idata; |
d->irq_enable |= idata; |
288 |
cpu_interrupt(cpu, 64); |
cpu_interrupt(cpu, 64); |
289 |
} else { |
} else { |
290 |
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odata = d->irq_enable; |
291 |
fatal("[ WARNING: footbridge read from " |
fatal("[ WARNING: footbridge read from " |
292 |
"ENABLE SET? ]\n"); |
"ENABLE SET? ]\n"); |
293 |
exit(1); |
exit(1); |
|
odata = d->irq_enable; |
|
294 |
} |
} |
295 |
break; |
break; |
296 |
|
|
299 |
d->irq_enable &= ~idata; |
d->irq_enable &= ~idata; |
300 |
cpu_interrupt(cpu, 64); |
cpu_interrupt(cpu, 64); |
301 |
} else { |
} else { |
302 |
|
odata = d->irq_enable; |
303 |
fatal("[ WARNING: footbridge read from " |
fatal("[ WARNING: footbridge read from " |
304 |
"ENABLE CLEAR? ]\n"); |
"ENABLE CLEAR? ]\n"); |
305 |
exit(1); |
exit(1); |
|
odata = d->irq_enable; |
|
306 |
} |
} |
307 |
break; |
break; |
308 |
|
|
349 |
|
|
350 |
case TIMER_1_VALUE: |
case TIMER_1_VALUE: |
351 |
if (writeflag == MEM_READ) { |
if (writeflag == MEM_READ) { |
352 |
dev_footbridge_tick(cpu, d); |
/* |
353 |
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* NOTE/TODO: This is INCORRECT but speeds up NetBSD |
354 |
|
* and OpenBSD boot sequences: if the timer is polled |
355 |
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* "very often" (such as during bootup), then this |
356 |
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* causes the timers to expire quickly. |
357 |
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*/ |
358 |
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d->timer_being_read = 1; |
359 |
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d->timer_poll_mode ++; |
360 |
|
if (d->timer_poll_mode >= TIMER_POLL_THRESHOLD) { |
361 |
|
d->timer_poll_mode = TIMER_POLL_THRESHOLD; |
362 |
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dev_footbridge_tick(cpu, d); |
363 |
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dev_footbridge_tick(cpu, d); |
364 |
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dev_footbridge_tick(cpu, d); |
365 |
|
} |
366 |
odata = d->timer_value[timer_nr]; |
odata = d->timer_value[timer_nr]; |
367 |
|
d->timer_being_read = 0; |
368 |
} else |
} else |
369 |
d->timer_value[timer_nr] = idata & TIMER_MAX_VAL; |
d->timer_value[timer_nr] = idata & TIMER_MAX_VAL; |
370 |
break; |
break; |
413 |
} |
} |
414 |
|
|
415 |
|
|
416 |
/* |
DEVINIT(footbridge) |
|
* devinit_footbridge(): |
|
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*/ |
|
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int devinit_footbridge(struct devinit *devinit) |
|
417 |
{ |
{ |
418 |
struct footbridge_data *d; |
struct footbridge_data *d; |
419 |
uint64_t pci_addr = 0x7b000000; |
uint64_t pci_addr = 0x7b000000; |
429 |
/* DC21285 register access: */ |
/* DC21285 register access: */ |
430 |
memory_device_register(devinit->machine->memory, devinit->name, |
memory_device_register(devinit->machine->memory, devinit->name, |
431 |
devinit->addr, DEV_FOOTBRIDGE_LENGTH, |
devinit->addr, DEV_FOOTBRIDGE_LENGTH, |
432 |
dev_footbridge_access, d, MEM_DEFAULT, NULL); |
dev_footbridge_access, d, DM_DEFAULT, NULL); |
433 |
|
|
434 |
/* ISA interrupt status word: */ |
/* ISA interrupt status/acknowledgement: */ |
435 |
memory_device_register(devinit->machine->memory, "footbridge_isa", |
memory_device_register(devinit->machine->memory, "footbridge_isa", |
436 |
0x79000000, 8, dev_footbridge_isa_access, d, MEM_DEFAULT, NULL); |
0x79000000, 8, dev_footbridge_isa_access, d, DM_DEFAULT, NULL); |
437 |
|
|
438 |
/* The "fcom" console: */ |
/* The "fcom" console: */ |
439 |
d->console_handle = console_start_slave(devinit->machine, "fcom"); |
d->console_handle = console_start_slave(devinit->machine, "fcom", 0); |
440 |
|
|
441 |
/* A PCI bus: */ |
/* A PCI bus: */ |
442 |
d->pcibus = bus_pci_init(devinit->irq_nr); |
d->pcibus = bus_pci_init( |
443 |
|
devinit->machine, |
444 |
|
devinit->irq_nr, /* PCI controller irq */ |
445 |
|
0x7c000000, /* PCI device io offset */ |
446 |
|
0x80000000, /* PCI device mem offset */ |
447 |
|
0x00000000, /* PCI port base */ |
448 |
|
0x00000000, /* PCI mem base */ |
449 |
|
0, /* PCI irq base: TODO */ |
450 |
|
0x7c000000, /* ISA port base */ |
451 |
|
0x80000000, /* ISA mem base */ |
452 |
|
32); /* ISA port base */ |
453 |
|
|
454 |
/* ... with some default devices for known machine types: */ |
/* ... with some default devices for known machine types: */ |
455 |
switch (devinit->machine->machine_type) { |
switch (devinit->machine->machine_type) { |
456 |
case MACHINE_CATS: |
case MACHINE_CATS: |
457 |
bus_pci_add(devinit->machine, d->pcibus, |
bus_pci_add(devinit->machine, d->pcibus, |
458 |
devinit->machine->memory, 0xc0, 7, 0, |
devinit->machine->memory, 0xc0, 7, 0, "ali_m1543"); |
459 |
pci_ali_m1543_init, pci_ali_m1543_rr); |
bus_pci_add(devinit->machine, d->pcibus, |
460 |
|
devinit->machine->memory, 0xc0, 10, 0, "dec21143"); |
461 |
bus_pci_add(devinit->machine, d->pcibus, |
bus_pci_add(devinit->machine, d->pcibus, |
462 |
devinit->machine->memory, 0xc0, 16, 0, |
devinit->machine->memory, 0xc0, 16, 0, "ali_m5229"); |
|
pci_ali_m5229_init, pci_ali_m5229_rr); |
|
463 |
break; |
break; |
464 |
case MACHINE_NETWINDER: |
case MACHINE_NETWINDER: |
465 |
bus_pci_add(devinit->machine, d->pcibus, |
bus_pci_add(devinit->machine, d->pcibus, |
466 |
devinit->machine->memory, 0xc0, 11, 0, |
devinit->machine->memory, 0xc0, 11, 0, "symphony_83c553"); |
|
pci_symphony_83c553_init, pci_symphony_83c553_rr); |
|
467 |
bus_pci_add(devinit->machine, d->pcibus, |
bus_pci_add(devinit->machine, d->pcibus, |
468 |
devinit->machine->memory, 0xc0, 11, 1, |
devinit->machine->memory, 0xc0, 11, 1, "symphony_82c105"); |
469 |
pci_symphony_82c105_init, pci_symphony_82c105_rr); |
memory_device_register(devinit->machine->memory, |
470 |
|
"footbridge_reset", 0x7c000338, 1, |
471 |
|
dev_footbridge_reset_access, d, DM_DEFAULT, NULL); |
472 |
break; |
break; |
473 |
default:fatal("footbridge: unimplemented machine type.\n"); |
default:fatal("footbridge: unimplemented machine type.\n"); |
474 |
exit(1); |
exit(1); |
477 |
/* PCI configuration space: */ |
/* PCI configuration space: */ |
478 |
memory_device_register(devinit->machine->memory, |
memory_device_register(devinit->machine->memory, |
479 |
"footbridge_pci", pci_addr, 0x1000000, |
"footbridge_pci", pci_addr, 0x1000000, |
480 |
dev_footbridge_pci_access, d, MEM_DEFAULT, NULL); |
dev_footbridge_pci_access, d, DM_DEFAULT, NULL); |
481 |
|
|
482 |
/* Timer ticks: */ |
/* Timer ticks: */ |
483 |
for (i=0; i<N_FOOTBRIDGE_TIMERS; i++) { |
for (i=0; i<N_FOOTBRIDGE_TIMERS; i++) { |
485 |
d->timer_load[i] = TIMER_MAX_VAL; |
d->timer_load[i] = TIMER_MAX_VAL; |
486 |
} |
} |
487 |
machine_add_tickfunction(devinit->machine, |
machine_add_tickfunction(devinit->machine, |
488 |
dev_footbridge_tick, d, DEV_FOOTBRIDGE_TICK_SHIFT); |
dev_footbridge_tick, d, DEV_FOOTBRIDGE_TICK_SHIFT, 0.0); |
489 |
|
|
490 |
devinit->return_ptr = d; |
devinit->return_ptr = d; |
491 |
return 1; |
return 1; |