/[gxemul]/trunk/src/devices/dev_ether.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/devices/dev_ether.c

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Revision 12 - (hide annotations)
Mon Oct 8 16:18:38 2007 UTC (13 years, 1 month ago) by dpavlin
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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.905 2005/08/16 09:16:24 debug Exp $
20050628	Continuing the work on the ARM translation engine. end_of_page
		works. Experimenting with load/store translation caches
		(virtual -> physical -> host).
20050629	More ARM stuff (memory access translation cache, mostly). This
		might break a lot of stuff elsewhere, probably some MIPS-
		related translation things.
20050630	Many load/stores are now automatically generated and included
		into cpu_arm_instr.c; 1024 functions in total (!).
		Fixes based on feedback from Alec Voropay: only print 8 hex
		digits instead of 16 in some cases when emulating 32-bit
		machines; similar 8 vs 16 digit fix for breakpoint addresses;
		4Kc has 16 TLB entries, not 48; the MIPS config select1
		register is now printed with "reg ,0".
		Also changing many other occurances of 16 vs 8 digit output.
		Adding cache associativity fields to mips_cpu_types.h; updating
		some other cache fields; making the output of
		mips_cpu_dumpinfo() look nicer.
		Generalizing the bintrans stuff for device accesses to also
		work with the new translation system. (This might also break
		some MIPS things.)
		Adding multi-load/store instructions to the ARM disassembler
		and the translator, and some optimizations of various kinds.
20050701	Adding a simple dev_disk (it can read/write sectors from
		disk images).
20050712	Adding dev_ether (a simple ethernet send/receive device).
		Debugger command "ninstrs" for toggling show_nr_of_instructions
		during runtime.
		Removing the framebuffer logo.
20050713	Continuing on dev_ether.
		Adding a dummy cpu_alpha (again).
20050714	More work on cpu_alpha.
20050715	More work on cpu_alpha. Many instructions work, enough to run
		a simple framebuffer fill test (similar to the ARM test).
20050716	More Alpha stuff.
20050717	Minor updates (Alpha stuff).
20050718	Minor updates (Alpha stuff).
20050719	Generalizing some Alpha instructions.
20050720	More Alpha-related updates.
20050721	Continuing on cpu_alpha. Importing rpb.h from NetBSD/alpha.
20050722	Alpha-related updates: userland stuff (Hello World using
		write() compiled statically for FreeBSD/Alpha runs fine), and
		more instructions are now implemented.
20050723	Fixing ldq_u and stq_u.
		Adding more instructions (conditional moves, masks, extracts,
		shifts).
20050724	More FreeBSD/Alpha userland stuff, and adding some more
		instructions (inserts).
20050725	Continuing on the Alpha stuff. (Adding dummy ldt/stt.)
		Adding a -A command line option to turn off alignment checks
		in some cases (for translated code).
		Trying to remove the old bintrans code which updated the pc
		and nr_of_executed_instructions for every instruction.
20050726	Making another attempt att removing the pc/nr of instructions
		code. This time it worked, huge performance increase for
		artificial test code, but performance loss for real-world
		code :-( so I'm scrapping that code for now.
		Tiny performance increase on Alpha (by using ret instead of
		jmp, to play nice with the Alpha's branch prediction) for the
		old MIPS bintrans backend.
20050727	Various minor fixes and cleanups.
20050728	Switching from a 2-level virtual to host/physical translation
		system for ARM emulation, to a 1-level translation.
		Trying to switch from 2-level to 1-level for the MIPS bintrans
		system as well (Alpha only, so far), but there is at least one
		problem: caches and/or how they work with device mappings.
20050730	Doing the 2-level to 1-level conversion for the i386 backend.
		The cache/device bug is still there for R2K/3K :(
		Various other minor updates (Malta etc).
		The mc146818 clock now updates the UIP bit in a way which works
		better with Linux for at least sgimips and Malta emulation.
		Beginning the work on refactoring the dyntrans system.
20050731	Continuing the dyntrans refactoring.
		Fixing a small but serious host alignment bug in memory_rw.
		Adding support for big-endian load/stores to the i386 bintrans
		backend.
		Another minor i386 bintrans backend update: stores from the
		zero register are now one (or two) loads shorter.
		The slt and sltu instructions were incorrectly implemented for
		the i386 backend; only using them for 32-bit mode for now.
20050801	Continuing the dyntrans refactoring.
		Cleanup of the ns16550 serial controller (removing unnecessary
		code).
		Bugfix (memory corruption bug) in dev_gt, and a patch/hack from
		Alec Voropay for Linux/Malta.
20050802	More cleanup/refactoring of the dyntrans subsystem: adding
		phys_page pointers to the lookup tables, for quick jumps
		between translated pages.
		Better fix for the ns16550 device (but still no real FIFO
		functionality).
		Converting cpu_ppc to the new dyntrans system. This means that
		I will have to start from scratch with implementing each
		instruction, and figure out how to implement dual 64/32-bit
		modes etc.
		Removing the URISC CPU family, because it was useless.
20050803	When selecting a machine type, the main type can now be omitted
		if the subtype name is unique. (I.e. -E can be omitted.)
		Fixing a dyntrans/device update bug. (Writes to offset 0 of
		a device could sometimes go unnoticed.)
		Adding an experimental "instruction combination" hack for
		ARM for memset-like byte fill loops.
20050804	Minor progress on cpu_alpha and related things.
		Finally fixing the MIPS dmult/dmultu bugs.
		Fixing some minor TODOs.
20050805	Generalizing the 8259 PIC. It now also works with Cobalt
		and evbmips emulation, in addition to the x86 hack.
		Finally converting the ns16550 device to use devinit.
		Continuing the work on the dyntrans system. Thinking about
		how to add breakpoints.
20050806	More dyntrans updates. Breakpoints seem to work now.
20050807	Minor updates: cpu_alpha and related things; removing
		dev_malta (as it isn't used any more).
		Dyntrans: working on general "show trace tree" support.
		The trace tree stuff now works with both the old MIPS code and
		with newer dyntrans modes. :)
		Continuing on Alpha-related stuff (trying to get *BSD to boot
		a bit further, adding more instructions, etc).
20050808	Adding a dummy IA64 cpu family, and continuing the refactoring
		of the dyntrans system.
		Removing the regression test stuff, because it was more or
		less useless.
		Adding loadlinked/storeconditional type instructions to the
		Alpha emulation. (Needed for Linux/alpha. Not very well tested
		yet.)
20050809	The function call trace tree now prints a per-function nr of
		arguments. (Semi-meaningless, since that data isn't read yet
		from the ELFs; some hardcoded symbols such as memcpy() and
		strlen() work fine, though.)
		More dyntrans refactoring; taking out more of the things that
		are common to all cpu families.
20050810	Working on adding support for "dual mode" for PPC dyntrans
		(i.e. both 64-bit and 32-bit modes).
		(Re)adding some simple PPC instructions.
20050811	Adding a dummy M68K cpu family. The dyntrans system isn't ready
		for variable-length ISAs yet, so it's completely bogus so far.
		Re-adding more PPC instructions.
		Adding a hack to src/file.c which allows OpenBSD/mac68k a.out
		kernels to be loaded.
		Beginning to add PPC loads/stores. So far they only work in
		32-bit mode.
20050812	The configure file option "add_remote" now accepts symbolic
		host names, in addition to numeric IPv4 addresses.
		Re-adding more PPC instructions.
20050814	Continuing to port back more PPC instructions.
		Found and fixed the cache/device write-update bug for 32-bit
		MIPS bintrans. :-)
		Triggered a really weird and annoying bug in Compaq's C
		compiler; ccc sometimes outputs code which loads from an
		address _before_ checking whether the pointer was NULL or not.
		(I'm not sure how to handle this problem.)
20050815	Removing all of the old x86 instruction execution code; adding
		a new (dummy) dyntrans module for x86.
		Taking the first steps to extend the dyntrans system to support
		variable-length instructions.
		Slowly preparing for the next release.
20050816	Adding a dummy SPARC cpu module.
		Minor updates (documentation etc) for the release.

==============  RELEASE 0.3.5  ==============


1 dpavlin 12 /*
2     * Copyright (C) 2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28     * $Id: dev_ether.c,v 1.7 2005/08/04 10:53:25 debug Exp $
29     *
30     * Basic "ethernet" network device. This is a simple test device which can
31     * be used to send and receive packets to/from a simulated ethernet network.
32     */
33    
34     #include <stdio.h>
35     #include <stdlib.h>
36     #include <string.h>
37    
38     #include "cpu.h"
39     #include "device.h"
40     #include "devices.h"
41     #include "emul.h"
42     #include "machine.h"
43     #include "memory.h"
44     #include "misc.h"
45     #include "net.h"
46    
47    
48     #define DEV_ETHER_MAXBUFLEN 16384
49     #define DEV_ETHER_TICK_SHIFT 14
50    
51     #define STATUS_RECEIVED 0x01
52     #define STATUS_MORE_AVAIL 0x02
53    
54     struct ether_data {
55     unsigned char buf[DEV_ETHER_MAXBUFLEN];
56     unsigned char mac[6];
57    
58     int status;
59     int packet_len;
60    
61     int irq_nr;
62     };
63    
64    
65     /*
66     * dev_ether_tick():
67     */
68     void dev_ether_tick(struct cpu *cpu, void *extra)
69     {
70     struct ether_data *d = (struct ether_data *) extra;
71     int r = 0;
72    
73     d->status &= ~STATUS_MORE_AVAIL;
74     if (cpu->machine->emul->net != NULL)
75     r = net_ethernet_rx_avail(cpu->machine->emul->net, d);
76     if (r)
77     d->status |= STATUS_MORE_AVAIL;
78    
79     if (d->status)
80     cpu_interrupt(cpu, d->irq_nr);
81     else
82     cpu_interrupt_ack(cpu, d->irq_nr);
83     }
84    
85    
86     /*
87     * dev_ether_buf_access():
88     */
89     int dev_ether_buf_access(struct cpu *cpu, struct memory *mem,
90     uint64_t relative_addr, unsigned char *data, size_t len,
91     int writeflag, void *extra)
92     {
93     struct ether_data *d = (struct ether_data *) extra;
94    
95     if (writeflag == MEM_WRITE)
96     memcpy(d->buf + relative_addr, data, len);
97     else
98     memcpy(data, d->buf + relative_addr, len);
99     return 1;
100     }
101    
102    
103     /*
104     * dev_ether_access():
105     */
106     int dev_ether_access(struct cpu *cpu, struct memory *mem,
107     uint64_t relative_addr, unsigned char *data, size_t len,
108     int writeflag, void *extra)
109     {
110     struct ether_data *d = (struct ether_data *) extra;
111     uint64_t idata = 0, odata = 0;
112     unsigned char *incoming_ptr;
113     int incoming_len;
114    
115     idata = memory_readmax64(cpu, data, len);
116    
117     switch (relative_addr) {
118     case 0x0000:
119     if (writeflag == MEM_READ) {
120     odata = d->status;
121     d->status = 0;
122     cpu_interrupt_ack(cpu, d->irq_nr);
123     } else
124     fatal("[ ether: WARNING: write to status ]\n");
125     break;
126     case 0x0010:
127     if (writeflag == MEM_READ)
128     odata = d->packet_len;
129     else {
130     if ((int64_t)idata < 0) {
131     fatal("[ ether: ERROR: packet len too"
132     " short (%i bytes) ]\n", (int)idata);
133     idata = -1;
134     }
135     if (idata > DEV_ETHER_MAXBUFLEN) {
136     fatal("[ ether: ERROR: packet len too"
137     " large (%i bytes) ]\n", (int)idata);
138     idata = DEV_ETHER_MAXBUFLEN;
139     }
140     d->packet_len = idata;
141     }
142     break;
143     case 0x0020:
144     if (writeflag == MEM_READ)
145     fatal("[ ether: WARNING: read from command ]\n");
146     else {
147     switch (idata) {
148     case 0x00: /* Receive: */
149     if (cpu->machine->emul->net == NULL)
150     fatal("[ ether: RECEIVE but no "
151     "net? ]\n");
152     else {
153     d->status &= ~STATUS_RECEIVED;
154     net_ethernet_rx(cpu->machine->emul->net,
155     d, &incoming_ptr, &incoming_len);
156     if (incoming_ptr != NULL) {
157     d->status |= STATUS_RECEIVED;
158     if (incoming_len >
159     DEV_ETHER_MAXBUFLEN)
160     incoming_len =
161     DEV_ETHER_MAXBUFLEN;
162     memcpy(d->buf, incoming_ptr,
163     incoming_len);
164     free(incoming_ptr);
165     d->packet_len = incoming_len;
166     }
167     }
168     dev_ether_tick(cpu, d);
169     break;
170     case 0x01: /* Send */
171     if (cpu->machine->emul->net == NULL)
172     fatal("[ ether: SEND but no net? ]\n");
173     else
174     net_ethernet_tx(cpu->machine->emul->net,
175     d, d->buf, d->packet_len);
176     d->status &= ~STATUS_RECEIVED;
177     dev_ether_tick(cpu, d);
178     break;
179     default:fatal("[ ether: UNIMPLEMENTED command 0x"
180     "%02x ]\n", idata);
181     cpu->running = 0;
182     }
183     }
184     break;
185     default:if (writeflag == MEM_WRITE) {
186     fatal("[ ether: unimplemented write to "
187     "offset 0x%x: data=0x%x ]\n", (int)
188     relative_addr, (int)idata);
189     } else {
190     fatal("[ ether: unimplemented read from "
191     "offset 0x%x ]\n", (int)relative_addr);
192     }
193     }
194    
195     if (writeflag == MEM_READ)
196     memory_writemax64(cpu, data, len, odata);
197    
198     return 1;
199     }
200    
201    
202     /*
203     * devinit_ether():
204     */
205     int devinit_ether(struct devinit *devinit)
206     {
207     struct ether_data *d = malloc(sizeof(struct ether_data));
208     size_t nlen;
209     char *n1, *n2;
210     char tmp[50];
211    
212     nlen = strlen(devinit->name) + 80;
213     n1 = malloc(nlen);
214     n2 = malloc(nlen);
215    
216     if (d == NULL || n1 == NULL || n2 == NULL) {
217     fprintf(stderr, "out of memory\n");
218     exit(1);
219     }
220     memset(d, 0, sizeof(struct ether_data));
221     d->irq_nr = devinit->irq_nr;
222    
223     net_generate_unique_mac(devinit->machine, d->mac);
224     snprintf(tmp, sizeof(tmp), "%02x:%02x:%02x:%02x:%02x:%02x",
225     d->mac[0], d->mac[1], d->mac[2], d->mac[3], d->mac[4], d->mac[5]);
226    
227     snprintf(n1, nlen, "%s [%s]", devinit->name, tmp);
228     snprintf(n2, nlen, "%s [%s, control]", devinit->name, tmp);
229    
230     memory_device_register(devinit->machine->memory, n1,
231     devinit->addr, DEV_ETHER_MAXBUFLEN, dev_ether_buf_access, (void *)d,
232     MEM_DYNTRANS_OK | MEM_DYNTRANS_WRITE_OK |
233     MEM_READING_HAS_NO_SIDE_EFFECTS, d->buf);
234     memory_device_register(devinit->machine->memory, n2,
235     devinit->addr + DEV_ETHER_MAXBUFLEN,
236     DEV_ETHER_LENGTH-DEV_ETHER_MAXBUFLEN, dev_ether_access, (void *)d,
237     MEM_DEFAULT, NULL);
238    
239     net_add_nic(devinit->machine->emul->net, d, d->mac);
240    
241     machine_add_tickfunction(devinit->machine,
242     dev_ether_tick, d, DEV_ETHER_TICK_SHIFT);
243    
244     return 1;
245     }
246    

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