/[gxemul]/trunk/src/devices/dev_dreamcast_maple.c
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Contents of /trunk/src/devices/dev_dreamcast_maple.c

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Revision 34 - (show annotations)
Mon Oct 8 16:21:17 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 18351 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1480 2007/02/19 01:34:42 debug Exp $
20061029	Changing usleep(1) calls in the debugger to usleep(10000)
20061107	Adding a new disk image option (-d o...) which sets the ISO9660
		filesystem base offset; also making some other hacks to allow
		NetBSD/dreamcast and homebrew demos/games to boot directly
		from a filesystem image.
		Moving Dreamcast-specific stuff in the documentation to its
		own page (dreamcast.html).
		Adding a border to the Dreamcast PVR framebuffer.
20061108	Adding a -T command line option (again?), for halting the
		emulator on unimplemented memory accesses.
20061109	Continuing on various SH4 and Dreamcast related things.
		The emulator should now halt on more unimplemented device
		accesses, instead of just printing a warning, forcing me to
		actually implement missing stuff :)
20061111	Continuing on SH4 and Dreamcast stuff.
		Adding a bogus Landisk (SH4) machine mode.
20061112	Implementing some parts of the Dreamcast GDROM device. With
		some ugly hacks, NetBSD can (barely) mount an ISO image.
20061113	NetBSD/dreamcast now starts booting from the Live CD image,
		but crashes randomly quite early on in the boot process.
20061122	Beginning on a skeleton interrupt.h and interrupt.c for the
		new interrupt subsystem.
20061124	Continuing on the new interrupt system; taking the first steps
		to attempt to connect CPUs (SuperH and MIPS) and devices
		(dev_cons and SH4 timer interrupts) to it. Many things will
		probably break from now on.
20061125	Converting dev_ns16550, dev_8253 to the new interrupt system.
		Attempting to begin to convert the ISA bus.
20061130	Incorporating a patch from Brian Foley for the configure
		script, which checks for X11 libs in /usr/X11R6/lib64 (which
		is used on some Linux systems).
20061227	Adding a note in the man page about booting from Dreamcast
		CDROM images (i.e. that no external kernel is needed).
20061229	Continuing on the interrupt system rewrite: beginning to
		convert more devices, adding abort() calls for legacy interrupt
		system calls so that everything now _has_ to be rewritten!
		Almost all machine modes are now completely broken.
20061230	More progress on removing old interrupt code, mostly related
		to the ISA bus + devices, the LCA bus (on AlphaBook1), and
		the Footbridge bus (for CATS). And some minor PCI stuff.
		Connecting the ARM cpu to the new interrupt system.
		The CATS, NetWinder, and QEMU_MIPS machine modes now work with
		the new interrupt system :)
20061231	Connecting PowerPC CPUs to the new interrupt system.
		Making PReP machines (IBM 6050) work again.
		Beginning to convert the GT PCI controller (for e.g. Malta
		and Cobalt emulation). Some things work, but not everything.
		Updating Copyright notices for 2007.
20070101	Converting dev_kn02 from legacy style to devinit; the 3max
		machine mode now works with the new interrupt system :-]
20070105	Beginning to convert the SGI O2 machine to the new interrupt
		system; finally converting O2 (IP32) devices to devinit, etc.
20070106	Continuing on the interrupt system redesign/rewrite; KN01
		(PMAX), KN230, and Dreamcast ASIC interrupts should work again,
		moving out stuff from machine.h and devices.h into the
		corresponding devices, beginning the rewrite of i80321
		interrupts, etc.
20070107	Beginning on the rewrite of Eagle interrupt stuff (PReP, etc).
20070117	Beginning the rewrite of Algor (V3) interrupts (finally
		changing dev_v3 into devinit style).
20070118	Removing the "bus" registry concept from machine.h, because
		it was practically meaningless.
		Continuing on the rewrite of Algor V3 ISA interrupts.
20070121	More work on Algor interrupts; they are now working again,
		well enough to run NetBSD/algor. :-)
20070122	Converting VR41xx (HPCmips) interrupts. NetBSD/hpcmips
		can be installed using the new interrupt system :-)
20070123	Making the testmips mode work with the new interrupt system.
20070127	Beginning to convert DEC5800 devices to devinit, and to the
		new interrupt system.
		Converting Playstation 2 devices to devinit, and converting
		the interrupt system. Also fixing a severe bug: the interrupt
		mask register on Playstation 2 is bitwise _toggled_ on writes.
20070128	Removing the dummy NetGear machine mode and the 8250 device
		(which was only used by the NetGear machine).
		Beginning to convert the MacPPC GC (Grand Central) interrupt
		controller to the new interrupt system.
		Converting Jazz interrupts (PICA61 etc.) to the new interrupt
		system. NetBSD/arc can be installed again :-)
		Fixing the JAZZ timer (hardcoding it at 100 Hz, works with
		NetBSD and it is better than a completely dummy timer as it
		was before).
		Converting dev_mp to the new interrupt system, although I
		haven't had time to actually test it yet.
		Completely removing src/machines/interrupts.c, cpu_interrupt
		and cpu_interrupt_ack in src/cpu.c, and
		src/include/machine_interrupts.h! Adding fatal error messages
		+ abort() in the few places that are left to fix.
		Converting dev_z8530 to the new interrupt system.
		FINALLY removing the md_int struct completely from the
		machine struct.
		SH4 fixes (adding a PADDR invalidation in the ITLB replacement
		code in memory_sh.c); the NetBSD/dreamcast LiveCD now runs
		all the way to the login prompt, and can be interacted with :-)
		Converting the CPC700 controller (PCI and interrupt controller
		for PM/PPC) to the new interrupt system.
20070129	Fixing MACE ISA interrupts (SGI IP32 emulation). Both NetBSD/
		sgimips' and OpenBSD/sgi's ramdisk kernels can now be
		interacted with again.
20070130	Moving out the MIPS multi_lw and _sw instruction combinations
		so that they are auto-generated at compile time instead.
20070131	Adding detection of amd64/x86_64 hosts in the configure script,
		for doing initial experiments (again :-) with native code
		generation.
		Adding a -k command line option to set the size of the dyntrans
		cache, and a -B command line option to disable native code
		generation, even if GXemul was compiled with support for
		native code generation for the specific host CPU architecture.
20070201	Experimenting with a skeleton for native code generation.
		Changing the default behaviour, so that native code generation
		is now disabled by default, and has to be enabled by using
		-b on the command line.
20070202	Continuing the native code generation experiments.
		Making PCI interrupts work for Footbridge again.
20070203	More native code generation experiments.
		Removing most of the native code generation experimental code,
		it does not make sense to include any quick hacks like this.
		Minor cleanup/removal of some more legacy MIPS interrupt code.
20070204	Making i80321 interrupts work again (for NetBSD/evbarm etc.),
		and fixing the timer at 100 Hz.
20070206	Experimenting with removing the wdc interrupt slowness hack.
20070207	Lowering the number of dyntrans TLB entries for MIPS from
		192 to 128, resulting in a minor speed improvement.
		Minor optimization to the code invalidation routine in
		cpu_dyntrans.c.
20070208	Increasing (experimentally) the nr of dyntrans instructions per
		loop from 60 to 120.
20070210	Commenting out (experimentally) the dyntrans_device_danger
		detection in memory_rw.c.
		Changing the testmips and baremips machines to use a revision 2
		MIPS64 CPU by default, instead of revision 1.
		Removing the dummy i960, IA64, x86, AVR32, and HP PA-RISC
		files, the PC bios emulation, and the Olivetti M700 (ARC) and
		db64360 emulation modes.
20070211	Adding an "mp" demo to the demos directory, which tests the
		SMP functionality of the testmips machine.
		Fixing PReP interrupts some more. NetBSD/prep now boots again.
20070216	Adding a "nop workaround" for booting Mach/PMAX to the
		documentation; thanks to Artur Bujdoso for the values.
		Converting more of the MacPPC interrupt stuff to the new
		system.
		Beginning to convert BeBox interrupts to the new system.
		PPC603e should NOT have the PPC_NO_DEC flag! Removing it.
		Correcting BeBox clock speed (it was set to 100 in the NetBSD
		bootinfo block, but should be 33000000/4), allowing NetBSD
		to start without using the (incorrect) PPC_NO_DEC hack.
20070217	Implementing (slow) AltiVec vector loads and stores, allowing
		NetBSD/macppc to finally boot using the GENERIC kernel :-)
		Updating the documentation with install instructions for
		NetBSD/macppc.
20070218-19	Regression testing for the release.

==============  RELEASE 0.4.4  ==============
1 /*
2 * Copyright (C) 2006-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_dreamcast_maple.c,v 1.11 2007/02/03 20:14:23 debug Exp $
29 *
30 * Dreamcast "Maple" bus controller.
31 *
32 * The Maple bus has 4 ports (A-D), and each port has up to 6 possible "units"
33 * (where unit 0 is the main unit). Communication is done using DMA; each
34 * DMA transfer sends one or more requests, and for each of these requests
35 * a response is generated (or a timeout if there was no device at the
36 * specific port).
37 *
38 * See Marcus Comstedt's page (http://mc.pp.se/dc/maplebus.html) for more
39 * details about the DMA request/responses.
40 *
41 *
42 * TODO:
43 * Unit numbers / IDs for real Maple devices.
44 */
45
46 #include <stdio.h>
47 #include <stdlib.h>
48 #include <string.h>
49 #include <sys/time.h>
50
51 #include "console.h"
52 #include "cpu.h"
53 #include "device.h"
54 #include "machine.h"
55 #include "memory.h"
56 #include "misc.h"
57
58 #include "dreamcast_maple.h"
59 #include "dreamcast_sysasicvar.h"
60
61
62 #define debug fatal
63
64 #define N_MAPLE_PORTS 4
65
66 #define MAX_CHARS 8192
67 #define MAX_CONTROLLER_DATA 4096
68
69 #define MAPLE_TICK_SHIFT 17
70
71 struct maple_device {
72 struct maple_devinfo devinfo;
73 };
74
75 struct dreamcast_maple_data {
76 /* Registers: */
77 uint32_t dmaaddr;
78 int enable;
79 int timeout;
80
81 /* Attached devices: */
82 struct maple_device *device[N_MAPLE_PORTS];
83
84 /* For keyboard/controller input: */
85 int console_handle;
86 uint8_t char_queue[MAX_CHARS];
87 uint16_t controller_queue[MAX_CONTROLLER_DATA];
88 int char_queue_head, char_queue_tail;
89 int controller_queue_head, controller_queue_tail;
90 };
91
92
93 /*
94 * Maple devices:
95 *
96 * TODO: Figure out strings and numbers of _real_ Maple devices.
97 */
98 static struct maple_device maple_device_controller = {
99 {
100 BE32_TO_HOST(MAPLE_FUNC(MAPLE_FN_CONTROLLER)), /* di_func */
101 { 0,0,0 }, /* di_function_data[3] */
102 0, /* di_area_code */
103 0, /* di_connector_direction */
104 "Dreamcast Controller", /* di_product_name */
105 "di_product_license", /* di_product_license */
106 LE16_TO_HOST(100), /* di_standby_power */
107 LE16_TO_HOST(100) /* di_max_power */
108 }
109 };
110 static struct maple_device maple_device_keyboard = {
111 {
112 BE32_TO_HOST(MAPLE_FUNC(MAPLE_FN_KEYBOARD)),/* di_func */
113 { LE32_TO_HOST(2),0,0 }, /* di_function_data[3] */
114 0, /* di_area_code */
115 0, /* di_connector_direction */
116 "Keyboard", /* di_product_name */
117 "di_product_license", /* di_product_license */
118 LE16_TO_HOST(100), /* di_standby_power */
119 LE16_TO_HOST(100) /* di_max_power */
120 }
121 };
122 #if 0
123 static struct maple_device maple_device_mouse = {
124 {
125 BE32_TO_HOST(MAPLE_FUNC(MAPLE_FN_MOUSE)),/* di_func */
126 { 0,0,0 }, /* di_function_data[3] */
127 0, /* di_area_code */
128 0, /* di_connector_direction */
129 "Dreamcast Mouse", /* di_product_name */
130 "di_product_license", /* di_product_license */
131 LE16_TO_HOST(100), /* di_standby_power */
132 LE16_TO_HOST(100) /* di_max_power */
133 }
134 };
135 #endif
136
137
138 DEVICE_TICK(maple)
139 {
140 struct dreamcast_maple_data *d = (struct dreamcast_maple_data *) extra;
141 int control_bits, key = console_readchar(d->console_handle);
142
143 if (key < 0)
144 return;
145
146 /* Add to the keyboard queue: */
147 d->char_queue[d->char_queue_head] = key;
148 d->char_queue_head = (d->char_queue_head + 1) % MAX_CHARS;
149 if (d->char_queue_head == d->char_queue_tail)
150 fatal("[ dreamcast_maple: KEYBOARD QUEUE OVERRUN! ]\n");
151
152 control_bits = 0;
153 switch (key) {
154 case 'a':
155 case 'A':
156 control_bits = 0x0004;
157 break;
158 case 'b':
159 case 'B':
160 control_bits = 0x0002;
161 break;
162 case 'c':
163 case 'C':
164 control_bits = 0x0001;
165 break;
166 case 'x':
167 case 'X':
168 control_bits = 0x0400;
169 break;
170 case 'y':
171 case 'Y':
172 control_bits = 0x0200;
173 break;
174 case 'z':
175 case 'Z':
176 control_bits = 0x0100;
177 break;
178 case 's':
179 case 'S': /* Start */
180 control_bits = 0x0008;
181 break;
182 case '8': /* up */
183 control_bits = 0x0010;
184 break;
185 case '2': /* down */
186 case 'k':
187 control_bits = 0x0020;
188 break;
189 case '4': /* left */
190 case 'u':
191 control_bits = 0x0040;
192 break;
193 case '6': /* right */
194 case 'o':
195 control_bits = 0x0080;
196 break;
197 }
198
199 if (control_bits != 0) {
200 /* Add to the controller queue: */
201 d->controller_queue[d->controller_queue_head] = control_bits;
202 d->controller_queue_head =
203 (d->controller_queue_head + 1) % MAX_CONTROLLER_DATA;
204 if (d->controller_queue_head == d->controller_queue_tail)
205 fatal("[ dreamcast_maple: CONTROLLER QUEUE "
206 "OVERRUN! ]\n");
207 }
208 }
209
210
211 static int get_key(struct dreamcast_maple_data *d)
212 {
213 int key = d->char_queue[d->char_queue_tail];
214 if (d->char_queue_head == d->char_queue_tail)
215 return -1;
216
217 d->char_queue_tail = (d->char_queue_tail + 1) % MAX_CHARS;
218 return key;
219 }
220
221
222 static int get_controller(struct dreamcast_maple_data *d)
223 {
224 int c = d->controller_queue[d->controller_queue_tail];
225 if (d->controller_queue_head == d->controller_queue_tail)
226 return 0;
227
228 d->controller_queue_tail = (d->controller_queue_tail + 1)
229 % MAX_CONTROLLER_DATA;
230 return c;
231 }
232
233
234 /*
235 * maple_getcond_controller_response():
236 *
237 * Generate a controller response. Based on info from Marcus
238 * Comstedt's page: http://mc.pp.se/dc/controller.html
239 */
240 static void maple_getcond_controller_response(struct dreamcast_maple_data *d,
241 struct cpu *cpu, int port, uint32_t receive_addr)
242 {
243 uint8_t buf[8];
244 uint32_t response_code, transfer_code;
245 int c;
246
247 transfer_code = (MAPLE_RESPONSE_DATATRF << 24) |
248 (((port << 6) | 0x20) << 16) |
249 ((port << 6) << 8) |
250 3 /* Transfer length in 32-bit words */;
251 transfer_code = BE32_TO_HOST(transfer_code);
252 cpu->memory_rw(cpu, cpu->mem, receive_addr, (void *) &transfer_code,
253 4, MEM_WRITE, NO_EXCEPTIONS | PHYSICAL);
254 receive_addr += 4;
255
256 response_code = BE32_TO_HOST(MAPLE_FUNC(MAPLE_FN_CONTROLLER));
257 cpu->memory_rw(cpu, cpu->mem, receive_addr, (void *) &response_code,
258 4, MEM_WRITE, NO_EXCEPTIONS | PHYSICAL);
259 receive_addr += 4;
260
261 /* NOTE: Inverse of the buttons pressed! */
262 c = ~get_controller(d);
263
264 /*
265 * buf[0..1] = little endian button bitfield
266 * buf[2] = right analogue trigger (0-255)
267 * buf[3] = left analogue trigger (0-255)
268 * buf[4] = analogue joystick X (0-255)
269 * buf[5] = analogue joystick Y (0-255)
270 * buf[6] = second analogue joystick X (0-255)
271 * buf[7] = second analogue joystick Y (0-255)
272 */
273 memset(buf, 0, 8);
274 buf[0] = c & 0xff;
275 buf[1] = c >> 8;
276 buf[4] = buf[5] = buf[6] = buf[7] = 0;
277
278 cpu->memory_rw(cpu, cpu->mem, receive_addr, (void *) &buf, 8,
279 MEM_WRITE, NO_EXCEPTIONS | PHYSICAL);
280 }
281
282
283 /*
284 * maple_getcond_keyboard_response():
285 *
286 * Generate a keyboard key-press response. Based on info from Marcus
287 * Comstedt's page: http://mc.pp.se/dc/kbd.html
288 */
289 static void maple_getcond_keyboard_response(struct dreamcast_maple_data *d,
290 struct cpu *cpu, int port, uint32_t receive_addr)
291 {
292 int key;
293 uint8_t buf[8];
294 uint32_t response_code, transfer_code;
295
296 transfer_code = (MAPLE_RESPONSE_DATATRF << 24) |
297 (((port << 6) | 0x20) << 16) |
298 ((port << 6) << 8) |
299 3 /* Transfer length in 32-bit words */;
300 transfer_code = BE32_TO_HOST(transfer_code);
301 cpu->memory_rw(cpu, cpu->mem, receive_addr, (void *) &transfer_code,
302 4, MEM_WRITE, NO_EXCEPTIONS | PHYSICAL);
303 receive_addr += 4;
304
305 response_code = BE32_TO_HOST(MAPLE_FUNC(MAPLE_FN_KEYBOARD));
306 cpu->memory_rw(cpu, cpu->mem, receive_addr, (void *) &response_code,
307 4, MEM_WRITE, NO_EXCEPTIONS | PHYSICAL);
308 receive_addr += 4;
309
310 key = get_key(d);
311
312 /*
313 * buf[0] = shift keys (1 = ctrl, 2 = shift)
314 * buf[1] = led state
315 * buf[2] = key
316 */
317 memset(buf, 0, 8);
318
319 if (key >= 'a' && key <= 'z') buf[2] = 4 + key - 'a';
320 if (key >= 'A' && key <= 'Z') buf[0] = 2, buf[2] = 4 + key - 'A';
321 if (key >= 1 && key <= 26) buf[0] = 1, buf[2] = 4 + key - 1;
322 if (key >= '1' && key <= '9') buf[2] = 0x1e + key - '1';
323 if (key == '!') buf[0] = 2, buf[2] = 0x1e;
324 if (key == '"') buf[0] = 2, buf[2] = 0x1f;
325 if (key == '#') buf[0] = 2, buf[2] = 0x20;
326 if (key == '$') buf[0] = 2, buf[2] = 0x21;
327 if (key == '%') buf[0] = 2, buf[2] = 0x22;
328 if (key == '^') buf[0] = 2, buf[2] = 0x23;
329 if (key == '&') buf[0] = 2, buf[2] = 0x24;
330 if (key == '*') buf[0] = 2, buf[2] = 0x25;
331 if (key == '(') buf[0] = 2, buf[2] = 0x26;
332 if (key == '@') buf[0] = 2, buf[2] = 0x1f;
333 if (key == '\n' || key == '\r') buf[0] = 0, buf[2] = 0x28;
334 if (key == ')') buf[0] = 2, buf[2] = 0x27;
335 if (key == '\b') buf[0] = 0, buf[2] = 0x2a;
336 if (key == '\t') buf[0] = 0, buf[2] = 0x2b;
337 if (key == ' ') buf[0] = 0, buf[2] = 0x2c;
338 if (key == '0') buf[2] = 0x27;
339 if (key == 27) buf[2] = 0x29;
340 if (key == '-') buf[2] = 0x2d;
341 if (key == '=') buf[2] = 0x2e;
342 if (key == '[') buf[2] = 0x2f;
343 if (key == '\\') buf[2] = 0x31;
344 if (key == '|') buf[2] = 0x31, buf[0] = 2;
345 if (key == ']') buf[2] = 0x32;
346 if (key == ';') buf[2] = 0x33;
347 if (key == ':') buf[2] = 0x34;
348 if (key == ',') buf[2] = 0x36;
349 if (key == '.') buf[2] = 0x37;
350 if (key == '/') buf[2] = 0x38;
351 if (key == '<') buf[2] = 0x36, buf[0] = 2;
352 if (key == '>') buf[2] = 0x37, buf[0] = 2;
353 if (key == '?') buf[2] = 0x38, buf[0] = 2;
354 if (key == '+') buf[2] = 0x57;
355
356 cpu->memory_rw(cpu, cpu->mem, receive_addr, (void *) &buf, 8,
357 MEM_WRITE, NO_EXCEPTIONS | PHYSICAL);
358 }
359
360
361 /*
362 * maple_do_dma_xfer():
363 *
364 * Perform a DMA transfer. enable should be 1, and dmaaddr should point to
365 * the memory to transfer.
366 */
367 void maple_do_dma_xfer(struct cpu *cpu, struct dreamcast_maple_data *d)
368 {
369 uint32_t addr = d->dmaaddr;
370
371 if (!d->enable) {
372 fatal("[ maple_do_dma_xfer: not enabled? ]\n");
373 return;
374 }
375
376 /* debug("[ dreamcast_maple: DMA transfer, dmaaddr = "
377 "0x%08"PRIx32" ]\n", addr); */
378
379 /*
380 * DMA transfers must be 32-byte aligned, according to Marcus
381 * Comstedt's Maple demo program.
382 */
383 if (addr & 0x1f) {
384 fatal("[ dreamcast_maple: dmaaddr 0x%08"PRIx32" is NOT"
385 " 32-byte aligned; aborting ]\n", addr);
386 return;
387 }
388
389 /*
390 * Handle one or more requests/responses:
391 *
392 * (This is "reverse engineered" from Comstedt's maple demo program;
393 * it might not be good enough to emulate how the Maple is being
394 * used by other programs.)
395 */
396 for (;;) {
397 uint32_t receive_addr, response_code, cond;
398 int datalen, port, last_message, cmd, to, from, datalen_cmd;
399 int unit;
400 uint8_t buf[8];
401
402 /* Read the message' two control words: */
403 cpu->memory_rw(cpu, cpu->mem, addr, (void *) &buf, 8, MEM_READ,
404 NO_EXCEPTIONS | PHYSICAL);
405 addr += 8;
406
407 datalen = buf[0] * sizeof(uint32_t);
408 if (buf[1] & 2) {
409 fatal("[ dreamcast_maple: TODO: GUN bit. ]\n");
410 /* TODO: Set some bits in A05F80C4 to indicate
411 which raster position a lightgun is pointing
412 at! */
413 exit(1);
414 }
415 port = buf[2];
416 last_message = buf[3] & 0x80;
417 receive_addr = buf[4] + (buf[5] << 8) + (buf[6] << 16)
418 + (buf[7] << 24);
419
420 if (receive_addr & 0xe000001f)
421 fatal("[ dreamcast_maple: WARNING! receive address 0x"
422 "%08"PRIx32" isn't valid! ]\n", receive_addr);
423
424 /* Read the command word for this message: */
425 cpu->memory_rw(cpu, cpu->mem, addr, (void *) &buf, 4, MEM_READ,
426 NO_EXCEPTIONS | PHYSICAL);
427 addr += 4;
428
429 cmd = buf[0];
430 to = buf[1];
431 from = buf[2];
432 datalen_cmd = buf[3];
433
434 /* Decode the unit number: */
435 unit = 0;
436 switch (to & 0x3f) {
437 case 0x00:
438 case 0x20: unit = 0; break;
439 case 0x01: unit = 1; break;
440 case 0x02: unit = 2; break;
441 case 0x04: unit = 3; break;
442 case 0x08: unit = 4; break;
443 case 0x10: unit = 5; break;
444 default: fatal("[ dreamcast_maple: ERROR! multiple "
445 "units? Not yet implemented. to = 0x%02x ]\n", to);
446 exit(1);
447 }
448
449 /* debug("[ dreamcast_maple: cmd=0x%02x, port=%c, unit=%i"
450 ", datalen=%i words ]\n", cmd, port+'A', unit,
451 datalen_cmd); */
452
453 /*
454 * Handle the command:
455 */
456 switch (cmd) {
457
458 case MAPLE_COMMAND_DEVINFO:
459 if (d->device[port] == NULL || unit != 0) {
460 /* No device present: Timeout. */
461 /* debug("[ dreamcast_maple: response="
462 "timeout ]\n"); */
463 response_code = (uint32_t) -1;
464 response_code = LE32_TO_HOST(response_code);
465 cpu->memory_rw(cpu, cpu->mem, receive_addr,
466 (void *) &response_code, 4, MEM_WRITE,
467 NO_EXCEPTIONS | PHYSICAL);
468 } else {
469 /* Device present: */
470 int i;
471 struct maple_devinfo *di =
472 &d->device[port]->devinfo;
473 /* debug("[ dreamcast_maple: response="
474 "\"%s\" ]\n", di->di_product_name); */
475 response_code = MAPLE_RESPONSE_DEVINFO |
476 (((port << 6) | 0x20) << 8) |
477 ((port << 6) << 16) |
478 ((sizeof(struct maple_devinfo) /
479 sizeof(uint32_t)) << 24);
480 response_code = LE32_TO_HOST(response_code);
481 cpu->memory_rw(cpu, cpu->mem, receive_addr,
482 (void *) &response_code, 4, MEM_WRITE,
483 NO_EXCEPTIONS | PHYSICAL);
484 for (i=0; i<sizeof(struct maple_devinfo); i++)
485 cpu->memory_rw(cpu, cpu->mem,
486 receive_addr + 4 + i, (unsigned
487 char *) di + i, 1, MEM_WRITE,
488 NO_EXCEPTIONS | PHYSICAL);
489 }
490 break;
491
492 case MAPLE_COMMAND_GETCOND:
493 cpu->memory_rw(cpu, cpu->mem, addr, (void *) &buf, 4,
494 MEM_READ, NO_EXCEPTIONS | PHYSICAL);
495 cond = buf[3] + (buf[2] << 8) + (buf[1] << 16)
496 + (buf[0] << 24);
497 if (cond & MAPLE_FUNC(MAPLE_FN_CONTROLLER)) {
498 maple_getcond_controller_response(
499 d, cpu, port, receive_addr);
500 } else if (cond & MAPLE_FUNC(MAPLE_FN_KEYBOARD)) {
501 maple_getcond_keyboard_response(
502 d, cpu, port, receive_addr);
503 } else {
504 fatal("[ dreamcast_maple: WARNING: GETCOND: "
505 "UNIMPLEMENTED 0x%08"PRIx32" ]\n", cond);
506 }
507 break;
508
509 case MAPLE_COMMAND_BWRITE:
510 fatal("[ dreamcast_maple: BWRITE: TODO ]\n");
511 break;
512
513 default:fatal("[ dreamcast_maple: command %i: TODO ]\n", cmd);
514 exit(1);
515 }
516
517 addr += datalen_cmd * 4;
518
519 /* Last request? Then stop. */
520 if (last_message)
521 break;
522 }
523
524 /* Assert the SYSASIC_EVENT_MAPLE_DMADONE event: */
525 SYSASIC_TRIGGER_EVENT(SYSASIC_EVENT_MAPLE_DMADONE);
526 }
527
528
529 DEVICE_ACCESS(dreamcast_maple)
530 {
531 struct dreamcast_maple_data *d = (struct dreamcast_maple_data *) extra;
532 uint64_t idata = 0, odata = 0;
533
534 if (writeflag == MEM_WRITE)
535 idata = memory_readmax64(cpu, data, len);
536
537 switch (relative_addr) {
538
539 case 0x04: /* MAPLE_DMAADDR */
540 if (writeflag == MEM_WRITE) {
541 d->dmaaddr = idata;
542 /* debug("[ dreamcast_maple: dmaaddr set to 0x%08x"
543 " ]\n", d->dmaaddr); */
544 } else {
545 fatal("[ dreamcast_maple: TODO: read from dmaaddr ]\n");
546 odata = d->dmaaddr;
547 }
548 break;
549
550 case 0x10: /* MAPLE_RESET2 */
551 if (writeflag == MEM_WRITE && idata != 0)
552 fatal("[ dreamcast_maple: UNIMPLEMENTED reset2 value"
553 " 0x%08x ]\n", (int)idata);
554 break;
555
556 case 0x14: /* MAPLE_ENABLE */
557 if (writeflag == MEM_WRITE)
558 d->enable = idata;
559 else
560 odata = d->enable;
561 break;
562
563 case 0x18: /* MAPLE_STATE */
564 if (writeflag == MEM_WRITE) {
565 switch (idata) {
566 case 0: break;
567 case 1: maple_do_dma_xfer(cpu, d);
568 break;
569 default:fatal("[ dreamcast_maple: UNIMPLEMENTED "
570 "state value %i ]\n", (int)idata);
571 }
572 } else {
573 /* Always return 0 to indicate DMA xfer complete. */
574 odata = 0;
575 }
576 break;
577
578 case 0x80: /* MAPLE_SPEED */
579 if (writeflag == MEM_WRITE) {
580 d->timeout = (idata >> 16) & 0xffff;
581 /* TODO: Bits 8..9 are "speed", but only the value
582 0 (indicating 2 Mbit/s) should be used. */
583 debug("[ dreamcast_maple: timeout set to %i ]\n",
584 d->timeout);
585 } else {
586 odata = d->timeout << 16;
587 }
588 break;
589
590 case 0x8c: /* MAPLE_RESET */
591 if (writeflag == MEM_WRITE) {
592 if (idata != 0x6155404f)
593 fatal("[ dreamcast_maple: UNIMPLEMENTED reset "
594 "value 0x%08x ]\n", (int)idata);
595 d->enable = 0;
596 }
597 break;
598
599 default:if (writeflag == MEM_READ) {
600 fatal("[ dreamcast_maple: UNIMPLEMENTED read from "
601 "addr 0x%x ]\n", (int)relative_addr);
602 } else {
603 fatal("[ dreamcast_maple: UNIMPLEMENTED write to addr "
604 "0x%x: 0x%x ]\n", (int)relative_addr, (int)idata);
605 }
606 }
607
608 if (writeflag == MEM_READ)
609 memory_writemax64(cpu, data, len, odata);
610
611 return 1;
612 }
613
614
615 DEVINIT(dreamcast_maple)
616 {
617 struct machine *machine = devinit->machine;
618 struct dreamcast_maple_data *d =
619 malloc(sizeof(struct dreamcast_maple_data));
620 if (d == NULL) {
621 fprintf(stderr, "out of memory\n");
622 exit(1);
623 }
624 memset(d, 0, sizeof(struct dreamcast_maple_data));
625
626 memory_device_register(machine->memory, devinit->name,
627 0x5f6c00, 0x100, dev_dreamcast_maple_access, d, DM_DEFAULT, NULL);
628
629 /* Devices connected to port A..D: */
630 d->device[0] = &maple_device_controller;
631 d->device[1] = NULL;
632 d->device[2] = &maple_device_keyboard;
633 d->device[3] = NULL; /* TODO: &maple_device_mouse; */
634
635 d->console_handle = console_start_slave_inputonly(machine, "maple", 1);
636 machine->main_console_handle = d->console_handle;
637
638 machine_add_tickfunction(devinit->machine, dev_maple_tick, d,
639 MAPLE_TICK_SHIFT, 0.0);
640
641 return 1;
642 }
643
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