/[gxemul]/trunk/src/devices/dev_dreamcast_g2.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/devices/dev_dreamcast_g2.c

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Revision 42 - (hide annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 7640 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============


1 dpavlin 34 /*
2     * Copyright (C) 2006-2007 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 42 * $Id: dev_dreamcast_g2.c,v 1.5 2007/06/15 19:11:15 debug Exp $
29 dpavlin 34 *
30 dpavlin 42 * COMMENT: Dreamcast G2 bus
31 dpavlin 34 *
32     * Register offsets are from KOS, NetBSD sources, etc.
33     *
34     * TODO:
35     * Figure out what all these registers do!
36     */
37    
38     #include <stdio.h>
39     #include <stdlib.h>
40     #include <string.h>
41    
42     #include "cpu.h"
43     #include "device.h"
44     #include "machine.h"
45     #include "memory.h"
46     #include "misc.h"
47    
48    
49     #ifdef UNSTABLE_DEVEL
50     #define debug fatal
51     #endif
52    
53     #define NREGS (0x100/sizeof(uint32_t))
54    
55     struct dreamcast_g2_data {
56     uint32_t dma_reg[NREGS];
57     uint32_t extdma_reg[NREGS];
58     uint32_t unknown_reg[NREGS];
59     };
60    
61     /* dma_reg[] offsets: */
62     #define PVR_STATE 0x00
63     #define PVR_LEN 0x04
64     #define PVR_DST 0x08
65     #define PVR_LMMODE0 0x84
66     #define PVR_LMMODE1 0x88
67    
68     /*
69     * External DMA: 4 channels
70     *
71     * Note: Addresses and sizes must be 32-byte aligned.
72     * DIR is 0 for CPU to External device, 1 for External to CPU.
73     * MODE should be 5 for transfers to/from the SPU.
74     */
75     #define EXTDMA_CTRL_EXT_ADDR 0x00 /* EXTDMA_CTRL_* are repeated */
76     #define EXTDMA_CTRL_SH4_ADDR 0x04 /* 4 times (once for each channel) */
77     #define EXTDMA_CTRL_SIZE 0x08
78     #define EXTDMA_CTRL_DIR 0x0c
79     #define EXTDMA_CTRL_MODE 0x10
80     #define EXTDMA_CTRL_CTRL1 0x14
81     #define EXTDMA_CTRL_CTRL2 0x18
82     #define EXTDMA_CTRL_UNKNOWN 0x1c
83    
84     #define EXTDMA_WAITSTATE 0x90
85     #define EXTDMA_MAGIC 0xbc
86     #define EXTDMA_MAGIC_VALUE 0x4659404f
87    
88     #define EXTDMA_STAT_EXT_ADDR 0xc0 /* EXTDMA_STAT_* are repeated 4 */
89     #define EXTDMA_STAT_SH4_ADDR 0xc4 /* times too */
90     #define EXTDMA_STAT_SIZE 0xc8
91     #define EXTDMA_STAT_STATUS 0xcc
92    
93    
94     DEVICE_ACCESS(dreamcast_g2)
95     {
96 dpavlin 42 struct dreamcast_g2_data *d = extra;
97 dpavlin 34 uint64_t idata = 0, odata = 0;
98    
99     if (writeflag == MEM_WRITE)
100     idata = memory_readmax64(cpu, data, len);
101    
102     /* Default read: */
103     if (writeflag == MEM_READ)
104     odata = d->dma_reg[relative_addr / sizeof(uint32_t)];
105    
106     switch (relative_addr) {
107    
108     case PVR_LMMODE0: /* 0x84 */
109     case PVR_LMMODE1: /* 0x88 */
110     if (writeflag == MEM_WRITE) {
111     if (idata == 0) {
112     /* Done by IP.BIN during startup... */
113     } else {
114     fatal("[ dreamcast_g2: UNIMPLEMENTED write "
115     "0x84/0x88: TODO ]\n");
116     exit(1);
117     }
118     } else {
119     fatal("[ dreamcast_g2: read from 0x84/0x88: TODO ]\n");
120     exit(1);
121     }
122     break;
123    
124     case 0x8c:
125     if (writeflag == MEM_WRITE) {
126     fatal("[ dreamcast_g2: write to 0x8c: TODO ]\n");
127     exit(1);
128     } else {
129     /* 0x20 means G2 DMA in progress? */
130     /* 0x11 = mask which has to do with AICA */
131     odata = 0x11 * (random() & 1);
132     }
133     break;
134    
135     default:if (writeflag == MEM_READ) {
136     fatal("[ dreamcast_g2: read from addr 0x%x ]\n",
137     (int)relative_addr);
138     } else {
139     fatal("[ dreamcast_g2: write to addr 0x%x: 0x%x ]\n",
140     (int)relative_addr, (int)idata);
141     }
142     exit(1);
143     }
144    
145     /* Default write: */
146     if (writeflag == MEM_WRITE)
147     d->dma_reg[relative_addr / sizeof(uint32_t)] = idata;
148    
149     if (writeflag == MEM_READ)
150     memory_writemax64(cpu, data, len, odata);
151    
152     return 1;
153     }
154    
155    
156     DEVICE_ACCESS(dreamcast_g2_extdma)
157     {
158 dpavlin 42 struct dreamcast_g2_data *d = extra;
159 dpavlin 34 uint64_t idata = 0, odata = 0;
160     int reg = relative_addr, channel = 0;
161    
162     if (writeflag == MEM_WRITE)
163     idata = memory_readmax64(cpu, data, len);
164    
165     /* Default read: */
166     if (writeflag == MEM_READ)
167     odata = d->extdma_reg[relative_addr / sizeof(uint32_t)];
168    
169     if (reg < 0x7f) {
170     channel = (reg >> 5) & 3;
171     reg &= 0x1f;
172     }
173    
174     if (reg >= 0xc0 && reg < 0xff) {
175     channel = (reg >> 4) & 3;
176     reg = 0xc0 + (reg & 0xf);
177     }
178    
179     switch (reg) {
180    
181     case EXTDMA_WAITSTATE:
182     break;
183    
184     case 0x94:
185     /* Written to by boot stage 1 in IP.BIN? */
186     if (writeflag == MEM_WRITE) {
187     if (idata != 0x271) {
188     fatal("Unimplemented write to extdma 0x94\n");
189     exit(1);
190     }
191     }
192     break;
193    
194     default:if (writeflag == MEM_READ) {
195     fatal("[ dreamcast_g2_extdma: read from addr 0x%x ]\n",
196     (int)relative_addr);
197     } else {
198     fatal("[ dreamcast_g2_extdma: write to addr 0x%x: "
199     "0x%x ]\n", (int)relative_addr, (int)idata);
200     }
201     exit(1);
202     }
203    
204     /* Default write: */
205     if (writeflag == MEM_WRITE)
206     d->extdma_reg[relative_addr / sizeof(uint32_t)] = idata;
207    
208     if (writeflag == MEM_READ)
209     memory_writemax64(cpu, data, len, odata);
210    
211     return 1;
212     }
213    
214    
215     DEVICE_ACCESS(dreamcast_g2_unknown)
216     {
217 dpavlin 42 struct dreamcast_g2_data *d = extra;
218 dpavlin 34 uint64_t idata = 0, odata = 0;
219    
220     if (writeflag == MEM_WRITE)
221     idata = memory_readmax64(cpu, data, len);
222    
223     /* Default read: */
224     if (writeflag == MEM_READ)
225     odata = d->unknown_reg[relative_addr / sizeof(uint32_t)];
226    
227     switch (relative_addr) {
228    
229     case 0x90:
230     case 0x94:
231     if (writeflag != MEM_WRITE || idata != 0x222) {
232     fatal("[ dreamcast_g2_unknown: unimplemented 0x90 ]\n");
233     exit(1);
234     }
235     break;
236    
237     case 0xa0:
238     case 0xa4:
239     if (writeflag != MEM_WRITE || idata != 0x2001) {
240     fatal("[ dreamcast_g2_unknown: unimplemented 0xa0 ]\n");
241     exit(1);
242     }
243     break;
244    
245     case 0xe4:
246     /* Writing 0x1fffff resets a disabled GD-ROM drive? */
247     if (writeflag != MEM_WRITE || idata != 0x1fffff) {
248     fatal("[ dreamcast_g2_unknown: unimplemented 0xe4 ]\n");
249     exit(1);
250     }
251     break;
252    
253     default:if (writeflag == MEM_READ) {
254     fatal("[ dreamcast_g2_unknown: read from addr 0x%x ]\n",
255     (int)relative_addr);
256     } else {
257     fatal("[ dreamcast_g2_unknown: write to addr 0x%x: "
258     "0x%x ]\n", (int)relative_addr, (int)idata);
259     }
260     exit(1);
261     }
262    
263     /* Default write: */
264     if (writeflag == MEM_WRITE)
265     d->unknown_reg[relative_addr / sizeof(uint32_t)] = idata;
266    
267     if (writeflag == MEM_READ)
268     memory_writemax64(cpu, data, len, odata);
269    
270     return 1;
271     }
272    
273    
274     DEVINIT(dreamcast_g2)
275     {
276     struct machine *machine = devinit->machine;
277 dpavlin 42 struct dreamcast_g2_data *d;
278    
279     CHECK_ALLOCATION(d = malloc(sizeof(struct dreamcast_g2_data)));
280 dpavlin 34 memset(d, 0, sizeof(struct dreamcast_g2_data));
281    
282     memory_device_register(machine->memory, devinit->name,
283     0x005f6800, 0x100, dev_dreamcast_g2_access, d, DM_DEFAULT, NULL);
284    
285     memory_device_register(machine->memory, devinit->name, 0x005f7800,
286     0x100, dev_dreamcast_g2_extdma_access, d, DM_DEFAULT, NULL);
287    
288     memory_device_register(machine->memory, devinit->name, 0x005f7400,
289     0x100, dev_dreamcast_g2_unknown_access, d, DM_DEFAULT, NULL);
290    
291     return 1;
292     }
293    

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