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/* |
/* |
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* Copyright (C) 2004-2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2004-2007 Anders Gavare. All rights reserved. |
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* |
* |
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* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
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* SUCH DAMAGE. |
* SUCH DAMAGE. |
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* |
* |
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* |
* |
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* $Id: dev_dec_ioasic.c,v 1.15 2006/01/01 13:17:16 debug Exp $ |
* $Id: dev_dec_ioasic.c,v 1.17 2007/01/28 14:15:30 debug Exp $ |
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* |
* |
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* DECstation "3MIN" and "3MAX" IOASIC device. |
* DECstation "3MIN" and "3MAX" IOASIC device. |
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* |
* |
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/* Make sure that the CPU interrupt is deasserted as |
/* Make sure that the CPU interrupt is deasserted as |
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well: */ |
well: */ |
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if (idata != 0) |
fatal("TODO: interrupt rewrite!\n"); |
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cpu_interrupt_ack(cpu, 8 + idata); |
abort(); |
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// if (idata != 0) |
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// cpu_interrupt_ack(cpu, 8 + idata); |
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} |
} |
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break; |
break; |
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if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
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d->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10] = |
d->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / 0x10] = |
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idata; |
idata; |
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cpu_interrupt_ack(cpu, 8 + 0); |
fatal("TODO: interrupt rewrite!\n"); |
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abort(); |
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// cpu_interrupt_ack(cpu, 8 + 0); |
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} else |
} else |
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odata = d->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / |
odata = d->reg[(IOASIC_IMSK - IOASIC_SLOT_1_START) / |
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0x10]; |
0x10]; |