1 |
/* |
2 |
* Copyright (C) 2003-2007 Anders Gavare. All rights reserved. |
3 |
* |
4 |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
6 |
* |
7 |
* 1. Redistributions of source code must retain the above copyright |
8 |
* notice, this list of conditions and the following disclaimer. |
9 |
* 2. Redistributions in binary form must reproduce the above copyright |
10 |
* notice, this list of conditions and the following disclaimer in the |
11 |
* documentation and/or other materials provided with the distribution. |
12 |
* 3. The name of the author may not be used to endorse or promote products |
13 |
* derived from this software without specific prior written permission. |
14 |
* |
15 |
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
16 |
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
17 |
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
18 |
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
19 |
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
20 |
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
21 |
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
22 |
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
23 |
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
24 |
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
25 |
* SUCH DAMAGE. |
26 |
* |
27 |
* |
28 |
* $Id: dev_dc7085.c,v 1.60 2006/12/31 21:35:26 debug Exp $ |
29 |
* |
30 |
* DC7085 serial controller, used in some DECstation models. |
31 |
*/ |
32 |
|
33 |
#include <stdio.h> |
34 |
#include <stdlib.h> |
35 |
#include <string.h> |
36 |
|
37 |
#include "console.h" |
38 |
#include "cpu.h" |
39 |
#include "devices.h" |
40 |
#include "machine.h" |
41 |
#include "memory.h" |
42 |
#include "misc.h" |
43 |
|
44 |
#include "dc7085.h" |
45 |
|
46 |
|
47 |
#define DC_TICK_SHIFT 14 |
48 |
|
49 |
#define MAX_QUEUE_LEN 32768 |
50 |
|
51 |
struct dc_data { |
52 |
struct dc7085regs regs; |
53 |
|
54 |
int console_handle; |
55 |
|
56 |
/* For slow_serial_interrupts_hack_for_linux: */ |
57 |
int just_transmitted_something; |
58 |
|
59 |
unsigned char rx_queue_char[MAX_QUEUE_LEN]; |
60 |
char rx_queue_lineno[MAX_QUEUE_LEN]; |
61 |
int cur_rx_queue_pos_write; |
62 |
int cur_rx_queue_pos_read; |
63 |
|
64 |
int tx_scanner; |
65 |
|
66 |
struct interrupt irq; |
67 |
int use_fb; |
68 |
|
69 |
struct lk201_data lk201; |
70 |
}; |
71 |
|
72 |
|
73 |
/* |
74 |
* Add a character to the receive queue. |
75 |
*/ |
76 |
void add_to_rx_queue(void *e, int ch, int line_no) |
77 |
{ |
78 |
struct dc_data *d = (struct dc_data *) e; |
79 |
int entries_in_use = d->cur_rx_queue_pos_write - |
80 |
d->cur_rx_queue_pos_read; |
81 |
|
82 |
while (entries_in_use < 0) |
83 |
entries_in_use += MAX_QUEUE_LEN; |
84 |
|
85 |
/* Ignore mouse updates, if they come too often: */ |
86 |
if (entries_in_use > MAX_QUEUE_LEN/2 && line_no == DCMOUSE_PORT) |
87 |
return; |
88 |
|
89 |
d->rx_queue_char[d->cur_rx_queue_pos_write] = ch; |
90 |
d->rx_queue_lineno[d->cur_rx_queue_pos_write] = line_no; |
91 |
d->cur_rx_queue_pos_write ++; |
92 |
if (d->cur_rx_queue_pos_write == MAX_QUEUE_LEN) |
93 |
d->cur_rx_queue_pos_write = 0; |
94 |
|
95 |
if (d->cur_rx_queue_pos_write == d->cur_rx_queue_pos_read) |
96 |
fatal("warning: add_to_rx_queue(): rx_queue overrun!\n"); |
97 |
} |
98 |
|
99 |
|
100 |
DEVICE_TICK(dc7085) |
101 |
{ |
102 |
/* |
103 |
* If a key is available from the keyboard, add it to the rx queue. |
104 |
* If other bits are set, an interrupt might need to be caused. |
105 |
*/ |
106 |
struct dc_data *d = extra; |
107 |
int avail; |
108 |
|
109 |
if (cpu->machine->slow_serial_interrupts_hack_for_linux) { |
110 |
/* |
111 |
* Special hack to prevent Linux from Oopsing. (This makes |
112 |
* interrupts not come as fast as possible.) |
113 |
*/ |
114 |
if (d->just_transmitted_something) { |
115 |
d->just_transmitted_something --; |
116 |
return; |
117 |
} |
118 |
} |
119 |
|
120 |
d->regs.dc_csr &= ~CSR_RDONE; |
121 |
|
122 |
if ((d->regs.dc_csr & CSR_MSE) && !(d->regs.dc_csr & CSR_TRDY)) { |
123 |
int scanner_start = d->tx_scanner; |
124 |
|
125 |
/* Loop until we've checked all 4 channels, or some |
126 |
channel was ready to transmit: */ |
127 |
|
128 |
do { |
129 |
d->tx_scanner = (d->tx_scanner + 1) % 4; |
130 |
|
131 |
if (d->regs.dc_tcr & (1 << d->tx_scanner)) { |
132 |
d->regs.dc_csr |= CSR_TRDY; |
133 |
if (d->regs.dc_csr & CSR_TIE) |
134 |
INTERRUPT_ASSERT(d->irq); |
135 |
|
136 |
d->regs.dc_csr &= ~CSR_TX_LINE_NUM; |
137 |
d->regs.dc_csr |= (d->tx_scanner << 8); |
138 |
} |
139 |
} while (!(d->regs.dc_csr & CSR_TRDY) && |
140 |
d->tx_scanner != scanner_start); |
141 |
|
142 |
/* We have to return here. NetBSD can handle both |
143 |
rx and tx interrupts simultaneously, but Ultrix |
144 |
doesn't like that? */ |
145 |
|
146 |
if (d->regs.dc_csr & CSR_TRDY) |
147 |
return; |
148 |
} |
149 |
|
150 |
lk201_tick(cpu->machine, &d->lk201); |
151 |
|
152 |
avail = d->cur_rx_queue_pos_write != d->cur_rx_queue_pos_read; |
153 |
|
154 |
if (avail && (d->regs.dc_csr & CSR_MSE)) |
155 |
d->regs.dc_csr |= CSR_RDONE; |
156 |
|
157 |
if ((d->regs.dc_csr & CSR_RDONE) && (d->regs.dc_csr & CSR_RIE)) |
158 |
INTERRUPT_ASSERT(d->irq); |
159 |
} |
160 |
|
161 |
|
162 |
DEVICE_ACCESS(dc7085) |
163 |
{ |
164 |
uint64_t idata = 0, odata = 0; |
165 |
size_t i; |
166 |
struct dc_data *d = extra; |
167 |
|
168 |
if (writeflag == MEM_WRITE) |
169 |
idata = memory_readmax64(cpu, data, len); |
170 |
|
171 |
/* Always clear: */ |
172 |
d->regs.dc_csr &= ~CSR_CLR; |
173 |
|
174 |
switch (relative_addr) { |
175 |
case 0x00: /* CSR: Control and Status */ |
176 |
if (writeflag == MEM_WRITE) { |
177 |
debug("[ dc7085 write to CSR: 0x%04x ]\n", idata); |
178 |
idata &= (CSR_TIE | CSR_RIE | CSR_MSE | CSR_CLR |
179 |
| CSR_MAINT); |
180 |
d->regs.dc_csr &= ~(CSR_TIE | CSR_RIE | CSR_MSE |
181 |
| CSR_CLR | CSR_MAINT); |
182 |
d->regs.dc_csr |= idata; |
183 |
if (!(d->regs.dc_csr & CSR_MSE)) |
184 |
d->regs.dc_csr &= ~(CSR_TRDY | CSR_RDONE); |
185 |
goto do_return; |
186 |
} else { |
187 |
/* read: */ |
188 |
|
189 |
/* fatal("[ dc7085 read from CSR: (csr = 0x%04x) ]\n", |
190 |
d->regs.dc_csr); */ |
191 |
odata = d->regs.dc_csr; |
192 |
} |
193 |
break; |
194 |
case 0x08: /* LPR: */ |
195 |
if (writeflag == MEM_WRITE) { |
196 |
debug("[ dc7085 write to LPR: 0x%04x ]\n", idata); |
197 |
d->regs.dc_rbuf_lpr = idata; |
198 |
goto do_return; |
199 |
} else { |
200 |
/* read: */ |
201 |
int avail = d->cur_rx_queue_pos_write != |
202 |
d->cur_rx_queue_pos_read; |
203 |
int ch = 0, lineno = 0; |
204 |
/* debug("[ dc7085 read from RBUF: "); */ |
205 |
if (avail) { |
206 |
ch = d->rx_queue_char[d->cur_rx_queue_pos_read]; |
207 |
lineno = d->rx_queue_lineno[ |
208 |
d->cur_rx_queue_pos_read]; |
209 |
d->cur_rx_queue_pos_read++; |
210 |
if (d->cur_rx_queue_pos_read == MAX_QUEUE_LEN) |
211 |
d->cur_rx_queue_pos_read = 0; |
212 |
/* if (ch >= ' ' && ch < 127) |
213 |
debug("'%c'", ch); |
214 |
else |
215 |
debug("0x%x", ch); |
216 |
debug(" for lineno %i ", lineno); */ |
217 |
} /* else |
218 |
debug("empty "); |
219 |
debug("]\n"); */ |
220 |
odata = (avail? RBUF_DVAL:0) | |
221 |
(lineno << RBUF_LINE_NUM_SHIFT) | ch; |
222 |
|
223 |
d->regs.dc_csr &= ~CSR_RDONE; |
224 |
INTERRUPT_DEASSERT(d->irq); |
225 |
|
226 |
d->just_transmitted_something = 4; |
227 |
} |
228 |
break; |
229 |
case 0x10: /* TCR: */ |
230 |
if (writeflag == MEM_WRITE) { |
231 |
/* fatal("[ dc7085 write to TCR: 0x%04x) ]\n", |
232 |
(int)idata); */ |
233 |
d->regs.dc_tcr = idata; |
234 |
d->regs.dc_csr &= ~CSR_TRDY; |
235 |
INTERRUPT_DEASSERT(d->irq); |
236 |
goto do_return; |
237 |
} else { |
238 |
/* read: */ |
239 |
/* debug("[ dc7085 read from TCR: (tcr = 0x%04x) ]\n", |
240 |
d->regs.dc_tcr); */ |
241 |
odata = d->regs.dc_tcr; |
242 |
} |
243 |
break; |
244 |
case 0x18: /* Modem status (R), transmit data (W) */ |
245 |
if (writeflag == MEM_WRITE) { |
246 |
int line_no = (d->regs.dc_csr >> |
247 |
RBUF_LINE_NUM_SHIFT) & 0x3; |
248 |
idata &= 0xff; |
249 |
|
250 |
lk201_tx_data(&d->lk201, line_no, idata); |
251 |
|
252 |
d->regs.dc_csr &= ~CSR_TRDY; |
253 |
INTERRUPT_DEASSERT(d->irq); |
254 |
|
255 |
d->just_transmitted_something = 4; |
256 |
} else { |
257 |
/* read: */ |
258 |
d->regs.dc_msr_tdr |= MSR_DSR2 | MSR_CD2 | |
259 |
MSR_DSR3 | MSR_CD3; |
260 |
debug("[ dc7085 read from MSR: (msr_tdr = 0x%04x) ]\n", |
261 |
d->regs.dc_msr_tdr); |
262 |
odata = d->regs.dc_msr_tdr; |
263 |
} |
264 |
break; |
265 |
default: |
266 |
if (writeflag==MEM_READ) { |
267 |
debug("[ dc7085 read from 0x%08lx ]\n", |
268 |
(long)relative_addr); |
269 |
} else { |
270 |
debug("[ dc7085 write to 0x%08lx:", |
271 |
(long)relative_addr); |
272 |
for (i=0; i<len; i++) |
273 |
debug(" %02x", data[i]); |
274 |
debug(" ]\n"); |
275 |
} |
276 |
} |
277 |
|
278 |
if (writeflag == MEM_READ) |
279 |
memory_writemax64(cpu, data, len, odata); |
280 |
|
281 |
do_return: |
282 |
dev_dc7085_tick(cpu, extra); |
283 |
|
284 |
return 1; |
285 |
} |
286 |
|
287 |
|
288 |
/* |
289 |
* dev_dc7085_init(): |
290 |
* |
291 |
* Initialize a dc7085 serial controller device. use_fb should be non-zero |
292 |
* if a framebuffer device is used. Channel 0 will then be treated as a |
293 |
* DECstation keyboard, instead of a plain serial console. |
294 |
*/ |
295 |
int dev_dc7085_init(struct machine *machine, struct memory *mem, |
296 |
uint64_t baseaddr, char *irq_path, int use_fb) |
297 |
{ |
298 |
struct dc_data *d; |
299 |
|
300 |
d = malloc(sizeof(struct dc_data)); |
301 |
if (d == NULL) { |
302 |
fprintf(stderr, "out of memory\n"); |
303 |
exit(1); |
304 |
} |
305 |
memset(d, 0, sizeof(struct dc_data)); |
306 |
|
307 |
INTERRUPT_CONNECT(irq_path, d->irq); |
308 |
d->use_fb = use_fb; |
309 |
|
310 |
d->regs.dc_csr = CSR_TRDY | CSR_MSE; |
311 |
d->regs.dc_tcr = 0x00; |
312 |
|
313 |
d->console_handle = console_start_slave(machine, "DC7085", 1); |
314 |
|
315 |
lk201_init(&d->lk201, use_fb, add_to_rx_queue, d->console_handle, d); |
316 |
|
317 |
memory_device_register(mem, "dc7085", baseaddr, DEV_DC7085_LENGTH, |
318 |
dev_dc7085_access, d, DM_DEFAULT, NULL); |
319 |
machine_add_tickfunction(machine, dev_dc7085_tick, d, |
320 |
DC_TICK_SHIFT, 0.0); |
321 |
|
322 |
return d->console_handle; |
323 |
} |
324 |
|