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dpavlin |
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/* |
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* Copyright (C) 2003-2007 Anders Gavare. All rights reserved. |
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dpavlin |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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dpavlin |
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* $Id: dev_dc7085.c,v 1.62 2007/06/15 18:44:19 debug Exp $ |
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dpavlin |
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* |
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dpavlin |
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* COMMENT: DC7085 serial controller, used in some DECstation models |
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dpavlin |
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*/ |
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include "console.h" |
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#include "cpu.h" |
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#include "devices.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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#include "dc7085.h" |
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#define DC_TICK_SHIFT 14 |
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dpavlin |
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#define MAX_QUEUE_LEN 32768 |
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dpavlin |
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struct dc_data { |
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struct dc7085regs regs; |
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int console_handle; |
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/* For slow_serial_interrupts_hack_for_linux: */ |
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int just_transmitted_something; |
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unsigned char rx_queue_char[MAX_QUEUE_LEN]; |
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char rx_queue_lineno[MAX_QUEUE_LEN]; |
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int cur_rx_queue_pos_write; |
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int cur_rx_queue_pos_read; |
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int tx_scanner; |
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dpavlin |
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struct interrupt irq; |
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dpavlin |
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int use_fb; |
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struct lk201_data lk201; |
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}; |
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/* |
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* Add a character to the receive queue. |
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*/ |
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void add_to_rx_queue(void *e, int ch, int line_no) |
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{ |
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struct dc_data *d = (struct dc_data *) e; |
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int entries_in_use = d->cur_rx_queue_pos_write - |
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d->cur_rx_queue_pos_read; |
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dpavlin |
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dpavlin |
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while (entries_in_use < 0) |
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entries_in_use += MAX_QUEUE_LEN; |
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/* Ignore mouse updates, if they come too often: */ |
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if (entries_in_use > MAX_QUEUE_LEN/2 && line_no == DCMOUSE_PORT) |
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return; |
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d->rx_queue_char[d->cur_rx_queue_pos_write] = ch; |
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d->rx_queue_lineno[d->cur_rx_queue_pos_write] = line_no; |
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d->cur_rx_queue_pos_write ++; |
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if (d->cur_rx_queue_pos_write == MAX_QUEUE_LEN) |
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d->cur_rx_queue_pos_write = 0; |
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if (d->cur_rx_queue_pos_write == d->cur_rx_queue_pos_read) |
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fatal("warning: add_to_rx_queue(): rx_queue overrun!\n"); |
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} |
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dpavlin |
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DEVICE_TICK(dc7085) |
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{ |
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/* |
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* If a key is available from the keyboard, add it to the rx queue. |
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* If other bits are set, an interrupt might need to be caused. |
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*/ |
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dpavlin |
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struct dc_data *d = extra; |
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int avail; |
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if (cpu->machine->slow_serial_interrupts_hack_for_linux) { |
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/* |
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* Special hack to prevent Linux from Oopsing. (This makes |
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* interrupts not come as fast as possible.) |
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*/ |
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if (d->just_transmitted_something) { |
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d->just_transmitted_something --; |
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return; |
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} |
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} |
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d->regs.dc_csr &= ~CSR_RDONE; |
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if ((d->regs.dc_csr & CSR_MSE) && !(d->regs.dc_csr & CSR_TRDY)) { |
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int scanner_start = d->tx_scanner; |
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/* Loop until we've checked all 4 channels, or some |
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channel was ready to transmit: */ |
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do { |
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d->tx_scanner = (d->tx_scanner + 1) % 4; |
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if (d->regs.dc_tcr & (1 << d->tx_scanner)) { |
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d->regs.dc_csr |= CSR_TRDY; |
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if (d->regs.dc_csr & CSR_TIE) |
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INTERRUPT_ASSERT(d->irq); |
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d->regs.dc_csr &= ~CSR_TX_LINE_NUM; |
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d->regs.dc_csr |= (d->tx_scanner << 8); |
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} |
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} while (!(d->regs.dc_csr & CSR_TRDY) && |
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d->tx_scanner != scanner_start); |
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/* We have to return here. NetBSD can handle both |
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rx and tx interrupts simultaneously, but Ultrix |
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doesn't like that? */ |
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if (d->regs.dc_csr & CSR_TRDY) |
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return; |
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} |
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dpavlin |
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lk201_tick(cpu->machine, &d->lk201); |
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dpavlin |
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avail = d->cur_rx_queue_pos_write != d->cur_rx_queue_pos_read; |
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if (avail && (d->regs.dc_csr & CSR_MSE)) |
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d->regs.dc_csr |= CSR_RDONE; |
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if ((d->regs.dc_csr & CSR_RDONE) && (d->regs.dc_csr & CSR_RIE)) |
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dpavlin |
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INTERRUPT_ASSERT(d->irq); |
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dpavlin |
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} |
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dpavlin |
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DEVICE_ACCESS(dc7085) |
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dpavlin |
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{ |
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dpavlin |
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struct dc_data *d = extra; |
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dpavlin |
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uint64_t idata = 0, odata = 0; |
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dpavlin |
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size_t i; |
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dpavlin |
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dpavlin |
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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dpavlin |
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/* Always clear: */ |
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d->regs.dc_csr &= ~CSR_CLR; |
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switch (relative_addr) { |
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dpavlin |
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dpavlin |
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case 0x00: /* CSR: Control and Status */ |
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if (writeflag == MEM_WRITE) { |
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debug("[ dc7085 write to CSR: 0x%04x ]\n", idata); |
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idata &= (CSR_TIE | CSR_RIE | CSR_MSE | CSR_CLR |
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| CSR_MAINT); |
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d->regs.dc_csr &= ~(CSR_TIE | CSR_RIE | CSR_MSE |
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| CSR_CLR | CSR_MAINT); |
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d->regs.dc_csr |= idata; |
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if (!(d->regs.dc_csr & CSR_MSE)) |
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d->regs.dc_csr &= ~(CSR_TRDY | CSR_RDONE); |
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goto do_return; |
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} else { |
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/* read: */ |
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/* fatal("[ dc7085 read from CSR: (csr = 0x%04x) ]\n", |
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d->regs.dc_csr); */ |
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odata = d->regs.dc_csr; |
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} |
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break; |
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dpavlin |
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dpavlin |
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case 0x08: /* LPR: */ |
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if (writeflag == MEM_WRITE) { |
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debug("[ dc7085 write to LPR: 0x%04x ]\n", idata); |
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d->regs.dc_rbuf_lpr = idata; |
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goto do_return; |
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} else { |
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/* read: */ |
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int avail = d->cur_rx_queue_pos_write != |
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d->cur_rx_queue_pos_read; |
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int ch = 0, lineno = 0; |
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/* debug("[ dc7085 read from RBUF: "); */ |
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if (avail) { |
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ch = d->rx_queue_char[d->cur_rx_queue_pos_read]; |
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lineno = d->rx_queue_lineno[ |
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d->cur_rx_queue_pos_read]; |
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d->cur_rx_queue_pos_read++; |
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if (d->cur_rx_queue_pos_read == MAX_QUEUE_LEN) |
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d->cur_rx_queue_pos_read = 0; |
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/* if (ch >= ' ' && ch < 127) |
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debug("'%c'", ch); |
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else |
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debug("0x%x", ch); |
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debug(" for lineno %i ", lineno); */ |
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} /* else |
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debug("empty "); |
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debug("]\n"); */ |
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odata = (avail? RBUF_DVAL:0) | |
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(lineno << RBUF_LINE_NUM_SHIFT) | ch; |
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d->regs.dc_csr &= ~CSR_RDONE; |
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dpavlin |
34 |
INTERRUPT_DEASSERT(d->irq); |
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dpavlin |
4 |
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d->just_transmitted_something = 4; |
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} |
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break; |
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dpavlin |
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dpavlin |
4 |
case 0x10: /* TCR: */ |
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if (writeflag == MEM_WRITE) { |
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/* fatal("[ dc7085 write to TCR: 0x%04x) ]\n", |
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(int)idata); */ |
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d->regs.dc_tcr = idata; |
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d->regs.dc_csr &= ~CSR_TRDY; |
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dpavlin |
34 |
INTERRUPT_DEASSERT(d->irq); |
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dpavlin |
4 |
goto do_return; |
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} else { |
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/* read: */ |
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/* debug("[ dc7085 read from TCR: (tcr = 0x%04x) ]\n", |
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d->regs.dc_tcr); */ |
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odata = d->regs.dc_tcr; |
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} |
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break; |
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dpavlin |
42 |
|
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dpavlin |
4 |
case 0x18: /* Modem status (R), transmit data (W) */ |
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if (writeflag == MEM_WRITE) { |
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int line_no = (d->regs.dc_csr >> |
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RBUF_LINE_NUM_SHIFT) & 0x3; |
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idata &= 0xff; |
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lk201_tx_data(&d->lk201, line_no, idata); |
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256 |
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d->regs.dc_csr &= ~CSR_TRDY; |
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dpavlin |
34 |
INTERRUPT_DEASSERT(d->irq); |
258 |
dpavlin |
4 |
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259 |
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d->just_transmitted_something = 4; |
260 |
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} else { |
261 |
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/* read: */ |
262 |
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d->regs.dc_msr_tdr |= MSR_DSR2 | MSR_CD2 | |
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MSR_DSR3 | MSR_CD3; |
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debug("[ dc7085 read from MSR: (msr_tdr = 0x%04x) ]\n", |
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d->regs.dc_msr_tdr); |
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odata = d->regs.dc_msr_tdr; |
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} |
268 |
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break; |
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dpavlin |
42 |
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dpavlin |
4 |
default: |
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if (writeflag==MEM_READ) { |
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debug("[ dc7085 read from 0x%08lx ]\n", |
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(long)relative_addr); |
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} else { |
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debug("[ dc7085 write to 0x%08lx:", |
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(long)relative_addr); |
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for (i=0; i<len; i++) |
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debug(" %02x", data[i]); |
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debug(" ]\n"); |
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} |
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} |
282 |
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283 |
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if (writeflag == MEM_READ) |
284 |
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memory_writemax64(cpu, data, len, odata); |
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286 |
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do_return: |
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dev_dc7085_tick(cpu, extra); |
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289 |
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return 1; |
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} |
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292 |
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293 |
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/* |
294 |
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* dev_dc7085_init(): |
295 |
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* |
296 |
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* Initialize a dc7085 serial controller device. use_fb should be non-zero |
297 |
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* if a framebuffer device is used. Channel 0 will then be treated as a |
298 |
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* DECstation keyboard, instead of a plain serial console. |
299 |
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*/ |
300 |
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int dev_dc7085_init(struct machine *machine, struct memory *mem, |
301 |
dpavlin |
34 |
uint64_t baseaddr, char *irq_path, int use_fb) |
302 |
dpavlin |
4 |
{ |
303 |
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struct dc_data *d; |
304 |
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305 |
dpavlin |
42 |
CHECK_ALLOCATION(d = malloc(sizeof(struct dc_data))); |
306 |
dpavlin |
4 |
memset(d, 0, sizeof(struct dc_data)); |
307 |
dpavlin |
34 |
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308 |
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INTERRUPT_CONNECT(irq_path, d->irq); |
309 |
dpavlin |
4 |
d->use_fb = use_fb; |
310 |
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311 |
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d->regs.dc_csr = CSR_TRDY | CSR_MSE; |
312 |
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d->regs.dc_tcr = 0x00; |
313 |
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314 |
dpavlin |
22 |
d->console_handle = console_start_slave(machine, "DC7085", 1); |
315 |
dpavlin |
4 |
|
316 |
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lk201_init(&d->lk201, use_fb, add_to_rx_queue, d->console_handle, d); |
317 |
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318 |
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memory_device_register(mem, "dc7085", baseaddr, DEV_DC7085_LENGTH, |
319 |
dpavlin |
20 |
dev_dc7085_access, d, DM_DEFAULT, NULL); |
320 |
dpavlin |
24 |
machine_add_tickfunction(machine, dev_dc7085_tick, d, |
321 |
dpavlin |
42 |
DC_TICK_SHIFT); |
322 |
dpavlin |
4 |
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323 |
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return d->console_handle; |
324 |
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} |
325 |
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