/[gxemul]/trunk/src/devices/dev_dc7085.c
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Annotation of /trunk/src/devices/dev_dc7085.c

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Mon Oct 8 16:19:37 2007 UTC (13 years, 3 months ago) by dpavlin
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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 dpavlin 4 /*
2 dpavlin 22 * Copyright (C) 2003-2006 Anders Gavare. All rights reserved.
3 dpavlin 4 *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 22 * $Id: dev_dc7085.c,v 1.54 2006/01/01 13:17:16 debug Exp $
29 dpavlin 4 *
30     * DC7085 serial controller, used in some DECstation models.
31     */
32    
33     #include <stdio.h>
34     #include <stdlib.h>
35     #include <string.h>
36    
37     #include "console.h"
38     #include "cpu.h"
39     #include "devices.h"
40     #include "machine.h"
41     #include "memory.h"
42     #include "misc.h"
43    
44     #include "dc7085.h"
45    
46    
47     #define DC_TICK_SHIFT 14
48    
49     #define MAX_QUEUE_LEN 4096
50    
51     struct dc_data {
52     struct dc7085regs regs;
53    
54     int console_handle;
55    
56     /* For slow_serial_interrupts_hack_for_linux: */
57     int just_transmitted_something;
58    
59     unsigned char rx_queue_char[MAX_QUEUE_LEN];
60     char rx_queue_lineno[MAX_QUEUE_LEN];
61     int cur_rx_queue_pos_write;
62     int cur_rx_queue_pos_read;
63    
64     int tx_scanner;
65    
66     int irqnr;
67     int use_fb;
68    
69     struct lk201_data lk201;
70     };
71    
72    
73     /*
74     * Add a character to the receive queue.
75     */
76     void add_to_rx_queue(void *e, int ch, int line_no)
77     {
78     struct dc_data *d = (struct dc_data *) e;
79     int entries_in_use = d->cur_rx_queue_pos_write -
80     d->cur_rx_queue_pos_read;
81     while (entries_in_use < 0)
82     entries_in_use += MAX_QUEUE_LEN;
83    
84     /* Ignore mouse updates, if they come too often: */
85     if (entries_in_use > MAX_QUEUE_LEN/2 && line_no == DCMOUSE_PORT)
86     return;
87    
88     d->rx_queue_char[d->cur_rx_queue_pos_write] = ch;
89     d->rx_queue_lineno[d->cur_rx_queue_pos_write] = line_no;
90     d->cur_rx_queue_pos_write ++;
91     if (d->cur_rx_queue_pos_write == MAX_QUEUE_LEN)
92     d->cur_rx_queue_pos_write = 0;
93    
94     if (d->cur_rx_queue_pos_write == d->cur_rx_queue_pos_read)
95     fatal("warning: add_to_rx_queue(): rx_queue overrun!\n");
96     }
97    
98    
99     /*
100     * dev_dc7085_tick():
101     *
102     * This function is called "every now and then".
103     * If a key is available from the keyboard, add it to the rx queue.
104     * If other bits are set, an interrupt might need to be caused.
105     */
106     void dev_dc7085_tick(struct cpu *cpu, void *extra)
107     {
108     struct dc_data *d = extra;
109     int avail;
110    
111     if (cpu->machine->slow_serial_interrupts_hack_for_linux) {
112     /*
113     * Special hack to prevent Linux from Oopsing. (This makes
114     * interrupts not come as fast as possible.)
115     */
116     if (d->just_transmitted_something) {
117     d->just_transmitted_something --;
118     return;
119     }
120     }
121    
122     d->regs.dc_csr &= ~CSR_RDONE;
123    
124     if ((d->regs.dc_csr & CSR_MSE) && !(d->regs.dc_csr & CSR_TRDY)) {
125     int scanner_start = d->tx_scanner;
126    
127     /* Loop until we've checked all 4 channels, or some
128     channel was ready to transmit: */
129    
130     do {
131     d->tx_scanner = (d->tx_scanner + 1) % 4;
132    
133     if (d->regs.dc_tcr & (1 << d->tx_scanner)) {
134     d->regs.dc_csr |= CSR_TRDY;
135     if (d->regs.dc_csr & CSR_TIE)
136     cpu_interrupt(cpu, d->irqnr);
137    
138     d->regs.dc_csr &= ~CSR_TX_LINE_NUM;
139     d->regs.dc_csr |= (d->tx_scanner << 8);
140     }
141     } while (!(d->regs.dc_csr & CSR_TRDY) &&
142     d->tx_scanner != scanner_start);
143    
144     /* We have to return here. NetBSD can handle both
145     rx and tx interrupts simultaneously, but Ultrix
146     doesn't like that? */
147    
148     if (d->regs.dc_csr & CSR_TRDY)
149     return;
150     }
151    
152     lk201_tick(&d->lk201);
153    
154     avail = d->cur_rx_queue_pos_write != d->cur_rx_queue_pos_read;
155    
156     if (avail && (d->regs.dc_csr & CSR_MSE))
157     d->regs.dc_csr |= CSR_RDONE;
158    
159     if ((d->regs.dc_csr & CSR_RDONE) && (d->regs.dc_csr & CSR_RIE))
160     cpu_interrupt(cpu, d->irqnr);
161     }
162    
163    
164     /*
165     * dev_dc7085_access():
166     */
167 dpavlin 22 DEVICE_ACCESS(dc7085)
168 dpavlin 4 {
169     uint64_t idata = 0, odata = 0;
170 dpavlin 22 size_t i;
171 dpavlin 4 struct dc_data *d = extra;
172    
173 dpavlin 18 if (writeflag == MEM_WRITE)
174     idata = memory_readmax64(cpu, data, len);
175 dpavlin 4
176     /* Always clear: */
177     d->regs.dc_csr &= ~CSR_CLR;
178    
179     switch (relative_addr) {
180     case 0x00: /* CSR: Control and Status */
181     if (writeflag == MEM_WRITE) {
182     debug("[ dc7085 write to CSR: 0x%04x ]\n", idata);
183     idata &= (CSR_TIE | CSR_RIE | CSR_MSE | CSR_CLR
184     | CSR_MAINT);
185     d->regs.dc_csr &= ~(CSR_TIE | CSR_RIE | CSR_MSE
186     | CSR_CLR | CSR_MAINT);
187     d->regs.dc_csr |= idata;
188     if (!(d->regs.dc_csr & CSR_MSE))
189     d->regs.dc_csr &= ~(CSR_TRDY | CSR_RDONE);
190     goto do_return;
191     } else {
192     /* read: */
193    
194     /* fatal("[ dc7085 read from CSR: (csr = 0x%04x) ]\n",
195     d->regs.dc_csr); */
196     odata = d->regs.dc_csr;
197     }
198     break;
199     case 0x08: /* LPR: */
200     if (writeflag == MEM_WRITE) {
201     debug("[ dc7085 write to LPR: 0x%04x ]\n", idata);
202     d->regs.dc_rbuf_lpr = idata;
203     goto do_return;
204     } else {
205     /* read: */
206     int avail = d->cur_rx_queue_pos_write !=
207     d->cur_rx_queue_pos_read;
208     int ch = 0, lineno = 0;
209     /* debug("[ dc7085 read from RBUF: "); */
210     if (avail) {
211     ch = d->rx_queue_char[d->cur_rx_queue_pos_read];
212     lineno = d->rx_queue_lineno[
213     d->cur_rx_queue_pos_read];
214     d->cur_rx_queue_pos_read++;
215     if (d->cur_rx_queue_pos_read == MAX_QUEUE_LEN)
216     d->cur_rx_queue_pos_read = 0;
217     /* if (ch >= ' ' && ch < 127)
218     debug("'%c'", ch);
219     else
220     debug("0x%x", ch);
221     debug(" for lineno %i ", lineno); */
222     } /* else
223     debug("empty ");
224     debug("]\n"); */
225     odata = (avail? RBUF_DVAL:0) |
226     (lineno << RBUF_LINE_NUM_SHIFT) | ch;
227    
228     d->regs.dc_csr &= ~CSR_RDONE;
229     cpu_interrupt_ack(cpu, d->irqnr);
230    
231     d->just_transmitted_something = 4;
232     }
233     break;
234     case 0x10: /* TCR: */
235     if (writeflag == MEM_WRITE) {
236     /* fatal("[ dc7085 write to TCR: 0x%04x) ]\n",
237     (int)idata); */
238     d->regs.dc_tcr = idata;
239     d->regs.dc_csr &= ~CSR_TRDY;
240     cpu_interrupt_ack(cpu, d->irqnr);
241     goto do_return;
242     } else {
243     /* read: */
244     /* debug("[ dc7085 read from TCR: (tcr = 0x%04x) ]\n",
245     d->regs.dc_tcr); */
246     odata = d->regs.dc_tcr;
247     }
248     break;
249     case 0x18: /* Modem status (R), transmit data (W) */
250     if (writeflag == MEM_WRITE) {
251     int line_no = (d->regs.dc_csr >>
252     RBUF_LINE_NUM_SHIFT) & 0x3;
253     idata &= 0xff;
254    
255     lk201_tx_data(&d->lk201, line_no, idata);
256    
257     d->regs.dc_csr &= ~CSR_TRDY;
258     cpu_interrupt_ack(cpu, d->irqnr);
259    
260     d->just_transmitted_something = 4;
261     } else {
262     /* read: */
263     d->regs.dc_msr_tdr |= MSR_DSR2 | MSR_CD2 |
264     MSR_DSR3 | MSR_CD3;
265     debug("[ dc7085 read from MSR: (msr_tdr = 0x%04x) ]\n",
266     d->regs.dc_msr_tdr);
267     odata = d->regs.dc_msr_tdr;
268     }
269     break;
270     default:
271     if (writeflag==MEM_READ) {
272     debug("[ dc7085 read from 0x%08lx ]\n",
273     (long)relative_addr);
274     } else {
275     debug("[ dc7085 write to 0x%08lx:",
276     (long)relative_addr);
277     for (i=0; i<len; i++)
278     debug(" %02x", data[i]);
279     debug(" ]\n");
280     }
281     }
282    
283     if (writeflag == MEM_READ)
284     memory_writemax64(cpu, data, len, odata);
285    
286     do_return:
287     dev_dc7085_tick(cpu, extra);
288    
289     return 1;
290     }
291    
292    
293     /*
294     * dev_dc7085_init():
295     *
296     * Initialize a dc7085 serial controller device. use_fb should be non-zero
297     * if a framebuffer device is used. Channel 0 will then be treated as a
298     * DECstation keyboard, instead of a plain serial console.
299     */
300     int dev_dc7085_init(struct machine *machine, struct memory *mem,
301     uint64_t baseaddr, int irq_nr, int use_fb)
302     {
303     struct dc_data *d;
304    
305     d = malloc(sizeof(struct dc_data));
306     if (d == NULL) {
307     fprintf(stderr, "out of memory\n");
308     exit(1);
309     }
310     memset(d, 0, sizeof(struct dc_data));
311     d->irqnr = irq_nr;
312     d->use_fb = use_fb;
313    
314     d->regs.dc_csr = CSR_TRDY | CSR_MSE;
315     d->regs.dc_tcr = 0x00;
316    
317 dpavlin 22 d->console_handle = console_start_slave(machine, "DC7085", 1);
318 dpavlin 4
319     lk201_init(&d->lk201, use_fb, add_to_rx_queue, d->console_handle, d);
320    
321     memory_device_register(mem, "dc7085", baseaddr, DEV_DC7085_LENGTH,
322 dpavlin 20 dev_dc7085_access, d, DM_DEFAULT, NULL);
323 dpavlin 4 machine_add_tickfunction(machine, dev_dc7085_tick, d, DC_TICK_SHIFT);
324    
325     return d->console_handle;
326     }
327    

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