/[gxemul]/trunk/src/devices/dev_bt455.c
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Annotation of /trunk/src/devices/dev_bt455.c

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Revision 4 - (hide annotations)
Mon Oct 8 16:18:00 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 5592 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.707 2005/04/27 16:37:33 debug Exp $
20050408	Some minor updates to the wdc. Linux now doesn't complain
		anymore if a disk is non-present.
20050409	Various minor fixes (a bintrans bug, and some other things).
		The wdc seems to work with Playstation2 emulation, but there
		is a _long_ annoying delay when disks are detected.
		Fixing a really important bintrans bug (when devices and RAM
		are mixed within 4KB pages), which was triggered with
		NetBSD/playstation2 kernels.
20050410	Adding a dummy dev_ps2_ether (just so that NetBSD doesn't
		complain as much during bootup).
		Symbols starting with '$' are now ignored.
		Renaming dev_ps2_ohci.c to dev_ohci.c, etc.
20050411	Moving the bintrans-cache-isolation check from cpu_mips.c to
		cpu_mips_coproc.c. (I thought this would give a speedup, but
		it's not noticable.)
		Better playstation2 sbus interrupt code.
		Skip ahead many ticks if the count register is read manually.
		(This increases the speed of delay-loops that simply read
		the count register.)
20050412	Updates to the playstation2 timer/interrupt code.
		Some other minor updates.
20050413	NetBSD/cobalt runs from a disk image :-) including userland;
		updating the documentation on how to install NetBSD/cobalt
		using NetBSD/pmax (!).
		Some minor bintrans updates (no real speed improvement) and
		other minor updates (playstation2 now uses the -o options).
20050414	Adding a dummy x86 (and AMD64) mode.
20050415	Adding some (32-bit and 16-bit) x86 instructions.
		Adding some initial support for non-SCSI, non-IDE floppy
		images. (The x86 mode can boot from these, more or less.)
		Moving the devices/ and include/ directories to src/devices/
		and src/include/, respectively.
20050416	Continuing on the x86 stuff. (Adding pc_bios.c and some simple
		support for software interrupts in 16-bit mode.)
20050417	Ripping out most of the x86 instruction decoding stuff, trying
		to rewrite it in a cleaner way.
		Disabling some of the least working CPU families in the
		configure script (sparc, x86, alpha, hppa), so that they are
		not enabled by default.
20050418	Trying to fix the bug which caused problems when turning on
		and off bintrans interactively, by flushing the bintrans cache
		whenever bintrans is manually (re)enabled.
20050419	Adding the 'lswi' ppc instruction.
		Minor updates to the x86 instruction decoding.
20050420	Renaming x86 register name indices from R_xx to X86_R_xx (this
		makes building on Tru64 nicer).
20050422	Adding a check for duplicate MIPS TLB entries on tlbwr/tlbwi.
20050427	Adding screenshots to guestoses.html.
		Some minor fixes and testing for the next release.

==============  RELEASE 0.3.2  ==============
1 dpavlin 4 /*
2     * Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28     * $Id: dev_bt455.c,v 1.7 2005/02/22 12:15:29 debug Exp $
29     *
30     * Brooktree 455, used by TURBOchannel graphics cards.
31     *
32     * TODO: This is hardcoded to only use 16 grayscales, using only the
33     * green component of the palette. Perhaps some other graphics card uses
34     * the BT455 as well; if so then this device must be re-hacked.
35     */
36    
37     #include <stdio.h>
38     #include <stdlib.h>
39     #include <string.h>
40    
41     #include "devices.h"
42     #include "memory.h"
43     #include "misc.h"
44    
45    
46    
47     struct bt455_data {
48     unsigned char addr_cmap;
49     unsigned char addr_cmap_data;
50     unsigned char addr_clr;
51     unsigned char addr_ovly;
52    
53     int cur_rgb_offset;
54    
55     struct vfb_data *vfb_data;
56     unsigned char *rgb_palette; /* ptr to 256 * 3 (r,g,b) */
57     };
58    
59    
60     /*
61     * dev_bt455_access():
62     */
63     int dev_bt455_access(struct cpu *cpu, struct memory *mem,
64     uint64_t relative_addr, unsigned char *data, size_t len,
65     int writeflag, void *extra)
66     {
67     struct bt455_data *d = (struct bt455_data *) extra;
68     uint64_t idata = 0, odata = 0;
69     int i, modified;
70    
71     idata = memory_readmax64(cpu, data, len);
72    
73     /* Read from/write to the bt455: */
74     switch (relative_addr) {
75     case 0x00: /* addr_cmap */
76     if (writeflag == MEM_WRITE) {
77     debug("[ bt455: write to addr_cmap, 0x%02x ]\n", idata);
78     d->addr_cmap = idata;
79     d->cur_rgb_offset = (d->addr_cmap & 0xf) * 3;
80     } else {
81     odata = d->addr_cmap;
82     debug("[ bt455: read from addr_cmap: 0x%0x ]\n", odata);
83     }
84     break;
85     case 0x04: /* addr_cmap_data */
86     if (writeflag == MEM_WRITE) {
87     debug("[ bt455: write to addr_cmap_data, 0x%02x ]\n",
88     (int)idata);
89     d->addr_cmap_data = idata;
90    
91     modified = 0;
92    
93     /* Only write on updates to the Green value: */
94     if ((d->cur_rgb_offset % 3) == 1) {
95     /* Update 16 copies: */
96     for (i=0; i<16; i++) {
97     int addr = (d->cur_rgb_offset + 16*i)
98     % 0x300;
99     int newvalue = idata * 0x11;
100    
101     if (d->rgb_palette[(addr / 3) * 3 + 0]
102     != newvalue ||
103     d->rgb_palette[(addr / 3) * 3 + 1]
104     != newvalue ||
105     d->rgb_palette[(addr / 3) * 3 + 2]
106     != newvalue)
107     modified = 1;
108    
109     d->rgb_palette[(addr / 3) * 3 + 0] =
110     d->rgb_palette[(addr / 3) * 3 + 1] =
111     d->rgb_palette[(addr / 3) * 3 + 2] =
112     newvalue;
113     }
114     }
115    
116     if (modified) {
117     d->vfb_data->update_x1 = 0;
118     d->vfb_data->update_x2 = d->vfb_data->xsize - 1;
119     d->vfb_data->update_y1 = 0;
120     d->vfb_data->update_y2 = d->vfb_data->ysize - 1;
121     }
122    
123     /* Advance to next palette byte: */
124     d->cur_rgb_offset ++;
125     } else {
126     odata = d->addr_cmap_data;
127     debug("[ bt455: read from addr_cmap_data: 0x%0x ]\n",
128     (int)odata);
129     }
130     break;
131     case 0x08: /* addr_clr */
132     if (writeflag == MEM_WRITE) {
133     debug("[ bt455: write to addr_clr, value 0x%02x ]\n",
134     (int)idata);
135     d->addr_clr = idata;
136     } else {
137     odata = d->addr_clr;
138     debug("[ bt455: read from addr_clr: value 0x%02x ]\n",
139     (int)odata);
140     }
141     break;
142     case 0x0c: /* addr_ovly */
143     if (writeflag == MEM_WRITE) {
144     debug("[ bt455: write to addr_ovly, value 0x%02x ]\n",
145     (int)idata);
146     d->addr_ovly = idata;
147     } else {
148     odata = d->addr_ovly;
149     debug("[ bt455: read from addr_ovly: value 0x%02x ]\n",
150     (int)odata);
151     }
152     break;
153     default:
154     if (writeflag == MEM_WRITE) {
155     debug("[ bt455: unimplemented write to address 0x%x,"
156     " data=0x%02x ]\n", (int)relative_addr, (int)idata);
157     } else {
158     debug("[ bt455: unimplemented read from address "
159     "0x%x ]\n", (int)relative_addr);
160     }
161     }
162    
163     if (writeflag == MEM_READ)
164     memory_writemax64(cpu, data, len, odata);
165    
166     return 1;
167     }
168    
169    
170     /*
171     * dev_bt455_init():
172     */
173     void dev_bt455_init(struct memory *mem, uint64_t baseaddr,
174     struct vfb_data *vfb_data)
175     {
176     struct bt455_data *d = malloc(sizeof(struct bt455_data));
177     if (d == NULL) {
178     fprintf(stderr, "out of memory\n");
179     exit(1);
180     }
181     memset(d, 0, sizeof(struct bt455_data));
182     d->vfb_data = vfb_data;
183     d->rgb_palette = vfb_data->rgb_palette;
184    
185     memory_device_register(mem, "bt455", baseaddr, DEV_BT455_LENGTH,
186     dev_bt455_access, (void *)d, MEM_DEFAULT, NULL);
187     }
188    
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