/[gxemul]/trunk/src/devices/dev_ahc.c
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Annotation of /trunk/src/devices/dev_ahc.c

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Revision 20 - (hide annotations)
Mon Oct 8 16:19:23 2007 UTC (13 years, 3 months ago) by dpavlin
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++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1055 2005/11/25 22:48:36 debug Exp $
20051031	Adding disassembly support for more ARM instructions (clz,
		smul* etc), and adding a hack to support "new tiny" pages
		for StrongARM.
20051101	Minor documentation updates (NetBSD 2.0.2 -> 2.1, and OpenBSD
		3.7 -> 3.8, and lots of testing).
		Changing from 1-sector PIO mode 0 transfers to 128-sector PIO
		mode 3 (in dev_wdc).
		Various minor ARM dyntrans updates (pc-relative loads from
		within the same page as the instruction are now treated as
		constant "mov").
20051102	Re-enabling instruction combinations (they were accidentally
		disabled).
		Dyntrans TLB entries are now overwritten using a round-robin
		scheme instead of randomly. This increases performance.
		Fixing a typo in file.c (thanks to Chuan-Hua Chang for
		noticing it).
		Experimenting with adding ATAPI support to dev_wdc (to make
		emulated *BSD detect cdroms as cdroms, not harddisks).
20051104	Various minor updates.
20051105	Continuing on the ATAPI emulation. Seems to work well enough
		for a NetBSD/cats installation, but not OpenBSD/cats.
		Various other updates.
20051106	Modifying the -Y command line option to allow scaleup with
		certain graphic controllers (only dev_vga so far), not just
		scaledown.
		Some minor dyntrans cleanups.
20051107	Beginning a cleanup up the PCI subsystem (removing the
		read_register hack, etc).
20051108	Continuing the cleanup; splitting up some pci devices into a
		normal autodev device and some separate pci glue code.
20051109	Continuing on the PCI bus stuff; all old pci_*.c have been
		incorporated into normal devices and/or rewritten as glue code
		only, adding a dummy Intel 82371AB PIIX4 for Malta (not really
		tested yet).
		Minor pckbc fix so that Linux doesn't complain.
		Working on the DEC 21143 NIC (ethernet mac rom stuff mostly).
		Various other minor fixes.
20051110	Some more ARM dyntrans fine-tuning (e.g. some instruction
		combinations (cmps followed by conditional branch within the
		same page) and special cases for DPIs with regform when the
		shifter isn't used).
20051111	ARM dyntrans updates: O(n)->O(1) for just-mark-as-non-
		writable in the generic pc_to_pointers function, and some other
		minor hacks.
		Merging Cobalt and evbmips (Malta) ISA interrupt handling,
		and some minor fixes to allow Linux to accept harddisk irqs.
20051112	Minor device updates (pckbc, dec21143, lpt, ...), most
		importantly fixing the ALI M1543/M5229 so that harddisk irqs
		work with Linux/CATS.
20051113	Some more generalizations of the PCI subsystem.
		Finally took the time to add a hack for SCSI CDROM TOCs; this
		enables OpenBSD to use partition 'a' (as needed by the OpenBSD
		installer), and Windows NT's installer to get a bit further.
		Also fixing dev_wdc to allow Linux to detect ATAPI CDROMs.
		Continuing on the DEC 21143.
20051114	Minor ARM dyntrans tweaks; ARM cmps+branch optimization when
		comparing with 0, and generalizing the xchg instr. comb.
		Adding disassembly of ARM mrrc/mcrr and q{,d}{add,sub}.
20051115	Continuing on various PPC things (BATs, other address trans-
		lation things, various loads/stores, BeBox emulation, etc.).
		Beginning to work on PPC interrupt/exception support.
20051116	Factoring out some code which initializes legacy ISA devices
		from those machines that use them (bus_isa).
		Continuing on PPC interrupt/exception support.
20051117	Minor Malta fixes: RTC year offset = 80, disabling a speed hack
		which caused NetBSD to detect a too fast cpu, and adding a new
		hack to make Linux detect a faster cpu.
		Continuing on the Artesyn PM/PPC emulation mode.
		Adding an Algor emulation skeleton (P4032 and P5064);
		implementing some of the basics.
		Continuing on PPC emulation in general; usage of unimplemented
		SPRs is now easier to track, continuing on memory/exception
		related issues, etc.
20051118	More work on PPC emulation (tgpr0..3, exception handling,
		memory stuff, syscalls, etc.).
20051119	Changing the ARM dyntrans code to mostly use cpu->pc, and not
		necessarily use arm reg 15. Seems to work.
		Various PPC updates; continuing on the PReP emulation mode.
20051120	Adding a workaround/hack to dev_mc146818 to allow NetBSD/prep
		to detect the clock.
20051121	More cleanup of the PCI bus (memory and I/O bases, etc).
		Continuing on various PPC things (decrementer and timebase,
		WDCs on obio (on PReP) use irq 13, not 14/15).
20051122	Continuing on the CPC700 controller (interrupts etc) for PMPPC,
		and on PPC stuff in general.
		Finally! After some bug fixes to the virtual to physical addr
		translation, NetBSD/{prep,pmppc} 2.1 reach userland and are
		stable enough to be interacted with.
		More PCI updates; reverse-endian device access for PowerPC etc.
20051123	Generalizing the IEEE floating point subsystem (moving it out
		from src/cpus/cpu_mips_coproc.c into a new src/float_emul.c).
		Input via slave xterms was sometimes not really working; fixing
		this for ns16550, and a warning message is now displayed if
		multiple non-xterm consoles are active.
		Adding some PPC floating point support, etc.
		Various interrupt related updates (dev_wdc, _ns16550, _8259,
		and the isa32 common code in machine.c).
		NetBSD/prep can now be installed! :-) (Well, with some manual
		commands necessary before running sysinst.) Updating the
		documentation and various other things to reflect this.
20051124	Various minor documentation updates.
		Continuing the work on the DEC 21143 NIC.
20051125	LOTS of work on the 21143. Both OpenBSD and NetBSD work fine
		with it now, except that OpenBSD sometimes gives a time-out
		warning.
		Minor documentation updates.

==============  RELEASE 0.3.7  ==============


1 dpavlin 20 /*
2     * Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28     * $Id: dev_ahc.c,v 1.2 2005/11/13 00:14:08 debug Exp $
29     *
30     * Adaptec AHC SCSI controller.
31     *
32     * NetBSD should say something like this, on SGI-IP32:
33     * ahc0 at pci0 dev 1 function 0
34     * ahc0: interrupting at crime irq 0
35     * ahc0: aic7880 Wide Channel A, SCSI Id=7, 16/255 SCBs
36     * ahc0: Host Adapter Bios disabled. Using default SCSI device parameters
37     *
38     * TODO: This more or less just a dummy device, so far.
39     */
40    
41     #include <stdio.h>
42     #include <stdlib.h>
43     #include <string.h>
44    
45     #include "cpu.h"
46     #include "device.h"
47     #include "machine.h"
48     #include "memory.h"
49     #include "misc.h"
50    
51     #include "aic7xxx_reg.h"
52    
53    
54     /* #define AHC_DEBUG
55     #define debug fatal */
56    
57    
58     #define DEV_AHC_LENGTH 0x100
59    
60     struct ahc_data {
61     unsigned char reg[DEV_AHC_LENGTH];
62     };
63    
64    
65     /*
66     * dev_ahc_access():
67     */
68     int dev_ahc_access(struct cpu *cpu, struct memory *mem,
69     uint64_t relative_addr, unsigned char *data, size_t len,
70     int writeflag, void *extra)
71     {
72     struct ahc_data *d = extra;
73     uint64_t idata, odata = 0;
74     int ok = 0;
75     char *name = NULL;
76    
77     idata = memory_readmax64(cpu, data, len);
78    
79     /* YUCK! SGI uses reversed order inside 32-bit words: */
80     if (cpu->byte_order == EMUL_BIG_ENDIAN)
81     relative_addr = (relative_addr & ~0x3)
82     | (3 - (relative_addr & 3));
83    
84     relative_addr %= DEV_AHC_LENGTH;
85    
86     if (len != 1)
87     fatal("[ ahc: ERROR! Unimplemented len %i ]\n", len);
88    
89     if (writeflag == MEM_READ)
90     odata = d->reg[relative_addr];
91    
92     switch (relative_addr) {
93    
94     case SCSIID:
95     if (writeflag == MEM_READ) {
96     ok = 1; name = "SCSIID";
97     odata = 0;
98     } else {
99     fatal("[ ahc: write to SCSIOFFSET, data = 0x"
100     "%02x: TODO ]\n", (int)idata);
101     }
102     break;
103    
104     case KERNEL_QINPOS:
105     if (writeflag == MEM_WRITE) {
106    
107     /* TODO */
108    
109     d->reg[INTSTAT] |= SEQINT;
110     }
111     break;
112    
113     case SEECTL:
114     ok = 1; name = "SEECTL";
115     if (writeflag == MEM_WRITE)
116     d->reg[relative_addr] = idata;
117     odata |= SEERDY;
118     break;
119    
120     case SCSICONF:
121     ok = 1; name = "SCSICONF";
122     if (writeflag == MEM_READ) {
123     odata = 0;
124     } else {
125     fatal("[ ahc: write to SCSICONF, data = 0x%02x:"
126     " TODO ]\n", (int)idata);
127     }
128     break;
129    
130     case SEQRAM:
131     case SEQADDR0:
132     case SEQADDR1:
133     /* TODO: This is just a dummy. */
134     break;
135    
136     case HCNTRL:
137     ok = 1; name = "HCNTRL";
138     if (writeflag == MEM_WRITE)
139     d->reg[relative_addr] = idata;
140     break;
141    
142     case INTSTAT:
143     ok = 1; name = "INTSTAT";
144     if (writeflag == MEM_WRITE)
145     fatal("[ ahc: write to INTSTAT? data = 0x%02x ]\n",
146     (int)idata);
147     break;
148    
149     case CLRINT:
150     if (writeflag == MEM_READ) {
151     ok = 1; name = "ERROR";
152     /* TODO */
153     } else {
154     ok = 1; name = "CLRINT";
155     if (idata & ~0xf)
156     fatal("[ ahc: write to CLRINT: 0x%02x "
157     "(TODO) ]\n", (int)idata);
158     /* Clear the lowest 4 bits of intstat: */
159     d->reg[INTSTAT] &= ~(idata & 0xf);
160     }
161     break;
162    
163     default:
164     if (writeflag == MEM_WRITE)
165     fatal("[ ahc: UNIMPLEMENTED write to address 0x%x, "
166     "data=0x%02x ]\n", (int)relative_addr, (int)idata);
167     else
168     fatal("[ ahc: UNIMPLEMENTED read from address 0x%x ]\n",
169     (int)relative_addr);
170     }
171    
172     #if 0
173     cpu_interrupt(cpu, 0x200);
174     #endif
175    
176     #ifdef AHC_DEBUG
177     if (ok) {
178     if (name == NULL) {
179     if (writeflag == MEM_WRITE)
180     debug("[ ahc: write to address 0x%x: 0x"
181     "%02x ]\n", (int)relative_addr, (int)idata);
182     else
183     debug("[ ahc: read from address 0x%x: 0x"
184     "%02x ]\n", (int)relative_addr, (int)odata);
185     } else {
186     if (writeflag == MEM_WRITE)
187     debug("[ ahc: write to %s: 0x%02x ]\n",
188     name, (int)idata);
189     else
190     debug("[ ahc: read from %s: 0x%02x ]\n",
191     name, (int)odata);
192     }
193     }
194     #endif
195    
196     if (writeflag == MEM_READ)
197     memory_writemax64(cpu, data, len, odata);
198    
199     return 1;
200     }
201    
202    
203     /*
204     * devinit_ahc():
205     */
206     int devinit_ahc(struct devinit *devinit)
207     {
208     struct ahc_data *d = malloc(sizeof(struct ahc_data));
209     if (d == NULL) {
210     fprintf(stderr, "out of memory\n");
211     exit(1);
212     }
213     memset(d, 0, sizeof(struct ahc_data));
214    
215     memory_device_register(devinit->machine->memory, devinit->name,
216     devinit->addr, DEV_AHC_LENGTH, dev_ahc_access, d,
217     DM_DEFAULT, NULL);
218    
219     return 1;
220     }
221    

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