/[gxemul]/trunk/src/devices/dev_adb.c
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Contents of /trunk/src/devices/dev_adb.c

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Revision 28 - (show annotations)
Mon Oct 8 16:20:26 2007 UTC (13 years, 1 month ago) by dpavlin
File MIME type: text/plain
File size: 11426 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626	Continuing on SPARC emulation (beginning on the 'save'
		instruction, register windows, etc).
20060629	Planning statistics gathering (new -s command line option),
		and renaming speed_tricks to allow_instruction_combinations.
20060630	Some minor manual page updates.
		Various cleanups.
		Implementing the -s command line option.
20060701	FINALLY found the bug which prevented Linux and Ultrix from
		running without the ugly hack in the R2000/R3000 cache isol
		code; it was the phystranslation hint array which was buggy.
		Removing the phystranslation hint code completely, for now.
20060702	Minor dyntrans cleanups; invalidation of physpages now only
		invalidate those parts of a page that have actually been
		translated. (32 parts per page.)
		Some MIPS non-R3000 speed fixes.
		Experimenting with MIPS instruction combination for some
		addiu+bne+sw loops, and sw+sw+sw.
		Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
		Continuing on SPARC emulation: adding load/store instructions.
20060704	Fixing a virtual vs physical page shift bug in the new tlbw*
		implementation. Problem noticed by Jakub Jermar. (Many thanks.)
		Moving rfe and eret to cpu_mips_instr.c, since that is the
		only place that uses them nowadays.
20060705	Removing the BSD license from the "testmachine" include files,
		placing them in the public domain instead; this enables the
		testmachine stuff to be used from projects which are
		incompatible with the BSD license for some reason.
20060707	Adding instruction combinations for the R2000/R3000 L1
		I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
		various branches followed by addiu or nop, and jr ra followed
		by addiu. The time it takes to perform a full NetBSD/pmax R3000
		install on the laptop has dropped from 573 seconds to 539. :-)
20060708	Adding a framebuffer controller device (dev_fbctrl), which so
		far can be used to change the fb resolution during runtime, but
		in the future will also be useful for accelerated block fill/
		copy, and possibly also simplified character output.
		Adding an instruction combination for NetBSD/pmax' strlen.
20060709	Minor fixes: reading raw files in src/file.c wasn't memblock
		aligned, removing buggy multi_sw MIPS instruction combination,
		etc.
20060711	Adding a machine_qemu.c, which contains a "qemu_mips" machine.
		(It mimics QEMU's MIPS machine mode, so that a test kernel
		made for QEMU_MIPS also can run in GXemul... at least to some
		extent.)  Adding a short section about how to run this mode to
		doc/guestoses.html.
20060714	Misc. minor code cleanups.
20060715	Applying a patch which adds getchar() to promemul/yamon.c
		(from Oleksandr Tymoshenko).
		Adding yamon.h from NetBSD, and rewriting yamon.c to use it
		(instead of ugly hardcoded numbers) + some cleanup.
20060716	Found and fixed the bug which broke single-stepping of 64-bit
		programs between 0.4.0 and 0.4.0.1 (caused by too quick
		refactoring and no testing). Hopefully this fix will not
		break too many other things.
20060718	Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
		Re-adding the sw+sw+sw instr comb (the problem was that I had
		ignored endian issues); however, it doesn't seem to give any
		big performance gain.
20060720	Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
		the 'j' and 'ldc' instructions are implemented so far). :-}
20060721	Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
		misc. other updates to get Linux 2.6 for evbmips/malta working
		(thanks to Alec Voropay for the details).
		FINALLY found and fixed the bug which made tlbw* for non-R3000
		buggy; it was a reference count problem in the dyntrans core.
20060722	Testing stuff; things seem stable enough for a new release.

==============  RELEASE 0.4.1  ==============


1 /*
2 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_adb.c,v 1.10 2006/07/21 16:55:41 debug Exp $
29 *
30 * ADB (Apple Desktop Bus) controller.
31 *
32 * Based on intuition from reverse-engineering NetBSD/macppc source code,
33 * so it probably only works with that OS.
34 *
35 * The comment "OK" means that 100% of the functionality used by NetBSD/macppc
36 * is covered.
37 *
38 * TODO:
39 * o) Clean up, don't hardcode values.
40 * o) Convert into a separate controller, bus, device architecture.
41 */
42
43 #include <stdio.h>
44 #include <stdlib.h>
45 #include <string.h>
46 #include <sys/time.h>
47
48 #include "console.h"
49 #include "cpu.h"
50 #include "device.h"
51 #include "machine.h"
52 #include "memory.h"
53 #include "misc.h"
54
55 #include "adb_viareg.h"
56
57
58 #define debug fatal
59 /* #define ADB_DEBUG */
60
61
62 #define TICK_SHIFT 17
63 #define DEV_ADB_LENGTH 0x2000
64
65 #define N_VIA_REGS 0x10
66 #define VIA_REG_SHIFT 9
67
68 #define MAX_BUF 100
69
70
71 static char *via_regname[N_VIA_REGS] = {
72 "vBufB", "vBufA", "vDirB", "vDirA",
73 "vT1C", "vT1CH", "vT1L", "vT1LH",
74 "vT2C", "vT2CH", "vSR", "vACR",
75 "vPCR", "vIFR", "vIER", "(unknown)" };
76
77 struct adb_data {
78 int irq_nr;
79 int int_asserted;
80
81 int kbd_dev;
82
83 long long transfer_nr;
84
85 uint8_t reg[N_VIA_REGS];
86
87 int cur_output_offset;
88 uint8_t output_buf[MAX_BUF];
89
90 int cur_input_offset;
91 int cur_input_length;
92 uint8_t input_buf[MAX_BUF];
93
94 int dir;
95 int int_enable;
96 int ack; /* last ack state */
97 int tip; /* transfer in progress */
98 };
99
100 #define DIR_INPUT 0
101 #define DIR_OUTPUT 1
102
103 #define BUFB_nINTR 0x08
104 #define BUFB_ACK 0x10
105 #define BUFB_nTIP 0x20
106 #define IFR_SR 0x04
107 #define IFR_ANY 0x80
108 #define ACR_SR_OUT 0x10
109
110
111
112 DEVICE_TICK(adb)
113 {
114 struct adb_data *d = extra;
115 int a;
116
117 a = d->reg[vIFR >> VIA_REG_SHIFT] & IFR_ANY;
118 if (a == IFR_ANY && d->int_enable)
119 a = 1;
120
121 if (a)
122 cpu_interrupt(cpu, d->irq_nr);
123 else if (d->int_asserted)
124 cpu_interrupt_ack(cpu, d->irq_nr);
125
126 d->int_asserted = a;
127 }
128
129
130 /*
131 * adb_reset():
132 *
133 * Reset registers to default values.
134 */
135 static void adb_reset(struct adb_data *d)
136 {
137 d->kbd_dev = 2;
138
139 memset(d->reg, 0, sizeof(d->reg));
140 d->reg[vBufB >> VIA_REG_SHIFT] = BUFB_nINTR | BUFB_nTIP;
141
142 d->cur_output_offset = 0;
143 memset(d->output_buf, 0, sizeof(d->output_buf));
144
145 d->dir = 0;
146 d->int_enable = 0;
147 d->ack = 0;
148 d->tip = 0;
149 }
150
151
152 /*
153 * adb_process_cmd():
154 *
155 * This function should be called whenever a complete ADB command has been
156 * received.
157 */
158 static void adb_process_cmd(struct cpu *cpu, struct adb_data *d)
159 {
160 int i, reg, dev;
161
162 debug("[ adb: COMMAND:");
163 for (i=0; i<d->cur_output_offset; i++)
164 debug(" %02x", d->output_buf[i]);
165 debug(" ]\n");
166
167 if (d->cur_output_offset < 2) {
168 fatal("[ adb: WEIRD output length: %i ]\n",
169 d->cur_output_offset);
170 exit(1);
171 }
172
173 switch (d->output_buf[0]) {
174
175 case 0: /* ADB commands: */
176 if (d->output_buf[1] == 0x00) {
177 /* Reset. */
178 return;
179 }
180 if ((d->output_buf[1] & 0x0c) == 0x0c) {
181 /* ADBTALK: */
182 reg = d->output_buf[1] & 3;
183 dev = d->output_buf[1] >> 4;
184 fatal("dev=%i reg=%i\n", dev, reg);
185 /* Default values: nothing here */
186 d->input_buf[0] = 0x00;
187 d->input_buf[1] = 0x00;
188 d->input_buf[2] = d->output_buf[1];
189 d->cur_input_length = 3;
190 if (dev == d->kbd_dev) {
191 /* Keyboard. */
192 d->input_buf[0] = 0x01;
193 d->input_buf[1] = 0x01;
194 d->input_buf[2] = d->output_buf[1];
195 d->input_buf[3] = 0x01;
196 d->input_buf[4] = 0x01;
197 d->cur_input_length = 5;
198 }
199 } else if ((d->output_buf[1] & 0x0c) == 0x08) {
200 int new_dev_pos = d->output_buf[2] & 15;
201 /* ADBLISTEN: */
202 if ((d->output_buf[1] >> 4) != d->kbd_dev) {
203 fatal("[ adb: ADBLISTEN not to kbd ]\n");
204 exit(1);
205 }
206 if (d->output_buf[3] != 0xfe ||
207 (d->output_buf[2] & 0xf0) != 0x60) {
208 fatal("[ adb: unknown ADBLISTEN ]\n");
209 exit(1);
210 }
211 /* Move device. */
212 d->kbd_dev = new_dev_pos;
213 } else {
214 fatal("[ adb: unknown ADB command? ]\n");
215 exit(1);
216 }
217 break;
218
219 case 1: /* PRAM/RTC: */
220 if (d->cur_output_offset == 3 &&
221 d->output_buf[1] == 0x01 &&
222 d->output_buf[2] == 0x01) {
223 /* Autopoll: */
224 d->input_buf[0] = 0x00;
225 d->input_buf[1] = 0x00;
226 d->input_buf[2] = d->output_buf[1];
227 d->cur_input_length = 3;
228 } else if (d->cur_output_offset == 2 &&
229 d->output_buf[1] == 0x03) {
230 /* Read RTC date/time: */
231 struct timeval tv;
232 gettimeofday(&tv, NULL);
233 d->input_buf[0] = tv.tv_sec >> 24;
234 d->input_buf[1] = tv.tv_sec >> 16;
235 d->input_buf[2] = tv.tv_sec >> 8;
236 d->input_buf[3] = tv.tv_sec;
237 d->cur_input_length = 4;
238 } else if (d->cur_output_offset == 2 &&
239 d->output_buf[1] == 0x11) {
240 /* Reboot. */
241 fatal("[ adb: reboot. TODO: make this nicer ]\n");
242 exit(1);
243 } else {
244 fatal("[ adb: UNIMPLEMENTED PRAM/RTC command ]\n");
245 exit(1);
246 }
247 break;
248
249 default:fatal("[ adb: UNKNOWN command type 0x%02x ]\n",
250 d->output_buf[0]);
251 exit(1);
252 }
253
254 d->reg[vBufB >> VIA_REG_SHIFT] &= ~BUFB_nINTR;
255 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
256 d->reg[vSR >> VIA_REG_SHIFT] = 0x00; /* Dummy. */
257 }
258
259
260 /*
261 * adb_transfer():
262 *
263 * This function should be called whenever a new transfer is started, a
264 * transfer is finished, or when the next byte in a transfer should be
265 * sent/received.
266 */
267 static void adb_transfer(struct cpu *cpu, struct adb_data *d, int state_change)
268 {
269 unsigned char c = 0x00;
270
271 if (state_change) {
272 if (d->tip == 0) {
273 debug("[ adb: transfer #%lli done ]\n",
274 (long long)d->transfer_nr);
275 if (d->cur_output_offset > 0)
276 adb_process_cmd(cpu, d);
277 d->transfer_nr ++;
278 return;
279 }
280 debug("[ adb: starting transfer #%lli: %s ]\n", (long long)
281 d->transfer_nr, d->dir == DIR_INPUT? "INPUT" : "OUTPUT");
282 d->cur_input_offset = d->cur_output_offset = 0;
283 }
284
285 debug("[ adb: transfer #%lli: ", (long long)d->transfer_nr);
286
287 switch (d->dir) {
288
289 case DIR_INPUT:
290 if (d->cur_input_offset >= d->cur_input_length)
291 fatal("[ adb: INPUT beyond end of data? ]\n");
292 else
293 c = d->input_buf[d->cur_input_offset ++];
294 debug("input 0x%02x", c);
295 d->reg[vSR >> VIA_REG_SHIFT] = c;
296 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
297 if (d->cur_input_offset >= d->cur_input_length)
298 d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR;
299 break;
300
301 case DIR_OUTPUT:
302 c = d->reg[vSR >> VIA_REG_SHIFT];
303 debug("output 0x%02x", c);
304 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
305 d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR;
306 d->output_buf[d->cur_output_offset ++] = c;
307 break;
308 }
309
310 debug(" ]\n");
311 }
312
313
314 DEVICE_ACCESS(adb)
315 {
316 uint64_t idata = 0, odata = 0;
317 struct adb_data *d = extra;
318 uint8_t old = 0;
319
320 if (writeflag == MEM_WRITE)
321 idata = memory_readmax64(cpu, data, len);
322
323 #ifdef ADB_DEBUG
324 if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0)
325 fatal("[ adb: %s non-via register? offset 0x%x ]\n",
326 writeflag == MEM_READ? "read from" : "write to",
327 (int)relative_addr);
328 else if (writeflag == MEM_READ)
329 fatal("[ adb: read from %s: 0x%02x ]\n",
330 via_regname[relative_addr >> VIA_REG_SHIFT],
331 (int)d->reg[relative_addr >> VIA_REG_SHIFT]);
332 else
333 fatal("[ adb: write to %s: 0x%02x ]\n", via_regname[
334 relative_addr >> VIA_REG_SHIFT], (int)idata);
335 #endif
336
337 if (writeflag == MEM_READ)
338 odata = d->reg[relative_addr >> VIA_REG_SHIFT];
339 else {
340 old = d->reg[relative_addr >> VIA_REG_SHIFT];
341 switch (relative_addr) {
342 case vIFR:
343 /*
344 * vIFR is write-ones-to-clear, and the highest bit
345 * (IFR_ANY) is set if any of the lower bits are set.
346 */
347 d->reg[relative_addr >> VIA_REG_SHIFT] &= ~(idata|0x80);
348 if (d->reg[relative_addr >> VIA_REG_SHIFT] & 0x7f)
349 d->reg[relative_addr >> VIA_REG_SHIFT] |= 0x80;
350 break;
351 default:
352 d->reg[relative_addr >> VIA_REG_SHIFT] = idata;
353 }
354 }
355
356 switch (relative_addr) {
357
358 case vBufB:
359 /* OK */
360 if (writeflag == MEM_WRITE) {
361 int old_tip = d->tip;
362 int old_ack = d->ack;
363 if (idata & BUFB_nINTR)
364 idata &= ~BUFB_nINTR;
365 d->ack = 0;
366 if (idata & BUFB_ACK) {
367 idata &= ~BUFB_ACK;
368 d->ack = 1;
369 }
370 d->tip = 1;
371 if (idata & BUFB_nTIP) {
372 idata &= ~BUFB_nTIP;
373 d->tip = 0;
374 }
375 if (idata != 0)
376 fatal("[ adb: WARNING! UNIMPLEMENTED bits in"
377 " vBufB: 0x%02x ]\n", (int)idata);
378 if (old_tip != d->tip)
379 adb_transfer(cpu, d, 1);
380 else if (old_ack != d->ack)
381 adb_transfer(cpu, d, 0);
382 }
383 break;
384
385 case vDirB:
386 break;
387
388 case vSR:
389 /* Clear the SR interrupt flag, if set: */
390 d->reg[vIFR >> VIA_REG_SHIFT] &= ~IFR_SR;
391 break;
392
393 case vACR:
394 /* OK */
395 if (writeflag == MEM_WRITE) {
396 if (idata & ACR_SR_OUT)
397 d->dir = DIR_OUTPUT;
398 else
399 d->dir = DIR_INPUT;
400 }
401 break;
402
403 case vIFR:
404 /* OK */
405 break;
406
407 case vIER:
408 /* OK */
409 if (writeflag == MEM_WRITE) {
410 d->int_enable = idata & 0x80? 1 : 0;
411 if (idata != 0x04 && idata != 0x84)
412 fatal("[ adb: WARNING! vIER value 0x%x is"
413 " UNKNOWN ]\n", (int)idata);
414 }
415 break;
416
417 default:if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0)
418 fatal("[ adb: %s non-via register? offset 0x%x ]\n",
419 writeflag == MEM_READ? "read from" : "write to",
420 (int)relative_addr);
421 else if (writeflag == MEM_READ)
422 fatal("[ adb: READ from UNIMPLEMENTED %s ]\n",
423 via_regname[relative_addr >> VIA_REG_SHIFT]);
424 else
425 fatal("[ adb: WRITE to UNIMPLEMENTED %s: 0x%x ]\n",
426 via_regname[relative_addr >> VIA_REG_SHIFT],
427 (int)idata);
428 exit(1);
429 }
430
431 if (writeflag == MEM_READ)
432 memory_writemax64(cpu, data, len, odata);
433
434 return 1;
435 }
436
437
438 DEVINIT(adb)
439 {
440 struct adb_data *d = malloc(sizeof(struct adb_data));
441
442 if (d == NULL) {
443 fprintf(stderr, "out of memory\n");
444 exit(1);
445 }
446 memset(d, 0, sizeof(struct adb_data));
447 d->irq_nr = devinit->irq_nr;
448
449 adb_reset(d);
450
451 memory_device_register(devinit->machine->memory, devinit->name,
452 devinit->addr, DEV_ADB_LENGTH, dev_adb_access, d, DM_DEFAULT, NULL);
453 machine_add_tickfunction(devinit->machine, dev_adb_tick, d,
454 TICK_SHIFT, 0.0);
455
456 return 1;
457 }
458

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