/[gxemul]/trunk/src/devices/dev_adb.c
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Contents of /trunk/src/devices/dev_adb.c

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Revision 22 - (show annotations)
Mon Oct 8 16:19:37 2007 UTC (13 years, 1 month ago) by dpavlin
File MIME type: text/plain
File size: 11502 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1121 2006/02/18 21:03:08 debug Exp $
20051126	Cobalt and PReP now work with the 21143 NIC.
		Continuing on Alpha dyntrans things.
		Fixing some more left-shift-by-24 to unsigned.
20051127	Working on OpenFirmware emulation; major cleanup/redesign.
		Progress on MacPPC emulation: NetBSD detects two CPUs (when
		running with -n 2), framebuffer output (for text) works.
		Adding quick-hack Bandit PCI controller and "gc" interrupt
		controller for MacPPC.
20051128	Changing from a Bandit to a Uni-North controller for macppc.
		Continuing on OpenFirmware and MacPPC emulation in general
		(obio controller, and wdc attached to the obio seems to work).
20051129	More work on MacPPC emulation (adding a dummy ADB controller).
		Continuing the PCI bus cleanup (endianness and tag composition)
		and rewriting all PCI controllers' access functions.
20051130	Various minor PPC dyntrans optimizations.
		Manually inlining some parts of the framebuffer redraw routine.
		Slowly beginning the conversion of the old MIPS emulation into
		dyntrans (but this will take quite some time to get right).
		Generalizing quick_pc_to_pointers.
20051201	Documentation update (David Muse has made available a kernel
		which simplifies Debian/DECstation installation).
		Continuing on the ADB bus controller.
20051202	Beginning a rewrite of the Zilog serial controller (dev_zs).
20051203	Continuing on the zs rewrite (now called dev_z8530); conversion
		to devinit style.
		Reworking some of the input-only vs output-only vs input-output
		details of src/console.c, better warning messages, and adding
		a debug dump.
		Removing the concept of "device state"; it wasn't really used.
		Changing some debug output (-vv should now be used to show all
		details about devices and busses; not shown during normal
		startup anymore).
		Beginning on some SPARC instruction disassembly support.
20051204	Minor PPC updates (WALNUT skeleton stuff).
		Continuing on the MIPS dyntrans rewrite.
		More progress on the ADB controller (a keyboard is "detected"
		by NetBSD and OpenBSD).
		Downgrading OpenBSD/arc as a guest OS from "working" to
		"almost working" in the documentation.
		Progress on Algor emulation ("v3" PCI controller).
20051205	Minor updates.
20051207	Sorting devices according to address; this reduces complexity
		of device lookups from O(n) to O(log n) in memory_rw (but no
		real performance increase (yet) in experiments).
20051210	Beginning the work on native dyntrans backends (by making a
		simple skeleton; so far only for Alpha hosts).
20051211	Some very minor SPARC updates.
20051215	Fixing a bug in the MIPS mul (note: not mult) instruction,
		so it also works with non-64-bit emulation. (Thanks to Alec
		Voropay for noticing the problem.)
20051216	More work on the fake/empty/simple/skeleton/whatever backend;
		performance doesn't increase, so this isn't really worth it,
		but it was probably worth it to prepare for a real backend
		later.
20051219	More instr call statistics gathering and analysis stuff.
20051220	Another fix for MIPS 'mul'. Also converting mul and {d,}cl{o,z}
		to dyntrans.
		memory_ppc.c syntax error fix (noticed by Peter Valchev).
		Beginning to move out machines from src/machine.c into
		individual files in src/machines (in a way similar to the
		autodev system for devices).
20051222	Updating the documentation regarding NetBSD/pmax 3.0.
20051223	- " - NetBSD/cats 3.0.
20051225	- " - NetBSD/hpcmips 3.0.
20051226	Continuing on the machine registry redesign.
		Adding support for ARM rrx (33-bit rotate).
		Fixing some signed/unsigned issues (exposed by gcc -W).
20051227	Fixing the bug which prevented a NetBSD/prep 3.0 install kernel
		from starting (triggered when an mtmsr was the last instruction
		on a page). Unfortunately not enough to get the kernel to run
		as well as the 2.1 kernels did.
20051230	Some dyntrans refactoring.
20051231	Continuing on the machine registry redesign.
20060101-10	Continuing... moving more machines. Moving MD interrupt stuff
		from machine.c into a new src/machines/interrupts.c.
20060114	Adding various mvmeppc machine skeletons.
20060115	Continuing on mvme* stuff. NetBSD/mvmeppc prints boot messages
		(for MVME1600) and reaches the root device prompt, but no
		specific hardware devices are emulated yet.
20060116	Minor updates to the mvme1600 emulation mode; the Eagle PCI bus
		seems to work without much modification, and a 21143 can be
		detected, interrupts might work (but untested so far).
		Adding a fake MK48Txx (mkclock) device, for NetBSD/mvmeppc.
20060121	Adding an aux control register for ARM. (A BIG thank you to
		Olivier Houchard for tracking down this bug.)
20060122	Adding more ARM instructions (smulXY), and dev_iq80321_7seg.
20060124	Adding disassembly of more ARM instructions (mia*, mra/mar),
		and some semi-bogus XScale and i80321 registers.
20060201-02	Various minor updates. Moving the last machines out of
		machine.c.
20060204	Adding a -c command line option, for running debugger commands
		before the simulation starts, but after all files have been
		loaded.
		Minor iq80321-related updates.
20060209	Minor hacks (DEVINIT macro, etc).
		Preparing for the generalization of the 64-bit dyntrans address
		translation subsystem.
20060216	Adding ARM ldrd (double-register load).
20060217	Continuing on various ARM-related stuff.
20060218	More progress on the ATA/wdc emulation for NetBSD/iq80321.
		NetBSD/evbarm can now be installed :-)  Updating the docs, etc.
		Continuing on Algor emulation.

==============  RELEASE 0.3.8  ==============


1 /*
2 * Copyright (C) 2005-2006 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_adb.c,v 1.8 2006/02/09 20:02:58 debug Exp $
29 *
30 * ADB (Apple Desktop Bus) controller.
31 *
32 * Based on intuition from reverse-engineering NetBSD/macppc source code,
33 * so it probably only works with that OS.
34 *
35 * The comment "OK" means that 100% of the functionality used by NetBSD/macppc
36 * is covered.
37 *
38 * TODO:
39 * o) Clean up, don't hardcode values.
40 * o) Convert into a separate controller, bus, device architecture.
41 */
42
43 #include <stdio.h>
44 #include <stdlib.h>
45 #include <string.h>
46 #include <sys/time.h>
47
48 #include "console.h"
49 #include "cpu.h"
50 #include "device.h"
51 #include "machine.h"
52 #include "memory.h"
53 #include "misc.h"
54
55 #include "adb_viareg.h"
56
57
58 #define debug fatal
59 /* #define ADB_DEBUG */
60
61
62 #define TICK_SHIFT 17
63 #define DEV_ADB_LENGTH 0x2000
64
65 #define N_VIA_REGS 0x10
66 #define VIA_REG_SHIFT 9
67
68 #define MAX_BUF 100
69
70
71 static char *via_regname[N_VIA_REGS] = {
72 "vBufB", "vBufA", "vDirB", "vDirA",
73 "vT1C", "vT1CH", "vT1L", "vT1LH",
74 "vT2C", "vT2CH", "vSR", "vACR",
75 "vPCR", "vIFR", "vIER", "(unknown)" };
76
77 struct adb_data {
78 int irq_nr;
79 int int_asserted;
80
81 int kbd_dev;
82
83 long long transfer_nr;
84
85 uint8_t reg[N_VIA_REGS];
86
87 int cur_output_offset;
88 uint8_t output_buf[MAX_BUF];
89
90 int cur_input_offset;
91 int cur_input_length;
92 uint8_t input_buf[MAX_BUF];
93
94 int dir;
95 int int_enable;
96 int ack; /* last ack state */
97 int tip; /* transfer in progress */
98 };
99
100 #define DIR_INPUT 0
101 #define DIR_OUTPUT 1
102
103 #define BUFB_nINTR 0x08
104 #define BUFB_ACK 0x10
105 #define BUFB_nTIP 0x20
106 #define IFR_SR 0x04
107 #define IFR_ANY 0x80
108 #define ACR_SR_OUT 0x10
109
110
111
112 /*
113 * dev_adb_tick():
114 */
115 void dev_adb_tick(struct cpu *cpu, void *extra)
116 {
117 struct adb_data *d = extra;
118 int a;
119
120 a = d->reg[vIFR >> VIA_REG_SHIFT] & IFR_ANY;
121 if (a == IFR_ANY && d->int_enable)
122 a = 1;
123
124 if (a)
125 cpu_interrupt(cpu, d->irq_nr);
126 else if (d->int_asserted)
127 cpu_interrupt_ack(cpu, d->irq_nr);
128
129 d->int_asserted = a;
130 }
131
132
133 /*
134 * adb_reset():
135 *
136 * Reset registers to default values.
137 */
138 static void adb_reset(struct adb_data *d)
139 {
140 d->kbd_dev = 2;
141
142 memset(d->reg, 0, sizeof(d->reg));
143 d->reg[vBufB >> VIA_REG_SHIFT] = BUFB_nINTR | BUFB_nTIP;
144
145 d->cur_output_offset = 0;
146 memset(d->output_buf, 0, sizeof(d->output_buf));
147
148 d->dir = 0;
149 d->int_enable = 0;
150 d->ack = 0;
151 d->tip = 0;
152 }
153
154
155 /*
156 * adb_process_cmd():
157 *
158 * This function should be called whenever a complete ADB command has been
159 * received.
160 */
161 static void adb_process_cmd(struct cpu *cpu, struct adb_data *d)
162 {
163 int i, reg, dev;
164
165 debug("[ adb: COMMAND:");
166 for (i=0; i<d->cur_output_offset; i++)
167 debug(" %02x", d->output_buf[i]);
168 debug(" ]\n");
169
170 if (d->cur_output_offset < 2) {
171 fatal("[ adb: WEIRD output length: %i ]\n",
172 d->cur_output_offset);
173 exit(1);
174 }
175
176 switch (d->output_buf[0]) {
177
178 case 0: /* ADB commands: */
179 if (d->output_buf[1] == 0x00) {
180 /* Reset. */
181 return;
182 }
183 if ((d->output_buf[1] & 0x0c) == 0x0c) {
184 /* ADBTALK: */
185 reg = d->output_buf[1] & 3;
186 dev = d->output_buf[1] >> 4;
187 fatal("dev=%i reg=%i\n", dev, reg);
188 /* Default values: nothing here */
189 d->input_buf[0] = 0x00;
190 d->input_buf[1] = 0x00;
191 d->input_buf[2] = d->output_buf[1];
192 d->cur_input_length = 3;
193 if (dev == d->kbd_dev) {
194 /* Keyboard. */
195 d->input_buf[0] = 0x01;
196 d->input_buf[1] = 0x01;
197 d->input_buf[2] = d->output_buf[1];
198 d->input_buf[3] = 0x01;
199 d->input_buf[4] = 0x01;
200 d->cur_input_length = 5;
201 }
202 } else if ((d->output_buf[1] & 0x0c) == 0x08) {
203 int new_dev_pos = d->output_buf[2] & 15;
204 /* ADBLISTEN: */
205 if ((d->output_buf[1] >> 4) != d->kbd_dev) {
206 fatal("[ adb: ADBLISTEN not to kbd ]\n");
207 exit(1);
208 }
209 if (d->output_buf[3] != 0xfe ||
210 (d->output_buf[2] & 0xf0) != 0x60) {
211 fatal("[ adb: unknown ADBLISTEN ]\n");
212 exit(1);
213 }
214 /* Move device. */
215 d->kbd_dev = new_dev_pos;
216 } else {
217 fatal("[ adb: unknown ADB command? ]\n");
218 exit(1);
219 }
220 break;
221
222 case 1: /* PRAM/RTC: */
223 if (d->cur_output_offset == 3 &&
224 d->output_buf[1] == 0x01 &&
225 d->output_buf[2] == 0x01) {
226 /* Autopoll: */
227 d->input_buf[0] = 0x00;
228 d->input_buf[1] = 0x00;
229 d->input_buf[2] = d->output_buf[1];
230 d->cur_input_length = 3;
231 } else if (d->cur_output_offset == 2 &&
232 d->output_buf[1] == 0x03) {
233 /* Read RTC date/time: */
234 struct timeval tv;
235 gettimeofday(&tv, NULL);
236 d->input_buf[0] = tv.tv_sec >> 24;
237 d->input_buf[1] = tv.tv_sec >> 16;
238 d->input_buf[2] = tv.tv_sec >> 8;
239 d->input_buf[3] = tv.tv_sec;
240 d->cur_input_length = 4;
241 } else if (d->cur_output_offset == 2 &&
242 d->output_buf[1] == 0x11) {
243 /* Reboot. */
244 fatal("[ adb: reboot. TODO: make this nicer ]\n");
245 exit(1);
246 } else {
247 fatal("[ adb: UNIMPLEMENTED PRAM/RTC command ]\n");
248 exit(1);
249 }
250 break;
251
252 default:fatal("[ adb: UNKNOWN command type 0x%02x ]\n",
253 d->output_buf[0]);
254 exit(1);
255 }
256
257 d->reg[vBufB >> VIA_REG_SHIFT] &= ~BUFB_nINTR;
258 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
259 d->reg[vSR >> VIA_REG_SHIFT] = 0x00; /* Dummy. */
260 }
261
262
263 /*
264 * adb_transfer():
265 *
266 * This function should be called whenever a new transfer is started, a
267 * transfer is finished, or when the next byte in a transfer should be
268 * sent/received.
269 */
270 static void adb_transfer(struct cpu *cpu, struct adb_data *d, int state_change)
271 {
272 unsigned char c = 0x00;
273
274 if (state_change) {
275 if (d->tip == 0) {
276 debug("[ adb: transfer #%lli done ]\n",
277 (long long)d->transfer_nr);
278 if (d->cur_output_offset > 0)
279 adb_process_cmd(cpu, d);
280 d->transfer_nr ++;
281 return;
282 }
283 debug("[ adb: starting transfer #%lli: %s ]\n", (long long)
284 d->transfer_nr, d->dir == DIR_INPUT? "INPUT" : "OUTPUT");
285 d->cur_input_offset = d->cur_output_offset = 0;
286 }
287
288 debug("[ adb: transfer #%lli: ", (long long)d->transfer_nr);
289
290 switch (d->dir) {
291
292 case DIR_INPUT:
293 if (d->cur_input_offset >= d->cur_input_length)
294 fatal("[ adb: INPUT beyond end of data? ]\n");
295 else
296 c = d->input_buf[d->cur_input_offset ++];
297 debug("input 0x%02x", c);
298 d->reg[vSR >> VIA_REG_SHIFT] = c;
299 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
300 if (d->cur_input_offset >= d->cur_input_length)
301 d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR;
302 break;
303
304 case DIR_OUTPUT:
305 c = d->reg[vSR >> VIA_REG_SHIFT];
306 debug("output 0x%02x", c);
307 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
308 d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR;
309 d->output_buf[d->cur_output_offset ++] = c;
310 break;
311 }
312
313 debug(" ]\n");
314 }
315
316
317 /*
318 * dev_adb_access():
319 */
320 DEVICE_ACCESS(adb)
321 {
322 uint64_t idata = 0, odata = 0;
323 struct adb_data *d = extra;
324 uint8_t old = 0;
325
326 if (writeflag == MEM_WRITE)
327 idata = memory_readmax64(cpu, data, len);
328
329 #ifdef ADB_DEBUG
330 if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0)
331 fatal("[ adb: %s non-via register? offset 0x%x ]\n",
332 writeflag == MEM_READ? "read from" : "write to",
333 (int)relative_addr);
334 else if (writeflag == MEM_READ)
335 fatal("[ adb: read from %s: 0x%02x ]\n",
336 via_regname[relative_addr >> VIA_REG_SHIFT],
337 (int)d->reg[relative_addr >> VIA_REG_SHIFT]);
338 else
339 fatal("[ adb: write to %s: 0x%02x ]\n", via_regname[
340 relative_addr >> VIA_REG_SHIFT], (int)idata);
341 #endif
342
343 if (writeflag == MEM_READ)
344 odata = d->reg[relative_addr >> VIA_REG_SHIFT];
345 else {
346 old = d->reg[relative_addr >> VIA_REG_SHIFT];
347 switch (relative_addr) {
348 case vIFR:
349 /*
350 * vIFR is write-ones-to-clear, and the highest bit
351 * (IFR_ANY) is set if any of the lower bits are set.
352 */
353 d->reg[relative_addr >> VIA_REG_SHIFT] &= ~(idata|0x80);
354 if (d->reg[relative_addr >> VIA_REG_SHIFT] & 0x7f)
355 d->reg[relative_addr >> VIA_REG_SHIFT] |= 0x80;
356 break;
357 default:
358 d->reg[relative_addr >> VIA_REG_SHIFT] = idata;
359 }
360 }
361
362 switch (relative_addr) {
363
364 case vBufB:
365 /* OK */
366 if (writeflag == MEM_WRITE) {
367 int old_tip = d->tip;
368 int old_ack = d->ack;
369 if (idata & BUFB_nINTR)
370 idata &= ~BUFB_nINTR;
371 d->ack = 0;
372 if (idata & BUFB_ACK) {
373 idata &= ~BUFB_ACK;
374 d->ack = 1;
375 }
376 d->tip = 1;
377 if (idata & BUFB_nTIP) {
378 idata &= ~BUFB_nTIP;
379 d->tip = 0;
380 }
381 if (idata != 0)
382 fatal("[ adb: WARNING! UNIMPLEMENTED bits in"
383 " vBufB: 0x%02x ]\n", (int)idata);
384 if (old_tip != d->tip)
385 adb_transfer(cpu, d, 1);
386 else if (old_ack != d->ack)
387 adb_transfer(cpu, d, 0);
388 }
389 break;
390
391 case vDirB:
392 break;
393
394 case vSR:
395 /* Clear the SR interrupt flag, if set: */
396 d->reg[vIFR >> VIA_REG_SHIFT] &= ~IFR_SR;
397 break;
398
399 case vACR:
400 /* OK */
401 if (writeflag == MEM_WRITE) {
402 if (idata & ACR_SR_OUT)
403 d->dir = DIR_OUTPUT;
404 else
405 d->dir = DIR_INPUT;
406 }
407 break;
408
409 case vIFR:
410 /* OK */
411 break;
412
413 case vIER:
414 /* OK */
415 if (writeflag == MEM_WRITE) {
416 d->int_enable = idata & 0x80? 1 : 0;
417 if (idata != 0x04 && idata != 0x84)
418 fatal("[ adb: WARNING! vIER value 0x%x is"
419 " UNKNOWN ]\n", (int)idata);
420 }
421 break;
422
423 default:if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0)
424 fatal("[ adb: %s non-via register? offset 0x%x ]\n",
425 writeflag == MEM_READ? "read from" : "write to",
426 (int)relative_addr);
427 else if (writeflag == MEM_READ)
428 fatal("[ adb: READ from UNIMPLEMENTED %s ]\n",
429 via_regname[relative_addr >> VIA_REG_SHIFT]);
430 else
431 fatal("[ adb: WRITE to UNIMPLEMENTED %s: 0x%x ]\n",
432 via_regname[relative_addr >> VIA_REG_SHIFT],
433 (int)idata);
434 exit(1);
435 }
436
437 if (writeflag == MEM_READ)
438 memory_writemax64(cpu, data, len, odata);
439
440 return 1;
441 }
442
443
444 DEVINIT(adb)
445 {
446 struct adb_data *d = malloc(sizeof(struct adb_data));
447
448 if (d == NULL) {
449 fprintf(stderr, "out of memory\n");
450 exit(1);
451 }
452 memset(d, 0, sizeof(struct adb_data));
453 d->irq_nr = devinit->irq_nr;
454
455 adb_reset(d);
456
457 memory_device_register(devinit->machine->memory, devinit->name,
458 devinit->addr, DEV_ADB_LENGTH, dev_adb_access, d, DM_DEFAULT, NULL);
459 machine_add_tickfunction(devinit->machine, dev_adb_tick, d, TICK_SHIFT);
460
461 return 1;
462 }
463

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