/[gxemul]/trunk/src/devices/dev_adb.c
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Contents of /trunk/src/devices/dev_adb.c

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Revision 42 - (show annotations)
Mon Oct 8 16:22:32 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 11455 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1613 2007/06/15 20:11:26 debug Exp $
20070501	Continuing a little on m88k disassembly (control registers,
		more instructions).
		Adding a dummy mvme88k machine mode.
20070502	Re-adding MIPS load/store alignment exceptions.
20070503	Implementing more of the M88K disassembly code.
20070504	Adding disassembly of some more M88K load/store instructions.
		Implementing some relatively simple M88K instructions (br.n,
		xor[.u] imm, and[.u] imm).
20070505	Implementing M88K three-register and, or, xor, and jmp[.n],
		bsr[.n] including function call trace stuff.
		Applying a patch from Bruce M. Simpson which implements the
		SYSCON_BOARD_CPU_CLOCK_FREQ_ID object of the syscon call in
		the yamon PROM emulation.
20070506	Implementing M88K bb0[.n] and bb1[.n], and skeletons for
		ldcr and stcr (although no control regs are implemented yet).
20070509	Found and fixed the bug which caused Linux for QEMU_MIPS to
		stop working in 0.4.5.1: It was a faulty change to the MIPS
		'sc' and 'scd' instructions I made while going through gcc -W
		warnings on 20070428.
20070510	Updating the Linux/QEMU_MIPS section in guestoses.html to
		use mips-test-0.2.tar.gz instead of 0.1.
		A big thank you to Miod Vallat for sending me M88K manuals.
		Implementing more M88K instructions (addu, subu, div[u], mulu,
		ext[u], clr, set, cmp).
20070511	Fixing bugs in the M88K "and" and "and.u" instructions (found
		by comparing against the manual).
		Implementing more M88K instructions (mask[.u], mak, bcnd (auto-
		generated)) and some more control register details.
		Cleanup: Removing the experimental AVR emulation mode and
		corresponding devices; AVR emulation wasn't really meaningful.
		Implementing autogeneration of most M88K loads/stores. The
		rectangle drawing demo (with -O0) for M88K runs :-)
		Beginning on M88K exception handling.
		More M88K instructions: tb0, tb1, rte, sub, jsr[.n].
		Adding some skeleton MVME PROM ("BUG") emulation.
20070512	Fixing a bug in the M88K cmp instruction.
		Adding the M88K lda (scaled register) instruction.
		Fixing bugs in 64-bit (32-bit pairs) M88K loads/stores.
		Removing the unused tick_hz stuff from the machine struct.
		Implementing the M88K xmem instruction. OpenBSD/mvme88k gets
		far enough to display the Copyright banner :-)
		Implementing subu.co (guess), addu.co, addu.ci, ff0, and ff1.
		Adding a dev_mvme187, for MVME187-specific devices/registers.
		OpenBSD/mvme88k prints more boot messages. :)
20070515	Continuing on MVME187 emulation (adding more devices, beginning
		on the CMMUs, etc).
		Adding the M88K and.c, xor.c, and or.c instructions, and making
		sure that mul, div, etc cause exceptions if executed when SFD1
		is disabled.
20070517	Continuing on M88K and MVME187 emulation in general; moving
		the CMMU registers to the CPU struct, separating dev_pcc2 from
		dev_mvme187, and beginning on memory_m88k.c (BATC and PATC).
		Fixing a bug in 64-bit (32-bit pairs) M88K fast stores.
		Implementing the clock part of dev_mk48txx.
		Implementing the M88K fstcr and xcr instructions.
		Implementing m88k_cpu_tlbdump().
		Beginning on the implementation of a separate address space
		for M88K .usr loads/stores.
20070520	Removing the non-working (skeleton) Sandpoint, SonyNEWS, SHARK
		Dnard, and Zaurus machine modes.
		Experimenting with dyntrans to_be_translated read-ahead. It
		seems to give a very small performance increase for MIPS
		emulation, but a large performance degradation for SuperH. Hm.
20070522	Disabling correct SuperH ITLB emulation; it does not seem to be
		necessary in order to let SH4 guest OSes run, and it slows down
		userspace code.
		Implementing "samepage" branches for SuperH emulation, and some
		other minor speed hacks.
20070525	Continuing on M88K memory-related stuff: exceptions, memory
		transaction register contents, etc.
		Implementing the M88K subu.ci instruction.
		Removing the non-working (skeleton) Iyonix machine mode.
		OpenBSD/mvme88k reaches userland :-), starts executing
		/sbin/init's instructions, and issues a few syscalls, before
		crashing.
20070526	Fixing bugs in dev_mk48txx, so that OpenBSD/mvme88k detects
		the correct time-of-day.
		Implementing a generic IRQ controller for the test machines
		(dev_irqc), similar to a proposed patch from Petr Stepan.
		Experimenting some more with translation read-ahead.
		Adding an "expect" script for automated OpenBSD/landisk
		install regression/performance tests.
20070527	Adding a dummy mmEye (SH3) machine mode skeleton.
		FINALLY found the strange M88K bug I have been hunting: I had
		not emulated the SNIP value for exceptions occurring in
		branch delay slots correctly.
		Implementing correct exceptions for 64-bit M88K loads/stores.
		Address to symbol lookups are now disabled when M88K is
		running in usermode (because usermode addresses don't have
		anything to do with supervisor addresses).
20070531	Removing the mmEye machine mode skeleton.
20070604	Some minor code cleanup.
20070605	Moving src/useremul.c into a subdir (src/useremul/), and
		cleaning up some more legacy constructs.
		Adding -Wstrict-aliasing and -fstrict-aliasing detection to
		the configure script.
20070606	Adding a check for broken GCC on Solaris to the configure
		script. (GCC 3.4.3 on Solaris cannot handle static variables
		which are initialized to 0 or NULL. :-/)
		Removing the old (non-working) ARC emulation modes: NEC RD94,
		R94, R96, and R98, and the last traces of Olivetti M700 and
		Deskstation Tyne.
		Removing the non-working skeleton WDSC device (dev_wdsc).
20070607	Thinking about how to use the host's cc + ld at runtime to
		generate native code. (See experiments/native_cc_ld_test.i
		for an example.)
20070608	Adding a program counter sampling timer, which could be useful
		for native code generation experiments.
		The KN02_CSR_NRMMOD bit in the DECstation 5000/200 (KN02) CSR
		should always be set, to allow a 5000/200 PROM to boot.
20070609	Moving out breakpoint details from the machine struct into
		a helper struct, and removing the limit on max nr of
		breakpoints.
20070610	Moving out tick functions into a helper struct as well (which
		also gets rid of the max limit).
20070612	FINALLY figured out why Debian/DECstation stopped working when
		translation read-ahead was enabled: in src/memory_rw.c, the
		call to invalidate_code_translation was made also if the
		memory access was an instruction load (if the page was mapped
		as writable); it shouldn't be called in that case.
20070613	Implementing some more MIPS32/64 revision 2 instructions: di,
		ei, ext, dext, dextm, dextu, and ins.
20070614	Implementing an instruction combination for the NetBSD/arm
		idle loop (making the host not use any cpu if NetBSD/arm
		inside the emulator is not using any cpu).
		Increasing the nr of ARM VPH entries from 128 to 384.
20070615	Removing the ENABLE_arch stuff from the configure script, so
		that all included architectures are included in both release
		and development builds.
		Moving memory related helper functions from misc.c to memory.c.
		Adding preliminary instructions for netbooting NetBSD/pmppc to
		guestoses.html; it doesn't work yet, there are weird timeouts.
		Beginning a total rewrite of the userland emulation modes
		(removing all emulation modes, beginning from scratch with
		NetBSD/MIPS and FreeBSD/Alpha only).
20070616	After fixing a bug in the DEC21143 NIC (the TDSTAT_OWN bit was
		only cleared for the last segment when transmitting, not all
		segments), NetBSD/pmppc boots with root-on-nfs without the
		timeouts. Updating guestoses.html.
		Removing the skeleton PSP (Playstation Portable) mode.
		Moving X11-related stuff in the machine struct into a helper
		struct.
		Cleanup of out-of-memory checks, to use a new CHECK_ALLOCATION
		macro (which prints a meaningful error message).
		Adding a COMMENT to each machine and device (for automagic
		.index comment generation).
		Doing regression testing for the next release.

==============  RELEASE 0.4.6  ==============


1 /*
2 * Copyright (C) 2005-2007 Anders Gavare. All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions are met:
6 *
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. The name of the author may not be used to endorse or promote products
13 * derived from this software without specific prior written permission.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 *
28 * $Id: dev_adb.c,v 1.14 2007/06/15 18:44:18 debug Exp $
29 *
30 * COMMENT: Apple Desktop Bus (ADB) controller
31 *
32 * Based on intuition from reverse-engineering NetBSD/macppc source code,
33 * so it probably only works with that OS.
34 *
35 * The comment "OK" means that 100% of the functionality used by NetBSD/macppc
36 * is covered.
37 *
38 * TODO:
39 * o) Clean up, don't hardcode values.
40 * o) Convert into a separate controller, bus, device architecture.
41 */
42
43 #include <stdio.h>
44 #include <stdlib.h>
45 #include <string.h>
46 #include <sys/time.h>
47
48 #include "console.h"
49 #include "cpu.h"
50 #include "device.h"
51 #include "interrupt.h"
52 #include "machine.h"
53 #include "memory.h"
54 #include "misc.h"
55
56 #include "adb_viareg.h"
57
58
59 #define debug fatal
60 /* #define ADB_DEBUG */
61
62
63 #define TICK_SHIFT 17
64 #define DEV_ADB_LENGTH 0x2000
65
66 #define N_VIA_REGS 0x10
67 #define VIA_REG_SHIFT 9
68
69 #define MAX_BUF 100
70
71
72 static char *via_regname[N_VIA_REGS] = {
73 "vBufB", "vBufA", "vDirB", "vDirA",
74 "vT1C", "vT1CH", "vT1L", "vT1LH",
75 "vT2C", "vT2CH", "vSR", "vACR",
76 "vPCR", "vIFR", "vIER", "(unknown)" };
77
78 struct adb_data {
79 struct interrupt irq;
80 int int_asserted;
81
82 int kbd_dev;
83
84 long long transfer_nr;
85
86 uint8_t reg[N_VIA_REGS];
87
88 int cur_output_offset;
89 uint8_t output_buf[MAX_BUF];
90
91 int cur_input_offset;
92 int cur_input_length;
93 uint8_t input_buf[MAX_BUF];
94
95 int dir;
96 int int_enable;
97 int ack; /* last ack state */
98 int tip; /* transfer in progress */
99 };
100
101 #define DIR_INPUT 0
102 #define DIR_OUTPUT 1
103
104 #define BUFB_nINTR 0x08
105 #define BUFB_ACK 0x10
106 #define BUFB_nTIP 0x20
107 #define IFR_SR 0x04
108 #define IFR_ANY 0x80
109 #define ACR_SR_OUT 0x10
110
111
112
113 DEVICE_TICK(adb)
114 {
115 struct adb_data *d = extra;
116 int assert;
117
118 assert = d->reg[vIFR >> VIA_REG_SHIFT] & IFR_ANY;
119 if (assert == IFR_ANY && d->int_enable)
120 assert = 1;
121
122 if (assert)
123 INTERRUPT_ASSERT(d->irq);
124 else if (d->int_asserted)
125 INTERRUPT_DEASSERT(d->irq);
126
127 d->int_asserted = assert;
128 }
129
130
131 /*
132 * adb_reset():
133 *
134 * Reset registers to default values.
135 */
136 static void adb_reset(struct adb_data *d)
137 {
138 d->kbd_dev = 2;
139
140 memset(d->reg, 0, sizeof(d->reg));
141 d->reg[vBufB >> VIA_REG_SHIFT] = BUFB_nINTR | BUFB_nTIP;
142
143 d->cur_output_offset = 0;
144 memset(d->output_buf, 0, sizeof(d->output_buf));
145
146 d->dir = 0;
147 d->int_enable = 0;
148 d->ack = 0;
149 d->tip = 0;
150 }
151
152
153 /*
154 * adb_process_cmd():
155 *
156 * This function should be called whenever a complete ADB command has been
157 * received.
158 */
159 static void adb_process_cmd(struct cpu *cpu, struct adb_data *d)
160 {
161 int i, reg, dev;
162
163 debug("[ adb: COMMAND:");
164 for (i=0; i<d->cur_output_offset; i++)
165 debug(" %02x", d->output_buf[i]);
166 debug(" ]\n");
167
168 if (d->cur_output_offset < 2) {
169 fatal("[ adb: WEIRD output length: %i ]\n",
170 d->cur_output_offset);
171 exit(1);
172 }
173
174 switch (d->output_buf[0]) {
175
176 case 0: /* ADB commands: */
177 if (d->output_buf[1] == 0x00) {
178 /* Reset. */
179 return;
180 }
181 if ((d->output_buf[1] & 0x0c) == 0x0c) {
182 /* ADBTALK: */
183 reg = d->output_buf[1] & 3;
184 dev = d->output_buf[1] >> 4;
185 fatal("dev=%i reg=%i\n", dev, reg);
186 /* Default values: nothing here */
187 d->input_buf[0] = 0x00;
188 d->input_buf[1] = 0x00;
189 d->input_buf[2] = d->output_buf[1];
190 d->cur_input_length = 3;
191 if (dev == d->kbd_dev) {
192 /* Keyboard. */
193 d->input_buf[0] = 0x01;
194 d->input_buf[1] = 0x01;
195 d->input_buf[2] = d->output_buf[1];
196 d->input_buf[3] = 0x01;
197 d->input_buf[4] = 0x01;
198 d->cur_input_length = 5;
199 }
200 } else if ((d->output_buf[1] & 0x0c) == 0x08) {
201 int new_dev_pos = d->output_buf[2] & 15;
202 /* ADBLISTEN: */
203 if ((d->output_buf[1] >> 4) != d->kbd_dev) {
204 fatal("[ adb: ADBLISTEN not to kbd ]\n");
205 exit(1);
206 }
207 if (d->output_buf[3] != 0xfe ||
208 (d->output_buf[2] & 0xf0) != 0x60) {
209 fatal("[ adb: unknown ADBLISTEN ]\n");
210 exit(1);
211 }
212 /* Move device. */
213 d->kbd_dev = new_dev_pos;
214 } else {
215 fatal("[ adb: unknown ADB command? ]\n");
216 exit(1);
217 }
218 break;
219
220 case 1: /* PRAM/RTC: */
221 if (d->cur_output_offset == 3 &&
222 d->output_buf[1] == 0x01 &&
223 d->output_buf[2] == 0x01) {
224 /* Autopoll: */
225 d->input_buf[0] = 0x00;
226 d->input_buf[1] = 0x00;
227 d->input_buf[2] = d->output_buf[1];
228 d->cur_input_length = 3;
229 } else if (d->cur_output_offset == 2 &&
230 d->output_buf[1] == 0x03) {
231 /* Read RTC date/time: */
232 struct timeval tv;
233 gettimeofday(&tv, NULL);
234 d->input_buf[0] = tv.tv_sec >> 24;
235 d->input_buf[1] = tv.tv_sec >> 16;
236 d->input_buf[2] = tv.tv_sec >> 8;
237 d->input_buf[3] = tv.tv_sec;
238 d->cur_input_length = 4;
239 } else if (d->cur_output_offset == 2 &&
240 d->output_buf[1] == 0x11) {
241 /* Reboot. */
242 fatal("[ adb: reboot. TODO: make this nicer ]\n");
243 exit(1);
244 } else {
245 fatal("[ adb: UNIMPLEMENTED PRAM/RTC command ]\n");
246 exit(1);
247 }
248 break;
249
250 default:fatal("[ adb: UNKNOWN command type 0x%02x ]\n",
251 d->output_buf[0]);
252 exit(1);
253 }
254
255 d->reg[vBufB >> VIA_REG_SHIFT] &= ~BUFB_nINTR;
256 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
257 d->reg[vSR >> VIA_REG_SHIFT] = 0x00; /* Dummy. */
258 }
259
260
261 /*
262 * adb_transfer():
263 *
264 * This function should be called whenever a new transfer is started, a
265 * transfer is finished, or when the next byte in a transfer should be
266 * sent/received.
267 */
268 static void adb_transfer(struct cpu *cpu, struct adb_data *d, int state_change)
269 {
270 unsigned char c = 0x00;
271
272 if (state_change) {
273 if (d->tip == 0) {
274 debug("[ adb: transfer #%lli done ]\n",
275 (long long)d->transfer_nr);
276 if (d->cur_output_offset > 0)
277 adb_process_cmd(cpu, d);
278 d->transfer_nr ++;
279 return;
280 }
281 debug("[ adb: starting transfer #%lli: %s ]\n", (long long)
282 d->transfer_nr, d->dir == DIR_INPUT? "INPUT" : "OUTPUT");
283 d->cur_input_offset = d->cur_output_offset = 0;
284 }
285
286 debug("[ adb: transfer #%lli: ", (long long)d->transfer_nr);
287
288 switch (d->dir) {
289
290 case DIR_INPUT:
291 if (d->cur_input_offset >= d->cur_input_length)
292 fatal("[ adb: INPUT beyond end of data? ]\n");
293 else
294 c = d->input_buf[d->cur_input_offset ++];
295 debug("input 0x%02x", c);
296 d->reg[vSR >> VIA_REG_SHIFT] = c;
297 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
298 if (d->cur_input_offset >= d->cur_input_length)
299 d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR;
300 break;
301
302 case DIR_OUTPUT:
303 c = d->reg[vSR >> VIA_REG_SHIFT];
304 debug("output 0x%02x", c);
305 d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR;
306 d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR;
307 d->output_buf[d->cur_output_offset ++] = c;
308 break;
309 }
310
311 debug(" ]\n");
312 }
313
314
315 DEVICE_ACCESS(adb)
316 {
317 uint64_t idata = 0, odata = 0;
318 struct adb_data *d = extra;
319 uint8_t old = 0;
320
321 if (writeflag == MEM_WRITE)
322 idata = memory_readmax64(cpu, data, len);
323
324 #ifdef ADB_DEBUG
325 if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0)
326 fatal("[ adb: %s non-via register? offset 0x%x ]\n",
327 writeflag == MEM_READ? "read from" : "write to",
328 (int)relative_addr);
329 else if (writeflag == MEM_READ)
330 fatal("[ adb: read from %s: 0x%02x ]\n",
331 via_regname[relative_addr >> VIA_REG_SHIFT],
332 (int)d->reg[relative_addr >> VIA_REG_SHIFT]);
333 else
334 fatal("[ adb: write to %s: 0x%02x ]\n", via_regname[
335 relative_addr >> VIA_REG_SHIFT], (int)idata);
336 #endif
337
338 if (writeflag == MEM_READ)
339 odata = d->reg[relative_addr >> VIA_REG_SHIFT];
340 else {
341 old = d->reg[relative_addr >> VIA_REG_SHIFT];
342 switch (relative_addr) {
343 case vIFR:
344 /*
345 * vIFR is write-ones-to-clear, and the highest bit
346 * (IFR_ANY) is set if any of the lower bits are set.
347 */
348 d->reg[relative_addr >> VIA_REG_SHIFT] &= ~(idata|0x80);
349 if (d->reg[relative_addr >> VIA_REG_SHIFT] & 0x7f)
350 d->reg[relative_addr >> VIA_REG_SHIFT] |= 0x80;
351 break;
352 default:
353 d->reg[relative_addr >> VIA_REG_SHIFT] = idata;
354 }
355 }
356
357 switch (relative_addr) {
358
359 case vBufB:
360 /* OK */
361 if (writeflag == MEM_WRITE) {
362 int old_tip = d->tip;
363 int old_ack = d->ack;
364 if (idata & BUFB_nINTR)
365 idata &= ~BUFB_nINTR;
366 d->ack = 0;
367 if (idata & BUFB_ACK) {
368 idata &= ~BUFB_ACK;
369 d->ack = 1;
370 }
371 d->tip = 1;
372 if (idata & BUFB_nTIP) {
373 idata &= ~BUFB_nTIP;
374 d->tip = 0;
375 }
376 if (idata != 0)
377 fatal("[ adb: WARNING! UNIMPLEMENTED bits in"
378 " vBufB: 0x%02x ]\n", (int)idata);
379 if (old_tip != d->tip)
380 adb_transfer(cpu, d, 1);
381 else if (old_ack != d->ack)
382 adb_transfer(cpu, d, 0);
383 }
384 break;
385
386 case vDirB:
387 break;
388
389 case vSR:
390 /* Clear the SR interrupt flag, if set: */
391 d->reg[vIFR >> VIA_REG_SHIFT] &= ~IFR_SR;
392 break;
393
394 case vACR:
395 /* OK */
396 if (writeflag == MEM_WRITE) {
397 if (idata & ACR_SR_OUT)
398 d->dir = DIR_OUTPUT;
399 else
400 d->dir = DIR_INPUT;
401 }
402 break;
403
404 case vIFR:
405 /* OK */
406 break;
407
408 case vIER:
409 /* OK */
410 if (writeflag == MEM_WRITE) {
411 d->int_enable = idata & 0x80? 1 : 0;
412 if (idata != 0x04 && idata != 0x84)
413 fatal("[ adb: WARNING! vIER value 0x%x is"
414 " UNKNOWN ]\n", (int)idata);
415 }
416 break;
417
418 default:if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0)
419 fatal("[ adb: %s non-via register? offset 0x%x ]\n",
420 writeflag == MEM_READ? "read from" : "write to",
421 (int)relative_addr);
422 else if (writeflag == MEM_READ)
423 fatal("[ adb: READ from UNIMPLEMENTED %s ]\n",
424 via_regname[relative_addr >> VIA_REG_SHIFT]);
425 else
426 fatal("[ adb: WRITE to UNIMPLEMENTED %s: 0x%x ]\n",
427 via_regname[relative_addr >> VIA_REG_SHIFT],
428 (int)idata);
429 exit(1);
430 }
431
432 if (writeflag == MEM_READ)
433 memory_writemax64(cpu, data, len, odata);
434
435 return 1;
436 }
437
438
439 DEVINIT(adb)
440 {
441 struct adb_data *d;
442
443 CHECK_ALLOCATION(d = malloc(sizeof(struct adb_data)));
444 memset(d, 0, sizeof(struct adb_data));
445
446 INTERRUPT_CONNECT(devinit->interrupt_path, d->irq);
447
448 adb_reset(d);
449
450 memory_device_register(devinit->machine->memory, devinit->name,
451 devinit->addr, DEV_ADB_LENGTH, dev_adb_access, d, DM_DEFAULT, NULL);
452 machine_add_tickfunction(devinit->machine, dev_adb_tick, d,
453 TICK_SHIFT);
454
455 return 1;
456 }
457

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