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/* |
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* Copyright (C) 2005-2006 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: dev_adb.c,v 1.10 2006/07/21 16:55:41 debug Exp $ |
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* |
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* ADB (Apple Desktop Bus) controller. |
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* |
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* Based on intuition from reverse-engineering NetBSD/macppc source code, |
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* so it probably only works with that OS. |
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* |
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* The comment "OK" means that 100% of the functionality used by NetBSD/macppc |
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* is covered. |
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* |
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* TODO: |
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* o) Clean up, don't hardcode values. |
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* o) Convert into a separate controller, bus, device architecture. |
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*/ |
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|
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#include <stdio.h> |
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#include <stdlib.h> |
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#include <string.h> |
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#include <sys/time.h> |
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|
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#include "console.h" |
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#include "cpu.h" |
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#include "device.h" |
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#include "machine.h" |
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#include "memory.h" |
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#include "misc.h" |
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|
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#include "adb_viareg.h" |
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|
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|
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#define debug fatal |
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/* #define ADB_DEBUG */ |
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|
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|
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#define TICK_SHIFT 17 |
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#define DEV_ADB_LENGTH 0x2000 |
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|
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#define N_VIA_REGS 0x10 |
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#define VIA_REG_SHIFT 9 |
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|
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#define MAX_BUF 100 |
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|
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|
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static char *via_regname[N_VIA_REGS] = { |
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"vBufB", "vBufA", "vDirB", "vDirA", |
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"vT1C", "vT1CH", "vT1L", "vT1LH", |
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"vT2C", "vT2CH", "vSR", "vACR", |
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"vPCR", "vIFR", "vIER", "(unknown)" }; |
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|
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struct adb_data { |
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int irq_nr; |
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int int_asserted; |
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|
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int kbd_dev; |
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|
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long long transfer_nr; |
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|
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uint8_t reg[N_VIA_REGS]; |
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|
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int cur_output_offset; |
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uint8_t output_buf[MAX_BUF]; |
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|
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int cur_input_offset; |
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int cur_input_length; |
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uint8_t input_buf[MAX_BUF]; |
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|
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int dir; |
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int int_enable; |
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int ack; /* last ack state */ |
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int tip; /* transfer in progress */ |
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}; |
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|
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#define DIR_INPUT 0 |
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#define DIR_OUTPUT 1 |
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|
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#define BUFB_nINTR 0x08 |
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#define BUFB_ACK 0x10 |
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#define BUFB_nTIP 0x20 |
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#define IFR_SR 0x04 |
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#define IFR_ANY 0x80 |
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#define ACR_SR_OUT 0x10 |
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|
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|
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|
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DEVICE_TICK(adb) |
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{ |
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struct adb_data *d = extra; |
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int a; |
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|
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a = d->reg[vIFR >> VIA_REG_SHIFT] & IFR_ANY; |
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if (a == IFR_ANY && d->int_enable) |
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a = 1; |
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|
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if (a) |
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cpu_interrupt(cpu, d->irq_nr); |
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else if (d->int_asserted) |
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cpu_interrupt_ack(cpu, d->irq_nr); |
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|
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d->int_asserted = a; |
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} |
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|
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|
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/* |
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* adb_reset(): |
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* |
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* Reset registers to default values. |
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*/ |
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static void adb_reset(struct adb_data *d) |
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{ |
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d->kbd_dev = 2; |
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|
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memset(d->reg, 0, sizeof(d->reg)); |
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d->reg[vBufB >> VIA_REG_SHIFT] = BUFB_nINTR | BUFB_nTIP; |
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|
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d->cur_output_offset = 0; |
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memset(d->output_buf, 0, sizeof(d->output_buf)); |
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|
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d->dir = 0; |
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d->int_enable = 0; |
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d->ack = 0; |
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d->tip = 0; |
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} |
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|
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|
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/* |
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* adb_process_cmd(): |
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* |
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* This function should be called whenever a complete ADB command has been |
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* received. |
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*/ |
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static void adb_process_cmd(struct cpu *cpu, struct adb_data *d) |
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{ |
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int i, reg, dev; |
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|
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debug("[ adb: COMMAND:"); |
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for (i=0; i<d->cur_output_offset; i++) |
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debug(" %02x", d->output_buf[i]); |
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debug(" ]\n"); |
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|
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if (d->cur_output_offset < 2) { |
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fatal("[ adb: WEIRD output length: %i ]\n", |
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d->cur_output_offset); |
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exit(1); |
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} |
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|
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switch (d->output_buf[0]) { |
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|
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case 0: /* ADB commands: */ |
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if (d->output_buf[1] == 0x00) { |
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/* Reset. */ |
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return; |
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} |
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if ((d->output_buf[1] & 0x0c) == 0x0c) { |
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/* ADBTALK: */ |
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reg = d->output_buf[1] & 3; |
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dev = d->output_buf[1] >> 4; |
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fatal("dev=%i reg=%i\n", dev, reg); |
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/* Default values: nothing here */ |
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d->input_buf[0] = 0x00; |
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d->input_buf[1] = 0x00; |
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d->input_buf[2] = d->output_buf[1]; |
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d->cur_input_length = 3; |
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if (dev == d->kbd_dev) { |
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/* Keyboard. */ |
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d->input_buf[0] = 0x01; |
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d->input_buf[1] = 0x01; |
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d->input_buf[2] = d->output_buf[1]; |
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d->input_buf[3] = 0x01; |
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d->input_buf[4] = 0x01; |
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d->cur_input_length = 5; |
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} |
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} else if ((d->output_buf[1] & 0x0c) == 0x08) { |
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int new_dev_pos = d->output_buf[2] & 15; |
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/* ADBLISTEN: */ |
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if ((d->output_buf[1] >> 4) != d->kbd_dev) { |
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fatal("[ adb: ADBLISTEN not to kbd ]\n"); |
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exit(1); |
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} |
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if (d->output_buf[3] != 0xfe || |
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(d->output_buf[2] & 0xf0) != 0x60) { |
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fatal("[ adb: unknown ADBLISTEN ]\n"); |
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exit(1); |
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} |
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/* Move device. */ |
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d->kbd_dev = new_dev_pos; |
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} else { |
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fatal("[ adb: unknown ADB command? ]\n"); |
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exit(1); |
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} |
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break; |
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|
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case 1: /* PRAM/RTC: */ |
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if (d->cur_output_offset == 3 && |
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d->output_buf[1] == 0x01 && |
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d->output_buf[2] == 0x01) { |
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/* Autopoll: */ |
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d->input_buf[0] = 0x00; |
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d->input_buf[1] = 0x00; |
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d->input_buf[2] = d->output_buf[1]; |
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d->cur_input_length = 3; |
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} else if (d->cur_output_offset == 2 && |
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d->output_buf[1] == 0x03) { |
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/* Read RTC date/time: */ |
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struct timeval tv; |
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gettimeofday(&tv, NULL); |
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d->input_buf[0] = tv.tv_sec >> 24; |
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d->input_buf[1] = tv.tv_sec >> 16; |
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d->input_buf[2] = tv.tv_sec >> 8; |
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d->input_buf[3] = tv.tv_sec; |
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d->cur_input_length = 4; |
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} else if (d->cur_output_offset == 2 && |
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d->output_buf[1] == 0x11) { |
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/* Reboot. */ |
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fatal("[ adb: reboot. TODO: make this nicer ]\n"); |
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exit(1); |
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} else { |
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fatal("[ adb: UNIMPLEMENTED PRAM/RTC command ]\n"); |
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exit(1); |
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} |
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break; |
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|
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default:fatal("[ adb: UNKNOWN command type 0x%02x ]\n", |
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d->output_buf[0]); |
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exit(1); |
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} |
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|
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d->reg[vBufB >> VIA_REG_SHIFT] &= ~BUFB_nINTR; |
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d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR; |
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d->reg[vSR >> VIA_REG_SHIFT] = 0x00; /* Dummy. */ |
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} |
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|
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|
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/* |
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* adb_transfer(): |
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* |
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* This function should be called whenever a new transfer is started, a |
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* transfer is finished, or when the next byte in a transfer should be |
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* sent/received. |
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*/ |
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static void adb_transfer(struct cpu *cpu, struct adb_data *d, int state_change) |
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{ |
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unsigned char c = 0x00; |
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|
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if (state_change) { |
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if (d->tip == 0) { |
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debug("[ adb: transfer #%lli done ]\n", |
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(long long)d->transfer_nr); |
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if (d->cur_output_offset > 0) |
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adb_process_cmd(cpu, d); |
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d->transfer_nr ++; |
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return; |
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} |
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debug("[ adb: starting transfer #%lli: %s ]\n", (long long) |
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d->transfer_nr, d->dir == DIR_INPUT? "INPUT" : "OUTPUT"); |
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d->cur_input_offset = d->cur_output_offset = 0; |
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} |
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|
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debug("[ adb: transfer #%lli: ", (long long)d->transfer_nr); |
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|
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switch (d->dir) { |
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|
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case DIR_INPUT: |
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if (d->cur_input_offset >= d->cur_input_length) |
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fatal("[ adb: INPUT beyond end of data? ]\n"); |
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else |
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c = d->input_buf[d->cur_input_offset ++]; |
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debug("input 0x%02x", c); |
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d->reg[vSR >> VIA_REG_SHIFT] = c; |
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d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR; |
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if (d->cur_input_offset >= d->cur_input_length) |
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d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR; |
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break; |
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|
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case DIR_OUTPUT: |
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c = d->reg[vSR >> VIA_REG_SHIFT]; |
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debug("output 0x%02x", c); |
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d->reg[vIFR >> VIA_REG_SHIFT] |= IFR_ANY | IFR_SR; |
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d->reg[vBufB >> VIA_REG_SHIFT] |= BUFB_nINTR; |
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d->output_buf[d->cur_output_offset ++] = c; |
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break; |
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} |
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|
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debug(" ]\n"); |
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} |
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|
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|
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DEVICE_ACCESS(adb) |
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{ |
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uint64_t idata = 0, odata = 0; |
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struct adb_data *d = extra; |
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uint8_t old = 0; |
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|
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if (writeflag == MEM_WRITE) |
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idata = memory_readmax64(cpu, data, len); |
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|
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#ifdef ADB_DEBUG |
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if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0) |
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fatal("[ adb: %s non-via register? offset 0x%x ]\n", |
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writeflag == MEM_READ? "read from" : "write to", |
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(int)relative_addr); |
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else if (writeflag == MEM_READ) |
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fatal("[ adb: read from %s: 0x%02x ]\n", |
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via_regname[relative_addr >> VIA_REG_SHIFT], |
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(int)d->reg[relative_addr >> VIA_REG_SHIFT]); |
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else |
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fatal("[ adb: write to %s: 0x%02x ]\n", via_regname[ |
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relative_addr >> VIA_REG_SHIFT], (int)idata); |
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#endif |
| 336 |
|
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if (writeflag == MEM_READ) |
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odata = d->reg[relative_addr >> VIA_REG_SHIFT]; |
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else { |
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old = d->reg[relative_addr >> VIA_REG_SHIFT]; |
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switch (relative_addr) { |
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case vIFR: |
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/* |
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* vIFR is write-ones-to-clear, and the highest bit |
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* (IFR_ANY) is set if any of the lower bits are set. |
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*/ |
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d->reg[relative_addr >> VIA_REG_SHIFT] &= ~(idata|0x80); |
| 348 |
if (d->reg[relative_addr >> VIA_REG_SHIFT] & 0x7f) |
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d->reg[relative_addr >> VIA_REG_SHIFT] |= 0x80; |
| 350 |
break; |
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default: |
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d->reg[relative_addr >> VIA_REG_SHIFT] = idata; |
| 353 |
} |
| 354 |
} |
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|
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switch (relative_addr) { |
| 357 |
|
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case vBufB: |
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/* OK */ |
| 360 |
if (writeflag == MEM_WRITE) { |
| 361 |
int old_tip = d->tip; |
| 362 |
int old_ack = d->ack; |
| 363 |
if (idata & BUFB_nINTR) |
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idata &= ~BUFB_nINTR; |
| 365 |
d->ack = 0; |
| 366 |
if (idata & BUFB_ACK) { |
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idata &= ~BUFB_ACK; |
| 368 |
d->ack = 1; |
| 369 |
} |
| 370 |
d->tip = 1; |
| 371 |
if (idata & BUFB_nTIP) { |
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idata &= ~BUFB_nTIP; |
| 373 |
d->tip = 0; |
| 374 |
} |
| 375 |
if (idata != 0) |
| 376 |
fatal("[ adb: WARNING! UNIMPLEMENTED bits in" |
| 377 |
" vBufB: 0x%02x ]\n", (int)idata); |
| 378 |
if (old_tip != d->tip) |
| 379 |
adb_transfer(cpu, d, 1); |
| 380 |
else if (old_ack != d->ack) |
| 381 |
adb_transfer(cpu, d, 0); |
| 382 |
} |
| 383 |
break; |
| 384 |
|
| 385 |
case vDirB: |
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break; |
| 387 |
|
| 388 |
case vSR: |
| 389 |
/* Clear the SR interrupt flag, if set: */ |
| 390 |
d->reg[vIFR >> VIA_REG_SHIFT] &= ~IFR_SR; |
| 391 |
break; |
| 392 |
|
| 393 |
case vACR: |
| 394 |
/* OK */ |
| 395 |
if (writeflag == MEM_WRITE) { |
| 396 |
if (idata & ACR_SR_OUT) |
| 397 |
d->dir = DIR_OUTPUT; |
| 398 |
else |
| 399 |
d->dir = DIR_INPUT; |
| 400 |
} |
| 401 |
break; |
| 402 |
|
| 403 |
case vIFR: |
| 404 |
/* OK */ |
| 405 |
break; |
| 406 |
|
| 407 |
case vIER: |
| 408 |
/* OK */ |
| 409 |
if (writeflag == MEM_WRITE) { |
| 410 |
d->int_enable = idata & 0x80? 1 : 0; |
| 411 |
if (idata != 0x04 && idata != 0x84) |
| 412 |
fatal("[ adb: WARNING! vIER value 0x%x is" |
| 413 |
" UNKNOWN ]\n", (int)idata); |
| 414 |
} |
| 415 |
break; |
| 416 |
|
| 417 |
default:if ((relative_addr & ((1 << VIA_REG_SHIFT) - 1)) != 0) |
| 418 |
fatal("[ adb: %s non-via register? offset 0x%x ]\n", |
| 419 |
writeflag == MEM_READ? "read from" : "write to", |
| 420 |
(int)relative_addr); |
| 421 |
else if (writeflag == MEM_READ) |
| 422 |
fatal("[ adb: READ from UNIMPLEMENTED %s ]\n", |
| 423 |
via_regname[relative_addr >> VIA_REG_SHIFT]); |
| 424 |
else |
| 425 |
fatal("[ adb: WRITE to UNIMPLEMENTED %s: 0x%x ]\n", |
| 426 |
via_regname[relative_addr >> VIA_REG_SHIFT], |
| 427 |
(int)idata); |
| 428 |
exit(1); |
| 429 |
} |
| 430 |
|
| 431 |
if (writeflag == MEM_READ) |
| 432 |
memory_writemax64(cpu, data, len, odata); |
| 433 |
|
| 434 |
return 1; |
| 435 |
} |
| 436 |
|
| 437 |
|
| 438 |
DEVINIT(adb) |
| 439 |
{ |
| 440 |
struct adb_data *d = malloc(sizeof(struct adb_data)); |
| 441 |
|
| 442 |
if (d == NULL) { |
| 443 |
fprintf(stderr, "out of memory\n"); |
| 444 |
exit(1); |
| 445 |
} |
| 446 |
memset(d, 0, sizeof(struct adb_data)); |
| 447 |
d->irq_nr = devinit->irq_nr; |
| 448 |
|
| 449 |
adb_reset(d); |
| 450 |
|
| 451 |
memory_device_register(devinit->machine->memory, devinit->name, |
| 452 |
devinit->addr, DEV_ADB_LENGTH, dev_adb_access, d, DM_DEFAULT, NULL); |
| 453 |
machine_add_tickfunction(devinit->machine, dev_adb_tick, d, |
| 454 |
TICK_SHIFT, 0.0); |
| 455 |
|
| 456 |
return 1; |
| 457 |
} |
| 458 |
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