25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: dev_8259.c,v 1.9 2005/06/02 17:11:35 debug Exp $ |
* $Id: dev_8259.c,v 1.22 2005/11/23 18:16:42 debug Exp $ |
29 |
* |
* |
30 |
* 8259 Programmable Interrupt Controller. |
* 8259 Programmable Interrupt Controller. |
31 |
* |
* |
32 |
* This is mostly bogus. TODO. See the following URL for more details: |
* See the following URL for more details: |
33 |
* http://www.nondot.org/sabre/os/files/MiscHW/8259pic.txt |
* http://www.nondot.org/sabre/os/files/MiscHW/8259pic.txt |
34 |
*/ |
*/ |
35 |
|
|
48 |
|
|
49 |
#define DEV_8259_LENGTH 2 |
#define DEV_8259_LENGTH 2 |
50 |
|
|
51 |
|
/* #define DEV_8259_DEBUG */ |
52 |
|
|
53 |
|
|
54 |
/* |
/* |
55 |
* dev_8259_access(): |
* dev_8259_access(): |
60 |
{ |
{ |
61 |
struct pic8259_data *d = (struct pic8259_data *) extra; |
struct pic8259_data *d = (struct pic8259_data *) extra; |
62 |
uint64_t idata = 0, odata = 0; |
uint64_t idata = 0, odata = 0; |
63 |
|
int i; |
64 |
|
|
65 |
|
if (writeflag == MEM_WRITE) |
66 |
|
idata = memory_readmax64(cpu, data, len); |
67 |
|
|
68 |
idata = memory_readmax64(cpu, data, len); |
#ifdef DEV_8259_DEBUG |
69 |
|
if (writeflag == MEM_READ) |
70 |
|
fatal("[ 8259: read from 0x%x ]\n", (int)relative_addr); |
71 |
|
else |
72 |
|
fatal("[ 8259: write to 0x%x: 0x%x ]\n", |
73 |
|
(int)relative_addr, (int)idata); |
74 |
|
#endif |
75 |
|
|
76 |
switch (relative_addr) { |
switch (relative_addr) { |
77 |
case 0x00: |
case 0x00: |
85 |
fatal("[ 8259: WARNING: Bit 2 set ]\n"); |
fatal("[ 8259: WARNING: Bit 2 set ]\n"); |
86 |
/* Bit 1: 0=cascade, 1=single */ |
/* Bit 1: 0=cascade, 1=single */ |
87 |
/* Bit 0: 1=4th init byte */ |
/* Bit 0: 1=4th init byte */ |
88 |
if (!(idata & 0x01)) |
/* This happens on non-x86 systems: |
89 |
|
if (!(idata & 0x01)) |
90 |
fatal("[ 8259: WARNING: Bit 0 NOT set!" |
fatal("[ 8259: WARNING: Bit 0 NOT set!" |
91 |
"!! ]\n"); |
"!! ]\n"); */ |
92 |
d->init_state = 1; |
d->init_state = 1; |
93 |
break; |
break; |
94 |
} |
} |
100 |
" it was aborted? ]\n"); |
" it was aborted? ]\n"); |
101 |
d->init_state = 0; |
d->init_state = 0; |
102 |
|
|
103 |
switch (idata) { |
if (idata == 0x0a) { |
|
case 0x0a: |
|
104 |
d->current_command = 0x0a; |
d->current_command = 0x0a; |
105 |
break; |
} else if (idata == 0x0b) { |
|
case 0x0b: |
|
106 |
d->current_command = 0x0b; |
d->current_command = 0x0b; |
107 |
break; |
} else if (idata == 0x0c) { |
108 |
case 0x20: /* End Of Interrupt */ |
/* Put Master in Buffered Mode */ |
109 |
|
d->current_command = 0x0c; |
110 |
|
} else if (idata == 0x20) { |
111 |
|
int old_irr = d->irr; |
112 |
|
/* End Of Interrupt */ |
113 |
|
/* TODO: in buffered mode, is this an EOI 0? */ |
114 |
d->irr &= ~d->isr; |
d->irr &= ~d->isr; |
115 |
d->isr = 0; |
d->isr = 0; |
116 |
/* Recalculate interrupt assertions: */ |
/* Recalculate interrupt assertions, |
117 |
cpu_interrupt(cpu, 16); |
if necessary: */ |
118 |
break; |
if ((old_irr & ~d->ier) != (d->irr & ~d->ier)) |
119 |
case 0x60: |
cpu_interrupt(cpu, d->irq_nr); |
120 |
case 0x61: |
} else if ((idata >= 0x21 && idata <= 0x27) || |
121 |
case 0x62: |
(idata >= 0x60 && idata <= 0x67) || |
122 |
case 0x63: |
(idata >= 0xe0 && idata <= 0xe7)) { |
123 |
case 0x64: |
/* Specific EOI */ |
124 |
case 0x65: |
int old_irr = d->irr; |
|
case 0x66: |
|
|
case 0x67: /* Specific EOI */ |
|
125 |
d->irr &= ~(1 << (idata & 7)); |
d->irr &= ~(1 << (idata & 7)); |
126 |
d->isr &= ~(1 << (idata & 7)); |
d->isr &= ~(1 << (idata & 7)); |
127 |
/* Recalculate interrupt assertions: */ |
/* Recalc. int assertions, if necessary: */ |
128 |
cpu_interrupt(cpu, 16); |
if ((old_irr & ~d->ier) != (d->irr & ~d->ier)) |
129 |
break; |
cpu_interrupt(cpu, d->irq_nr); |
130 |
case 0x68: /* Set Special Mask Mode */ |
} else if (idata == 0x68) { |
131 |
|
/* Set Special Mask Mode */ |
132 |
/* TODO */ |
/* TODO */ |
133 |
break; |
} else if (idata >= 0xc0 && idata <= 0xc7) { |
134 |
case 0xc0: |
/* Set IRQ Priority Order */ |
|
case 0xc1: |
|
|
case 0xc2: |
|
|
case 0xc3: |
|
|
case 0xc4: |
|
|
case 0xc5: |
|
|
case 0xc6: |
|
|
case 0xc7: /* Set IRQ Priority Order */ |
|
135 |
/* TODO */ |
/* TODO */ |
136 |
break; |
} else { |
|
default: |
|
137 |
fatal("[ 8259: unimplemented command 0x%02x" |
fatal("[ 8259: unimplemented command 0x%02x" |
138 |
" ]\n", idata); |
" ]\n", (int)idata); |
139 |
cpu->running = 0; |
cpu->running = 0; |
140 |
} |
} |
141 |
} else { |
} else { |
146 |
case 0x0b: |
case 0x0b: |
147 |
odata = d->isr; |
odata = d->isr; |
148 |
break; |
break; |
149 |
|
case 0x0c: |
150 |
|
/* Buffered mode. */ |
151 |
|
odata = 0x00; |
152 |
|
for (i=0; i<8; i++) |
153 |
|
if ((d->irr >> i) & 1) { |
154 |
|
odata = 0x80 | i; |
155 |
|
break; |
156 |
|
} |
157 |
|
break; |
158 |
default: |
default: |
159 |
fatal("[ 8259: unimplemented command 0x%02x" |
odata = 0x00; |
160 |
" while reading ]\n", d->current_command); |
for (i=0; i<8; i++) |
161 |
cpu->running = 0; |
if ((d->irr >> i) & 1) { |
162 |
|
odata = 0x80 | i; |
163 |
|
break; |
164 |
|
} |
165 |
|
break; |
166 |
|
/* |
167 |
|
* TODO: The "default" label should really do |
168 |
|
* something like this: |
169 |
|
* |
170 |
|
* fatal("[ 8259: unimplemented command 0x%02x" |
171 |
|
* " while reading ]\n", d->current_command); |
172 |
|
* cpu->running = 0; |
173 |
|
* |
174 |
|
* but Linux seems to read from the secondary PIC |
175 |
|
* in a manner which works better the way things |
176 |
|
* are coded right now. |
177 |
|
*/ |
178 |
} |
} |
179 |
} |
} |
180 |
break; |
break; |
182 |
if (d->init_state > 0) { |
if (d->init_state > 0) { |
183 |
if (d->init_state == 1) { |
if (d->init_state == 1) { |
184 |
d->irq_base = idata & 0xf8; |
d->irq_base = idata & 0xf8; |
185 |
if (idata & 7) |
/* This happens on non-x86 machines: |
186 |
|
if (idata & 7) |
187 |
fatal("[ 8259: WARNING! Lowest" |
fatal("[ 8259: WARNING! Lowest" |
188 |
" bits in Init Cmd 1 are" |
" bits in Init Cmd 1 are" |
189 |
" non-zero! ]\n"); |
" non-zero! ]\n"); */ |
190 |
d->init_state = 2; |
d->init_state = 2; |
191 |
} else if (d->init_state == 2) { |
} else if (d->init_state == 2) { |
192 |
/* Slave attachment. TODO */ |
/* Slave attachment. TODO */ |
193 |
d->init_state = 3; |
d->init_state = 3; |
194 |
} else if (d->init_state == 3) { |
} else if (d->init_state == 3) { |
195 |
if (idata & 0x02) |
if (idata & 0x02) { |
196 |
fatal("[ 8259: WARNING! Bit 1 i" |
/* Should not be set in PCs, but |
197 |
|
on CATS, for example, it is set. */ |
198 |
|
debug("[ 8259: WARNING! Bit 1 i" |
199 |
"n Init Cmd 4 is set! ]\n"); |
"n Init Cmd 4 is set! ]\n"); |
200 |
|
} |
201 |
if (!(idata & 0x01)) |
if (!(idata & 0x01)) |
202 |
fatal("[ 8259: WARNING! Bit 0 " |
fatal("[ 8259: WARNING! Bit 0 " |
203 |
"in Init Cmd 4 is not" |
"in Init Cmd 4 is not" |
208 |
} |
} |
209 |
|
|
210 |
if (writeflag == MEM_WRITE) { |
if (writeflag == MEM_WRITE) { |
211 |
|
int old_ier = d->ier; |
212 |
d->ier = idata; |
d->ier = idata; |
213 |
/* Recalculate interrupt assertions: */ |
|
214 |
cpu_interrupt(cpu, 16); |
/* Recalculate interrupt assertions, |
215 |
|
if necessary: */ |
216 |
|
if ((d->irr & ~old_ier) != (d->irr & ~d->ier)) |
217 |
|
cpu_interrupt(cpu, d->irq_nr); |
218 |
} else { |
} else { |
219 |
odata = d->ier; |
odata = d->ier; |
220 |
} |
} |
240 |
|
|
241 |
/* |
/* |
242 |
* devinit_8259(): |
* devinit_8259(): |
243 |
|
* |
244 |
|
* Initialize an 8259 PIC. Important notes: |
245 |
|
* |
246 |
|
* x) Most systems use _TWO_ 8259 PICs. These should be registered |
247 |
|
* as separate devices. |
248 |
|
* |
249 |
|
* x) The irq number specified is the number used to re-calculate |
250 |
|
* CPU interrupt assertions. It is _not_ the irq number at |
251 |
|
* which the PIC is connected. (That is left to machine specific |
252 |
|
* code in src/machine.c.) |
253 |
*/ |
*/ |
254 |
int devinit_8259(struct devinit *devinit) |
int devinit_8259(struct devinit *devinit) |
255 |
{ |
{ |
256 |
struct pic8259_data *d = malloc(sizeof(struct pic8259_data)); |
struct pic8259_data *d = malloc(sizeof(struct pic8259_data)); |
257 |
char *name2; |
char *name2; |
258 |
int nlen = 40; |
size_t nlen = strlen(devinit->name) + 20; |
259 |
|
|
260 |
if (d == NULL) { |
if (d == NULL) { |
261 |
fprintf(stderr, "out of memory\n"); |
fprintf(stderr, "out of memory\n"); |
266 |
|
|
267 |
name2 = malloc(nlen); |
name2 = malloc(nlen); |
268 |
snprintf(name2, nlen, "%s", devinit->name); |
snprintf(name2, nlen, "%s", devinit->name); |
269 |
if ((devinit->addr & 0xfff) == 0xa0) |
if ((devinit->addr & 0xfff) == 0xa0) { |
270 |
strcat(name2, " [secondary]"); |
strlcat(name2, " [secondary]", nlen); |
271 |
|
d->irq_base = 8; |
272 |
|
} |
273 |
|
|
274 |
memory_device_register(devinit->machine->memory, name2, |
memory_device_register(devinit->machine->memory, name2, |
275 |
devinit->addr, DEV_8259_LENGTH, dev_8259_access, (void *)d, |
devinit->addr, DEV_8259_LENGTH, dev_8259_access, d, |
276 |
MEM_DEFAULT, NULL); |
DM_DEFAULT, NULL); |
277 |
|
|
278 |
devinit->return_ptr = d; |
devinit->return_ptr = d; |
279 |
return 1; |
return 1; |