25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: bus_pci.c,v 1.62 2006/02/18 21:03:12 debug Exp $ |
* $Id: bus_pci.c,v 1.65 2006/05/10 03:32:32 debug Exp $ |
29 |
* |
* |
30 |
* Generic PCI bus framework. This is not a normal "device", but is used by |
* Generic PCI bus framework. This is not a normal "device", but is used by |
31 |
* individual PCI controllers and devices. |
* individual PCI controllers and devices. |
60 |
extern int verbose; |
extern int verbose; |
61 |
|
|
62 |
|
|
63 |
/* #define debug fatal */ |
#ifdef UNSTABLE_DEVEL |
64 |
|
#define debug fatal |
65 |
|
#endif |
66 |
|
|
67 |
|
|
68 |
/* |
/* |
166 |
pci_data->last_was_write_ffffffff = 0; |
pci_data->last_was_write_ffffffff = 0; |
167 |
|
|
168 |
debug("[ bus_pci: read from PCI DATA, bus %i, device " |
debug("[ bus_pci: read from PCI DATA, bus %i, device " |
169 |
"%i, function %i (%s) register 0x%02x: 0x%08lx ]\n", (long) |
"%i, function %i (%s) register 0x%02x: (len=%i) 0x%08lx ]\n", |
170 |
pci_data->cur_bus, pci_data->cur_device, |
pci_data->cur_bus, pci_data->cur_device, pci_data->cur_func, |
171 |
pci_data->cur_func, dev->name, pci_data->cur_reg, (long)*data); |
dev->name, pci_data->cur_reg, len, (long)*data); |
172 |
} |
} |
173 |
|
|
174 |
|
|
288 |
PCI_SET_DATA(PCI_MAPREG_START + pd->cur_mapreg_offset, |
PCI_SET_DATA(PCI_MAPREG_START + pd->cur_mapreg_offset, |
289 |
port | PCI_MAPREG_TYPE_IO); |
port | PCI_MAPREG_TYPE_IO); |
290 |
PCI_SET_DATA_SIZE(PCI_MAPREG_START + pd->cur_mapreg_offset, |
PCI_SET_DATA_SIZE(PCI_MAPREG_START + pd->cur_mapreg_offset, |
291 |
portsize - 1); |
((portsize - 1) & ~0xf) | 0xd); |
292 |
pd->cur_mapreg_offset += sizeof(uint32_t); |
pd->cur_mapreg_offset += sizeof(uint32_t); |
293 |
} |
} |
294 |
|
|
299 |
pd->pcibus->cur_pci_membase = mem; |
pd->pcibus->cur_pci_membase = mem; |
300 |
PCI_SET_DATA(PCI_MAPREG_START + pd->cur_mapreg_offset, mem); |
PCI_SET_DATA(PCI_MAPREG_START + pd->cur_mapreg_offset, mem); |
301 |
PCI_SET_DATA_SIZE(PCI_MAPREG_START + pd->cur_mapreg_offset, |
PCI_SET_DATA_SIZE(PCI_MAPREG_START + pd->cur_mapreg_offset, |
302 |
memsize - 1); |
((memsize - 1) & ~0xf) | 0x0); |
303 |
pd->cur_mapreg_offset += sizeof(uint32_t); |
pd->cur_mapreg_offset += sizeof(uint32_t); |
304 |
} |
} |
305 |
|
|
646 |
PCIINIT(i31244) |
PCIINIT(i31244) |
647 |
{ |
{ |
648 |
uint64_t port, memaddr; |
uint64_t port, memaddr; |
649 |
|
int irq = 0; |
650 |
|
|
651 |
PCI_SET_DATA(PCI_ID_REG, PCI_ID_CODE(PCI_VENDOR_INTEL, |
PCI_SET_DATA(PCI_ID_REG, PCI_ID_CODE(PCI_VENDOR_INTEL, |
652 |
PCI_PRODUCT_INTEL_31244)); |
PCI_PRODUCT_INTEL_31244)); |
656 |
|
|
657 |
switch (machine->machine_type) { |
switch (machine->machine_type) { |
658 |
case MACHINE_IQ80321: |
case MACHINE_IQ80321: |
659 |
/* S-PCI-X slot uses PCI IRQ A */ |
/* S-PCI-X slot uses PCI IRQ A, int 29 */ |
660 |
|
irq = (1 << 8) + 29; |
661 |
break; |
break; |
662 |
default:fatal("i31244 in non-implemented machine type %i\n", |
default:fatal("i31244 in non-implemented machine type %i\n", |
663 |
machine->machine_type); |
machine->machine_type); |
664 |
exit(1); |
exit(1); |
665 |
} |
} |
666 |
|
|
667 |
PCI_SET_DATA(PCI_INTERRUPT_REG, 0x28140100); |
PCI_SET_DATA(PCI_INTERRUPT_REG, 0x01100000 | irq); |
668 |
|
|
669 |
allocate_device_space(pd, 0x400, 0, &port, &memaddr); |
allocate_device_space(pd, 0x1000, 0, &port, &memaddr); |
670 |
allocate_device_space(pd, 0x400, 0, &port, &memaddr); |
allocate_device_space(pd, 0x1000, 0, &port, &memaddr); |
671 |
|
|
672 |
/* PCI IDE using dev_wdc: */ |
/* PCI IDE using dev_wdc: */ |
673 |
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |
if (diskimage_exist(machine, 0, DISKIMAGE_IDE) || |