/[gxemul]/trunk/src/devices/bus_pci.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
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Annotation of /trunk/src/devices/bus_pci.c

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Revision 14 - (hide annotations)
Mon Oct 8 16:18:51 2007 UTC (16 years, 6 months ago) by dpavlin
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File size: 6483 byte(s)
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.982 2005/10/07 22:45:32 debug Exp $
20050816	Some success in decoding the way the SGI O2 PROM draws graphics
		during bootup; lines/rectangles and bitmaps work, enough to
		show the bootlogo etc. :-)
		Adding more PPC instructions, and (dummy) BAT registers.
20050817	Updating the pckbc to support scancode type 3 keyboards
		(required in order to interact with the SGI O2 PROM).
		Adding more PPC instructions.
20050818	Adding more ARM instructions; general register forms.
		Importing armreg.h from NetBSD (ARM cpu ids). Adding a (dummy)
		CATS machine mode (using SA110 as the default CPU).
		Continuing on general dyntrans related stuff.
20050819	Register forms for ARM load/stores. Gaah! The Compaq C Compiler
		bug is triggered for ARM loads as well, not just PPC :-(
		Adding full support for ARM PC-relative load/stores, and load/
		stores where the PC register is the destination register.
		Adding support for ARM a.out binaries.
20050820	Continuing to add more ARM instructions, and correcting some
		bugs. Continuing on CATS emulation.
		More work on the PPC stuff.
20050821	Minor PPC and ARM updates. Adding more machine types.
20050822	All ARM "data processing instructions" are now generated
		automatically.
20050824	Beginning the work on the ARM system control coprocessor.
		Adding support for ARM halfword load/stores, and signed loads.
20050825	Fixing an important bug related to the ARM condition codes.
		OpenBSD/zaurus and NetBSD/netwinder now print some boot
		messages. :)
		Adding a dummy SH (Hitachi SuperH) cpu family.
		Beginning to add some ARM virtual address translation.
		MIPS bugfixes: unaligned PC now cause an ADEL exception (at
		least for non-bintrans execution), and ADEL/ADES (not
		TLBL/TLBS) are used if userland tries to access kernel space.
		(Thanks to Joshua Wise for making me aware of these bugs.)
20050827	More work on the ARM emulation, and various other updates.
20050828	More ARM updates.
		Finally taking the time to work on translation invalidation
		(i.e. invalidating translated code mappings when memory is
		written to). Hopefully this doesn't break anything.
20050829	Moving CPU related files from src/ to a new subdir, src/cpus/.
		Moving PROM emulation stuff from src/ to src/promemul/.
		Better debug instruction trace for ARM loads and stores.
20050830	Various ARM updates (correcting CMP flag calculation, etc).
20050831	PPC instruction updates. (Flag fixes, etc.)
20050901	Various minor PPC and ARM instruction emulation updates.
		Minor OpenFirmware emulation updates.
20050903	Adding support for adding arbitrary ARM coprocessors (with
		the i80321 I/O coprocessor as a first test).
		Various other ARM and PPC updates.
20050904	Adding some SHcompact disassembly routines.
20050907	(Re)adding a dummy HPPA CPU module, and a dummy i960 module.
20050908	Began hacking on some Apple Partition Table support.
20050909	Adding support for loading Mach-O (Darwin PPC) binaries.
20050910	Fixing an ARM bug (Carry flag was incorrectly updated for some
		data processing instructions); OpenBSD/cats and NetBSD/
		netwinder get quite a bit further now.
		Applying a patch to dev_wdc, and a one-liner to dev_pcic, to
		make them work better when emulating new versions of OpenBSD.
		(Thanks to Alexander Yurchenko for the patches.)
		Also doing some other minor updates to dev_wdc. (Some cleanup,
		and finally converting to devinit, etc.)
20050912	IRIX doesn't have u_int64_t by default (noticed by Andreas
		<avr@gnulinux.nl>); configure updated to reflect this.
		Working on ARM register bank switching, CPSR vs SPSR issues,
		and beginning the work on interrupt/exception support.
20050913	Various minor ARM updates (speeding up load/store multiple,
		and fixing a ROR bug in R(); NetBSD/cats now boots as far as
		OpenBSD/cats).
20050917	Adding a dummy Atmel AVR (8-bit) cpu family skeleton.
20050918	Various minor updates.
20050919	Symbols are now loaded from Mach-O executables.
		Continuing the work on adding ARM exception support.
20050920	More work on ARM stuff: OpenBSD/cats and NetBSD/cats reach
		userland! :-)
20050921	Some more progress on ARM interrupt specifics.
20050923	Fixing linesize for VR4121 (patch by Yurchenko). Also fixing
		linesizes/cachesizes for some other VR4xxx.
		Adding a dummy Acer Labs M1543 PCI-ISA bridge (for CATS) and a
		dummy Symphony Labs 83C553 bridge (for Netwinder), usable by 
		dev_footbridge.
20050924	Some PPC progress.
20050925	More PPC progress.
20050926	PPC progress (fixing some bugs etc); Darwin's kernel gets
		slightly further than before.
20050928	Various updates: footbridge/ISA/pciide stuff, and finally
		fixing the VGA text scroll-by-changing-the-base-offset bug.
20050930	Adding a dummy S3 ViRGE pci card for CATS emulation, which
		both NetBSD and OpenBSD detects as VGA.
		Continuing on Footbridge (timers, ISA interrupt stuff).
20051001	Continuing... there are still bugs, probably interrupt-
		related.
20051002	More work on the Footbridge (interrupt stuff).
20051003	Various minor updates. (Trying to find the bug(s).)
20051004	Continuing on the ARM stuff.
20051005	More ARM-related fixes.
20051007	FINALLY! Found and fixed 2 ARM bugs: 1 memory related, and the
		other was because of an error in the ARM manual (load multiple
		with the S-bit set should _NOT_ load usermode registers, as the
		manual says, but it should load saved registers, which may or
		may not happen to be usermode registers).
		NetBSD/cats and OpenBSD/cats seem to install fine now :-)
		except for a minor bug at the end of the OpenBSD/cats install.
		Updating the documentation, preparing for the next release.
20051008	Continuing with release testing and cleanup.

1 dpavlin 4 /*
2     * Copyright (C) 2004-2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 14 * $Id: bus_pci.c,v 1.12 2005/09/27 23:18:32 debug Exp $
29 dpavlin 4 *
30     * This is a generic PCI bus device, used by even lower level devices.
31     * For example, the "gt" device used in Cobalt machines contains a PCI
32     * device.
33     *
34     * TODO: This more or less just a dummy bus device, so far.
35     */
36    
37     #include <stdio.h>
38     #include <stdlib.h>
39     #include <string.h>
40    
41     #include "memory.h"
42     #include "misc.h"
43    
44     #include "bus_pci.h"
45    
46 dpavlin 14 /* #define debug fatal */
47 dpavlin 4
48 dpavlin 14
49 dpavlin 4 /*
50     * bus_pci_access():
51     *
52     * relative_addr should be either BUS_PCI_ADDR or BUS_PCI_DATA. The uint64_t
53     * pointed to by data should contain the word to be written to the pci bus,
54     * or a placeholder for information read from the bus.
55     *
56     * Returns 1 if ok, 0 on error.
57     */
58     int bus_pci_access(struct cpu *cpu, struct memory *mem, uint64_t relative_addr,
59     uint64_t *data, int writeflag, struct pci_data *pci_data)
60     {
61     struct pci_device *dev, *found;
62     int bus, device, function, registernr;
63    
64     if (writeflag == MEM_READ)
65     *data = 0;
66    
67     switch (relative_addr) {
68     case BUS_PCI_ADDR:
69     if (writeflag == MEM_WRITE) {
70     debug("[ bus_pci: write to PCI ADDR: data = 0x%016llx"
71     " ]\n", (long long)*data);
72     pci_data->pci_addr = *data;
73     } else {
74     debug("[ bus_pci: read from PCI ADDR (data = "
75     "0x%016llx) ]\n", (long long)pci_data->pci_addr);
76     *data = pci_data->pci_addr;
77     }
78     break;
79     case BUS_PCI_DATA:
80     if (writeflag == MEM_WRITE) {
81     debug("[ bus_pci: write to PCI DATA: data = "
82     "0x%016llx ]\n", (long long)*data);
83     if (*data == 0xffffffffULL)
84     pci_data->last_was_write_ffffffff = 1;
85     } else {
86     /* Get the bus, device, and function numbers from
87     the address: */
88     bus = (pci_data->pci_addr >> 16) & 0xff;
89     device = (pci_data->pci_addr >> 11) & 0x1f;
90     function = (pci_data->pci_addr >> 8) & 0x7;
91     registernr = (pci_data->pci_addr) & 0xff;
92    
93     /* Scan through the list of pci_device entries. */
94     dev = pci_data->first_device;
95     found = NULL;
96    
97     while (dev != NULL && found == NULL) {
98     if (dev->bus == bus &&
99     dev->function == function &&
100     dev->device == device)
101     found = dev;
102     dev = dev->next;
103     }
104    
105     if (found == NULL) {
106     if ((pci_data->pci_addr & 0xff) == 0)
107     *data = 0xffffffff;
108     else
109     *data = 0;
110     return 1;
111     }
112    
113     *data = 0;
114    
115     if (pci_data->last_was_write_ffffffff &&
116     registernr >= 0x10 && registernr <= 0x24) {
117     /* TODO: real length!!! */
118     *data = 0x00400000 - 1;
119     } else if (found->read_register != NULL)
120     *data = found->read_register(registernr);
121    
122     pci_data->last_was_write_ffffffff = 0;
123    
124     debug("[ bus_pci: read from PCI DATA, addr = 0x%08lx "
125     "(bus %i, device %i, function %i, register "
126     "0x%02x): 0x%08lx ]\n", (long)pci_data->pci_addr,
127     bus, device, function, registernr, (long)*data);
128     }
129    
130     break;
131     default:
132     if (writeflag==MEM_READ) {
133     debug("[ bus_pci: read from unimplemented addr "
134     "0x%x ]\n", (int)relative_addr);
135     *data = 0;
136     } else {
137     debug("[ bus_pci: write to unimplemented addr "
138     "0x%x:", (int)relative_addr);
139     }
140     }
141    
142     return 1;
143     }
144    
145    
146     /*
147     * bus_pci_add():
148     *
149     * Add a PCI device to a bus_pci device.
150     */
151     void bus_pci_add(struct machine *machine, struct pci_data *pci_data,
152     struct memory *mem, int bus, int device, int function,
153     void (*init)(struct machine *, struct memory *),
154     uint32_t (*read_register)(int reg))
155     {
156     struct pci_device *new_device;
157    
158 dpavlin 14 if (pci_data == NULL) {
159     fatal("bus_pci_add(): pci_data == NULL!\n");
160     exit(1);
161     }
162    
163 dpavlin 4 /* Make sure this bus/device/function number isn't already in use: */
164     new_device = pci_data->first_device;
165     while (new_device != NULL) {
166     if (new_device->bus == bus &&
167     new_device->device == device &&
168     new_device->function == function) {
169     fatal("bus_pci_add(): (bus %i, device %i, function"
170     " %i) already in use\n", bus, device, function);
171     return;
172     }
173     new_device = new_device->next;
174     }
175    
176     new_device = malloc(sizeof(struct pci_device));
177     if (new_device == NULL) {
178     fprintf(stderr, "out of memory\n");
179     exit(1);
180     }
181    
182     memset(new_device, 0, sizeof(struct pci_device));
183     new_device->bus = bus;
184     new_device->device = device;
185     new_device->function = function;
186     new_device->init = init;
187     new_device->read_register = read_register;
188    
189     /* Add the new device first in the PCI bus' chain: */
190     new_device->next = pci_data->first_device;
191     pci_data->first_device = new_device;
192    
193     /* Call the PCI device' init function: */
194     if (init != NULL)
195     init(machine, mem);
196     }
197    
198    
199     /*
200     * bus_pci_init():
201     *
202     * This doesn't register a device, but instead returns a pointer to a struct
203     * which should be passed to bus_pci_access() when accessing the PCI bus.
204     */
205     struct pci_data *bus_pci_init(int irq_nr)
206     {
207     struct pci_data *d;
208    
209     d = malloc(sizeof(struct pci_data));
210     if (d == NULL) {
211     fprintf(stderr, "out of memory\n");
212     exit(1);
213     }
214     memset(d, 0, sizeof(struct pci_data));
215     d->irq_nr = irq_nr;
216    
217     return d;
218     }
219    

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