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/* |
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* Copyright (C) 2005 Anders Gavare. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. The name of the author may not be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* |
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* $Id: memory_x86.c,v 1.3 2006/06/24 21:47:23 debug Exp $ |
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* |
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* Included from cpu_x86.c. |
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* |
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* |
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* TODO: This is basically just a skeleton so far. |
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*/ |
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|
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|
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/* |
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* translate_v2p(): |
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* |
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* Return values: |
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* 0 Failure |
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* 1 Success, the page is readable only |
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* 2 Success, the page is read/write |
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*/ |
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int TRANSLATE_ADDRESS(struct cpu *cpu, uint64_t vaddr, |
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uint64_t *return_addr, int flags) |
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{ |
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unsigned char pded[4]; |
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unsigned char pted[4]; |
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uint64_t table_addr; |
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uint32_t pte=0, pde=0; |
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int a, b, res, writable, usermode = 0; |
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int writeflag = flags & FLAG_WRITEFLAG? MEM_WRITE : MEM_READ; |
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int no_exceptions = flags & FLAG_NOEXCEPTIONS; |
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int no_segmentation = flags & NO_SEGMENTATION; |
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struct descriptor_cache *dc; |
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|
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if (cpu->cd.x86.cursegment < 0 || cpu->cd.x86.cursegment >= 8) { |
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fatal("TODO: Weird x86 segment nr %i\n", |
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cpu->cd.x86.cursegment); |
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cpu->running = 0; |
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return 0; |
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} |
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|
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if ((vaddr >> 32) == 0xffffffff) |
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vaddr &= 0xffffffff; |
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|
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dc = &cpu->cd.x86.descr_cache[cpu->cd.x86.cursegment & 7]; |
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|
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if (no_segmentation) { |
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/* linear address */ |
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writable = 1; |
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} else { |
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if (PROTECTED_MODE && vaddr > dc->limit) { |
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fatal("TODO: vaddr=0x%"PRIx64" > limit (0x%"PRIx64")\n", |
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(uint64_t) vaddr, (uint64_t) dc->limit); |
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/* goto fail; */ |
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} |
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|
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/* TODO: Check the Privilege Level */ |
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vaddr = (vaddr + dc->base) & 0xffffffff; |
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writable = dc->writable; |
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} |
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|
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usermode = (cpu->cd.x86.s[X86_S_CS] & X86_PL_MASK) == |
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X86_RING3; |
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|
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/* Paging: */ |
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if (cpu->cd.x86.cr[0] & X86_CR0_PG) { |
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/* TODO: This should be cached somewhere, in some |
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kind of simulated TLB. */ |
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if (cpu->cd.x86.cr[3] & 0xfff) { |
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fatal("TODO: cr3=%016"PRIx64" (lowest bits non-zero)\n", |
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(uint64_t) cpu->cd.x86.cr[3]); |
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goto fail; |
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} |
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|
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a = (vaddr >> 22) & 1023; |
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b = (vaddr >> 12) & 1023; |
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/* fatal("vaddr = 0x%08x ==> %i, %i\n", (int)vaddr, a, b); */ |
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|
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/* Read the Page Directory Entry: */ |
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table_addr = cpu->cd.x86.cr[3] & ~0xfff; |
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if (table_addr == 0) |
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fatal("WARNING: The page directory (cr3) is at" |
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" physical address 0 (?)\n"); |
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res = cpu->memory_rw(cpu, cpu->mem, table_addr + 4*a, pded, |
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sizeof(pded), MEM_READ, PHYSICAL); |
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if (!res) { |
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fatal("TODO: could not read pde (table = 0x%"PRIx64 |
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")\n", (uint64_t) table_addr); |
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goto fail; |
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} |
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if ((pded[0] & 0x01) && !(pded[0] & 0x20)) { |
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pded[0] |= 0x20; |
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cpu->memory_rw(cpu, cpu->mem, table_addr + 4*a, pded, |
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sizeof(pded), MEM_WRITE, PHYSICAL); |
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} |
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if ((pded[0] & 0x01) && writeflag == MEM_WRITE && |
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!(pded[0] & 0x40)) { |
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pded[0] |= 0x40; |
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cpu->memory_rw(cpu, cpu->mem, table_addr + 4*a, pded, |
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sizeof(pded), MEM_WRITE, PHYSICAL); |
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} |
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pde = pded[0] + (pded[1] << 8) + (pded[2] << 16) + |
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(pded[3] << 24); |
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/* fatal(" pde: 0x%08x\n", (int)pde); */ |
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/* TODO: lowest bits of the pde */ |
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if (!(pde & 0x01)) { |
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fatal("PAGE FAULT: pde not present: vaddr=0x%08x, " |
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"usermode=%i\n", (int)vaddr, usermode); |
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fatal(" CS:EIP = 0x%04x:0x%016"PRIx64"\n", |
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(int) cpu->cd.x86.s[X86_S_CS], (uint64_t) cpu->pc); |
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if (!no_exceptions) { |
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cpu->cd.x86.cr[2] = vaddr; |
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x86_interrupt(cpu, 14, (writeflag? 2 : 0) + |
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(usermode? 4 : 0)); |
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} |
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return 0; |
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} |
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|
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/* Read the Page Table Entry: */ |
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table_addr = pde & ~0xfff; |
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res = cpu->memory_rw(cpu, cpu->mem, table_addr + 4*b, pted, |
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sizeof(pted), MEM_READ, PHYSICAL); |
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if (!res) { |
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fatal("TODO: could not read pte (pt = 0x%"PRIx64")\n", |
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(uint64_t) table_addr); |
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goto fail; |
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} |
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pte = pted[0] + (pted[1] << 8) + (pted[2] << 16) + |
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(pted[3] << 24); |
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if ((pted[0] & 0x01) && !(pted[0] & 0x20)) { |
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pted[0] |= 0x20; |
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cpu->memory_rw(cpu, cpu->mem, table_addr + 4*b, pted, |
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sizeof(pted), MEM_WRITE, PHYSICAL); |
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} |
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if ((pted[0] & 0x01) && writeflag == MEM_WRITE && |
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!(pted[0] & 0x40)) { |
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pted[0] |= 0x40; |
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cpu->memory_rw(cpu, cpu->mem, table_addr + 4*b, pted, |
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sizeof(pted), MEM_WRITE, PHYSICAL); |
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} |
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/* fatal(" pte: 0x%08x\n", (int)pte); */ |
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if (!(pte & 0x02)) |
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writable = 0; |
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if (!(pte & 0x01)) { |
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fatal("TODO: pte not present: table_addr=0x%08x " |
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"vaddr=0x%08x, usermode=%i wf=%i pte=0x%08x\n", |
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(int)table_addr, (int)vaddr, usermode, writeflag, |
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(int)pte); |
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if (!no_exceptions) { |
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cpu->cd.x86.cr[2] = vaddr; |
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x86_interrupt(cpu, 14, (writeflag? 2 : 0) |
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+ (usermode? 4 : 0)); |
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} |
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return 0; |
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} |
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|
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(*return_addr) = (pte & ~0xfff) | (vaddr & 0xfff); |
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} else |
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*return_addr = vaddr; |
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|
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/* Code: */ |
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if (flags & FLAG_INSTR) { |
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if (dc->descr_type == DESCR_TYPE_CODE) |
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return 1; |
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fatal("TODO instr load but not code descriptor?\n"); |
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goto fail; |
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} |
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|
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/* We are here on non-instruction fetch. */ |
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|
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if (writeflag == MEM_WRITE && !writable) { |
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if (!usermode && !(cpu->cd.x86.cr[0] & X86_CR0_WP)) { |
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/* 80386 compatiblity: allow writes to userspace, |
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if we are running in kernel mode. */ |
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writable = 1; |
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} else { |
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fatal("TODO: write to nonwritable segment or page: " |
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"vaddr=0x%08x pde=0x%08x pte=0x%08x\n", |
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(int)vaddr, (int)pde, (int)pte); |
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cpu->cd.x86.cr[2] = vaddr; |
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x86_interrupt(cpu, 14, (writeflag? 2 : 0) |
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+ (usermode? 4 : 0) + 1); |
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return 0; |
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} |
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} |
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|
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return 1 + writable; |
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|
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fail: |
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fatal("memory_x86 FAIL: TODO\n"); |
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cpu->running = 0; |
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return 0; |
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} |
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|