1 |
/* |
/* |
2 |
* Copyright (C) 2006 Anders Gavare. All rights reserved. |
* Copyright (C) 2006-2007 Anders Gavare. All rights reserved. |
3 |
* |
* |
4 |
* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
5 |
* modification, are permitted provided that the following conditions are met: |
* modification, are permitted provided that the following conditions are met: |
25 |
* SUCH DAMAGE. |
* SUCH DAMAGE. |
26 |
* |
* |
27 |
* |
* |
28 |
* $Id: memory_sh.c,v 1.12 2006/10/28 04:00:32 debug Exp $ |
* $Id: memory_sh.c,v 1.18 2007/04/13 07:06:31 debug Exp $ |
29 |
*/ |
*/ |
30 |
|
|
31 |
#include <stdio.h> |
#include <stdio.h> |
85 |
|
|
86 |
/* fatal("urc = %i ==> ", urc); */ |
/* fatal("urc = %i ==> ", urc); */ |
87 |
urc ++; |
urc ++; |
88 |
if (urc == SH_N_UTLB_ENTRIES || (urb > 0 && urc == urb)) |
if (urc >= SH_N_UTLB_ENTRIES || (urb > 0 && urc == urb)) |
89 |
urc = 0; |
urc = 0; |
90 |
/* fatal("%i\n", urc); */ |
/* fatal("%i\n", urc); */ |
91 |
|
|
113 |
mask = 0xfff00000; |
mask = 0xfff00000; |
114 |
|
|
115 |
v = lo & SH4_PTEL_V; |
v = lo & SH4_PTEL_V; |
116 |
|
if (!v) |
117 |
|
continue; |
118 |
|
|
119 |
switch (lo & SH4_PTEL_SZ_MASK) { |
switch (lo & SH4_PTEL_SZ_MASK) { |
120 |
case SH4_PTEL_SZ_1K: mask = 0xfffffc00; break; |
case SH4_PTEL_SZ_1K: mask = 0xfffffc00; break; |
123 |
/* case SH4_PTEL_SZ_1M: mask = 0xfff00000; break; */ |
/* case SH4_PTEL_SZ_1M: mask = 0xfff00000; break; */ |
124 |
} |
} |
125 |
|
|
126 |
if (!v || (hi & mask) != (vaddr & mask)) |
if ((hi & mask) != (vaddr & mask)) |
127 |
continue; |
continue; |
128 |
|
|
129 |
sh = lo & SH4_PTEL_SH; |
sh = lo & SH4_PTEL_SH; |
143 |
if (i == SH_N_UTLB_ENTRIES) |
if (i == SH_N_UTLB_ENTRIES) |
144 |
goto tlb_miss; |
goto tlb_miss; |
145 |
|
|
146 |
/* Matching address found! Let's see it is readable/writable, etc: */ |
/* Matching address found! Let's see whether it is |
147 |
d = lo & SH4_PTEL_D; |
readable/writable, etc.: */ |
148 |
|
d = lo & SH4_PTEL_D? 1 : 0; |
149 |
pr = (lo & SH4_PTEL_PR_MASK) >> SH4_PTEL_PR_SHIFT; |
pr = (lo & SH4_PTEL_PR_MASK) >> SH4_PTEL_PR_SHIFT; |
150 |
|
|
151 |
*return_paddr = (vaddr & ~mask) | (lo & mask & 0x1fffffff); |
*return_paddr = (vaddr & ~mask) | (lo & mask & 0x1fffffff); |
159 |
*/ |
*/ |
160 |
if (i >= 0) { |
if (i >= 0) { |
161 |
int r = random() % SH_N_ITLB_ENTRIES; |
int r = random() % SH_N_ITLB_ENTRIES; |
162 |
|
|
163 |
|
/* NOTE: Make sure that the old mapping for |
164 |
|
that itlb entry is invalidated: */ |
165 |
|
cpu->invalidate_translation_caches(cpu, |
166 |
|
cpu->cd.sh.itlb_hi[r] & ~0xfff, INVALIDATE_VADDR); |
167 |
|
|
168 |
|
cpu->invalidate_code_translation(cpu, |
169 |
|
cpu->cd.sh.utlb_lo[i] & ~0xfff, INVALIDATE_PADDR); |
170 |
|
|
171 |
cpu->cd.sh.itlb_hi[r] = cpu->cd.sh.utlb_hi[i]; |
cpu->cd.sh.itlb_hi[r] = cpu->cd.sh.utlb_hi[i]; |
172 |
cpu->cd.sh.itlb_lo[r] = cpu->cd.sh.utlb_lo[i]; |
cpu->cd.sh.itlb_lo[r] = cpu->cd.sh.utlb_lo[i]; |
173 |
} |
} |
192 |
case 1: |
case 1: |
193 |
case 3: if (wf && !d) |
case 3: if (wf && !d) |
194 |
goto initial_write_exception; |
goto initial_write_exception; |
195 |
return 1; |
return 1 + d; |
196 |
} |
} |
197 |
} |
} |
198 |
|
|
205 |
return 1; |
return 1; |
206 |
case 3: if (wf && !d) |
case 3: if (wf && !d) |
207 |
goto initial_write_exception; |
goto initial_write_exception; |
208 |
return 1; |
return 1 + d; |
209 |
} |
} |
210 |
|
|
211 |
|
|
308 |
/* TODO */ |
/* TODO */ |
309 |
fatal("Unimplemented SH vaddr 0x%08"PRIx32"\n", (uint32_t)vaddr); |
fatal("Unimplemented SH vaddr 0x%08"PRIx32"\n", (uint32_t)vaddr); |
310 |
exit(1); |
exit(1); |
311 |
|
|
312 |
|
return 0; |
313 |
} |
} |
314 |
|
|