/[gxemul]/trunk/src/cpus/memory_mips_v2p.c
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Diff of /trunk/src/cpus/memory_mips_v2p.c

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revision 14 by dpavlin, Mon Oct 8 16:18:51 2007 UTC revision 22 by dpavlin, Mon Oct 8 16:19:37 2007 UTC
# Line 25  Line 25 
25   *  SUCH DAMAGE.   *  SUCH DAMAGE.
26   *   *
27   *   *
28   *  $Id: memory_mips_v2p.c,v 1.1 2005/08/29 14:36:42 debug Exp $   *  $Id: memory_mips_v2p.c,v 1.3 2005/12/26 12:32:10 debug Exp $
29   *   *
30   *  Included from memory.c.   *  Included from memory.c.
31   */   */
# Line 280  bugs are triggered.  */ Line 280  bugs are triggered.  */
280    
281          if (use_tlb) {          if (use_tlb) {
282  #ifndef V2P_MMU3K  #ifndef V2P_MMU3K
283                  int odd = 0, cached_lo1 = 0;                  int odd = 0;
284                    uint64_t cached_lo1 = 0;
285  #endif  #endif
286                  int g_bit, v_bit, d_bit;                  int g_bit, v_bit, d_bit;
287                  uint64_t cached_hi, cached_lo0;                  uint64_t cached_hi, cached_lo0;
# Line 325  bugs are triggered.  */ Line 326  bugs are triggered.  */
326                                  case 0x07fffff: pageshift = 22; break;                                  case 0x07fffff: pageshift = 22; break;
327                                  case 0x1ffffff: pageshift = 24; break;                                  case 0x1ffffff: pageshift = 24; break;
328                                  case 0x7ffffff: pageshift = 26; break;                                  case 0x7ffffff: pageshift = 26; break;
329                                  default:                                  default:fatal("pmask=%08x\n", pmask);
                                         fatal("pmask=%08x\n", i, pmask);  
330                                          exit(1);                                          exit(1);
331                                  }                                  }
332    
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