/[gxemul]/trunk/src/cpus/generate_tail.c
This is repository of my old source code which isn't updated any more. Go to git.rot13.org for current projects!
ViewVC logotype

Annotation of /trunk/src/cpus/generate_tail.c

Parent Directory Parent Directory | Revision Log Revision Log

Revision 28 - (hide annotations)
Mon Oct 8 16:20:26 2007 UTC (16 years, 6 months ago) by dpavlin
File MIME type: text/plain
File size: 7376 byte(s) 
++ trunk/HISTORY	(local)
$Id: HISTORY,v 1.1298 2006/07/22 11:27:46 debug Exp $
20060626	Continuing on SPARC emulation (beginning on the 'save'
		instruction, register windows, etc).
20060629	Planning statistics gathering (new -s command line option),
		and renaming speed_tricks to allow_instruction_combinations.
20060630	Some minor manual page updates.
		Various cleanups.
		Implementing the -s command line option.
20060701	FINALLY found the bug which prevented Linux and Ultrix from
		running without the ugly hack in the R2000/R3000 cache isol
		code; it was the phystranslation hint array which was buggy.
		Removing the phystranslation hint code completely, for now.
20060702	Minor dyntrans cleanups; invalidation of physpages now only
		invalidate those parts of a page that have actually been
		translated. (32 parts per page.)
		Some MIPS non-R3000 speed fixes.
		Experimenting with MIPS instruction combination for some
		addiu+bne+sw loops, and sw+sw+sw.
		Adding support (again) for larger-than-4KB pages in MIPS tlbw*.
		Continuing on SPARC emulation: adding load/store instructions.
20060704	Fixing a virtual vs physical page shift bug in the new tlbw*
		implementation. Problem noticed by Jakub Jermar. (Many thanks.)
		Moving rfe and eret to cpu_mips_instr.c, since that is the
		only place that uses them nowadays.
20060705	Removing the BSD license from the "testmachine" include files,
		placing them in the public domain instead; this enables the
		testmachine stuff to be used from projects which are
		incompatible with the BSD license for some reason.
20060707	Adding instruction combinations for the R2000/R3000 L1
		I-cache invalidation code used by NetBSD/pmax 3.0, lui+addiu,
		various branches followed by addiu or nop, and jr ra followed
		by addiu. The time it takes to perform a full NetBSD/pmax R3000
		install on the laptop has dropped from 573 seconds to 539. :-)
20060708	Adding a framebuffer controller device (dev_fbctrl), which so
		far can be used to change the fb resolution during runtime, but
		in the future will also be useful for accelerated block fill/
		copy, and possibly also simplified character output.
		Adding an instruction combination for NetBSD/pmax' strlen.
20060709	Minor fixes: reading raw files in src/file.c wasn't memblock
		aligned, removing buggy multi_sw MIPS instruction combination,
		etc.
20060711	Adding a machine_qemu.c, which contains a "qemu_mips" machine.
		(It mimics QEMU's MIPS machine mode, so that a test kernel
		made for QEMU_MIPS also can run in GXemul... at least to some
		extent.)  Adding a short section about how to run this mode to
		doc/guestoses.html.
20060714	Misc. minor code cleanups.
20060715	Applying a patch which adds getchar() to promemul/yamon.c
		(from Oleksandr Tymoshenko).
		Adding yamon.h from NetBSD, and rewriting yamon.c to use it
		(instead of ugly hardcoded numbers) + some cleanup.
20060716	Found and fixed the bug which broke single-stepping of 64-bit
		programs between 0.4.0 and 0.4.0.1 (caused by too quick
		refactoring and no testing). Hopefully this fix will not
		break too many other things.
20060718	Continuing on the 8253 PIT; it now works with Linux/QEMU_MIPS.
		Re-adding the sw+sw+sw instr comb (the problem was that I had
		ignored endian issues); however, it doesn't seem to give any
		big performance gain.
20060720	Adding a dummy Transputer mode (T414, T800 etc) skeleton (only
		the 'j' and 'ldc' instructions are implemented so far). :-}
20060721	Adding gtreg.h from NetBSD, updating dev_gt.c to use it, plus
		misc. other updates to get Linux 2.6 for evbmips/malta working
		(thanks to Alec Voropay for the details).
		FINALLY found and fixed the bug which made tlbw* for non-R3000
		buggy; it was a reference count problem in the dyntrans core.
20060722	Testing stuff; things seem stable enough for a new release.

==============  RELEASE 0.4.1  ==============
1 dpavlin 14 /*
2     * Copyright (C) 2005 Anders Gavare. All rights reserved.
3     *
4     * Redistribution and use in source and binary forms, with or without
5     * modification, are permitted provided that the following conditions are met:
6     *
7     * 1. Redistributions of source code must retain the above copyright
8     * notice, this list of conditions and the following disclaimer.
9     * 2. Redistributions in binary form must reproduce the above copyright
10     * notice, this list of conditions and the following disclaimer in the
11     * documentation and/or other materials provided with the distribution.
12     * 3. The name of the author may not be used to endorse or promote products
13     * derived from this software without specific prior written permission.
14     *
15     * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16     * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17     * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18     * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19     * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20     * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21     * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22     * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23     * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24     * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25     * SUCH DAMAGE.
26     *
27     *
28 dpavlin 28 * $Id: generate_tail.c,v 1.12 2006/07/16 13:32:26 debug Exp $
29 dpavlin 14 */
30    
31     #include <stdio.h>
32     #include <stdlib.h>
33    
34    
35     char *uppercase(char *l)
36     {
37     static char staticbuf[1000];
38 dpavlin 22 size_t i = 0;
39 dpavlin 14
40     while (*l && i < sizeof(staticbuf)) {
41     char u = *l++;
42     if (u >= 'a' && u <= 'z')
43     u -= 32;
44     staticbuf[i++] = u;
45     }
46     if (i == sizeof(staticbuf))
47     i--;
48     staticbuf[i] = 0;
49     return staticbuf;
50     }
51    
52    
53     int main(int argc, char *argv[])
54     {
55     char *a, *b;
56    
57     if (argc != 3) {
58     fprintf(stderr, "usage: %s arch Arch\n", argv[0]);
59     fprintf(stderr, "Example: %s alpha Alpha\n", argv[0]);
60     fprintf(stderr, " or: %s arm ARM\n", argv[0]);
61     exit(1);
62     }
63    
64     a = argv[1];
65     b = argv[2];
66    
67     printf("\n/*\n * AUTOMATICALLY GENERATED! Do not edit.\n */\n\n");
68    
69     printf("#ifdef DYNTRANS_32\n");
70     printf("#define MODE32\n");
71     printf("#endif\n");
72    
73     printf("#define DYNTRANS_FUNCTION_TRACE "
74     "%s_cpu_functioncall_trace\n", a);
75     printf("#include \"cpu_dyntrans.c\"\n");
76     printf("#undef DYNTRANS_FUNCTION_TRACE\n\n");
77    
78 dpavlin 26 printf("#define DYNTRANS_INIT_TABLES "
79     "%s_cpu_init_tables\n", a);
80 dpavlin 24 printf("#include \"cpu_dyntrans.c\"\n");
81 dpavlin 26 printf("#undef DYNTRANS_INIT_TABLES\n\n");
82 dpavlin 24
83 dpavlin 14 printf("#define DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE "
84     "%s_tc_allocate_default_page\n", a);
85     printf("#include \"cpu_dyntrans.c\"\n");
86     printf("#undef DYNTRANS_TC_ALLOCATE_DEFAULT_PAGE\n\n");
87    
88     printf("#define DYNTRANS_INVAL_ENTRY\n");
89     printf("#include \"cpu_dyntrans.c\"\n");
90     printf("#undef DYNTRANS_INVAL_ENTRY\n\n");
91    
92 dpavlin 18 printf("#define DYNTRANS_INVALIDATE_TC "
93     "%s_invalidate_translation_caches\n", a);
94 dpavlin 14 printf("#include \"cpu_dyntrans.c\"\n");
95 dpavlin 18 printf("#undef DYNTRANS_INVALIDATE_TC\n\n");
96 dpavlin 14
97     printf("#define DYNTRANS_INVALIDATE_TC_CODE "
98     "%s_invalidate_code_translation\n", a);
99     printf("#include \"cpu_dyntrans.c\"\n");
100     printf("#undef DYNTRANS_INVALIDATE_TC_CODE\n\n");
101    
102     printf("#define DYNTRANS_UPDATE_TRANSLATION_TABLE "
103     "%s_update_translation_table\n", a);
104     printf("#include \"cpu_dyntrans.c\"\n");
105     printf("#undef DYNTRANS_UPDATE_TRANSLATION_TABLE\n\n");
106    
107     printf("#define MEMORY_RW %s_memory_rw\n", a);
108     printf("#define MEM_%s\n", uppercase(a));
109     printf("#include \"../memory_rw.c\"\n");
110     printf("#undef MEM_%s\n", uppercase(a));
111     printf("#undef MEMORY_RW\n\n");
112    
113     printf("#define DYNTRANS_PC_TO_POINTERS_FUNC %s_pc_to_pointers\n", a);
114     printf("#define DYNTRANS_PC_TO_POINTERS_GENERIC "
115     "%s_pc_to_pointers_generic\n", a);
116     printf("#include \"cpu_dyntrans.c\"\n");
117     printf("#undef DYNTRANS_PC_TO_POINTERS_FUNC\n\n");
118     printf("#undef DYNTRANS_PC_TO_POINTERS_GENERIC\n\n");
119    
120    
121     printf("#define COMBINE_INSTRUCTIONS %s_combine_instructions\n", a);
122     printf("#ifndef DYNTRANS_32\n");
123     printf("#define reg(x) (*((uint64_t *)(x)))\n");
124     printf("#define MODE_uint_t uint64_t\n");
125     printf("#define MODE_int_t int64_t\n");
126     printf("#else\n");
127     printf("#define reg(x) (*((uint32_t *)(x)))\n");
128     printf("#define MODE_uint_t uint32_t\n");
129     printf("#define MODE_int_t int32_t\n");
130     printf("#endif\n");
131 dpavlin 22 printf("#define COMBINE(n) %s_combine_ ## n\n", a);
132     printf("#include \"quick_pc_to_pointers.h\"\n");
133 dpavlin 14 printf("#include \"cpu_%s_instr.c\"\n\n", a);
134    
135 dpavlin 28 printf("#define DYNTRANS_RUN_INSTR %s_run_instr\n", a);
136     printf("#include \"cpu_dyntrans.c\"\n");
137     printf("#undef DYNTRANS_RUN_INSTR\n\n");
138 dpavlin 14
139 dpavlin 28
140 dpavlin 14 printf("#ifdef DYNTRANS_DUALMODE_32\n");
141     printf("#undef COMBINE_INSTRUCTIONS\n");
142     printf("#define COMBINE_INSTRUCTIONS %s32_combine_instructions\n", a);
143     printf("#undef X\n#undef instr\n#undef reg\n"
144     "#define X(n) void %s32_instr_ ## n(struct cpu *cpu, \\\n"
145     "\tstruct %s_instr_call *ic)\n", a, a);
146     printf("#define instr(n) %s32_instr_ ## n\n", a);
147     printf("#ifdef HOST_LITTLE_ENDIAN\n");
148     printf("#define reg(x) ( *((uint32_t *)(x)) )\n");
149     printf("#else\n");
150     printf("#define reg(x) ( *((uint32_t *)(x)+1) )\n");
151     printf("#endif\n");
152     printf("#define MODE32\n");
153     printf("#undef MODE_uint_t\n#undef MODE_int_t\n");
154     printf("#define MODE_uint_t uint32_t\n");
155     printf("#define MODE_int_t int32_t\n");
156    
157     printf("#define DYNTRANS_INVAL_ENTRY\n");
158     printf("#undef DYNTRANS_INVALIDATE_TLB_ENTRY\n"
159     "#define DYNTRANS_INVALIDATE_TLB_ENTRY "
160     "%s32_invalidate_tlb_entry\n", a);
161     printf("#include \"cpu_dyntrans.c\"\n");
162     printf("#undef DYNTRANS_INVAL_ENTRY\n\n");
163 dpavlin 18 printf("#define DYNTRANS_INVALIDATE_TC "
164     "%s32_invalidate_translation_caches\n", a);
165 dpavlin 14 printf("#include \"cpu_dyntrans.c\"\n");
166 dpavlin 18 printf("#undef DYNTRANS_INVALIDATE_TC\n\n");
167 dpavlin 14 printf("#define DYNTRANS_INVALIDATE_TC_CODE "
168     "%s32_invalidate_code_translation\n", a);
169     printf("#include \"cpu_dyntrans.c\"\n");
170     printf("#undef DYNTRANS_INVALIDATE_TC_CODE\n\n");
171     printf("#define DYNTRANS_UPDATE_TRANSLATION_TABLE "
172     "%s32_update_translation_table\n", a);
173     printf("#include \"cpu_dyntrans.c\"\n");
174     printf("#undef DYNTRANS_UPDATE_TRANSLATION_TABLE\n\n");
175     printf("#define DYNTRANS_PC_TO_POINTERS_FUNC %s32_pc_to_pointers\n", a);
176     printf("#define DYNTRANS_PC_TO_POINTERS_GENERIC "
177     "%s32_pc_to_pointers_generic\n", a);
178     printf("#undef DYNTRANS_PC_TO_POINTERS\n"
179     "#define DYNTRANS_PC_TO_POINTERS %s32_pc_to_pointers\n", a);
180     printf("#include \"cpu_dyntrans.c\"\n");
181     printf("#undef DYNTRANS_PC_TO_POINTERS_FUNC\n\n");
182     printf("#undef DYNTRANS_PC_TO_POINTERS_GENERIC\n\n");
183 dpavlin 22 printf("#undef COMBINE\n");
184     printf("#define COMBINE(n) %s32_combine_ ## n\n", a);
185     printf("#include \"quick_pc_to_pointers.h\"\n");
186 dpavlin 14 printf("#include \"cpu_%s_instr.c\"\n", a);
187    
188     printf("\n#undef DYNTRANS_PC_TO_POINTERS\n"
189     "#define DYNTRANS_PC_TO_POINTERS %s_pc_to_pointers\n"
190     "#define DYNTRANS_PC_TO_POINTERS32 %s32_pc_to_pointers\n\n", a, a);
191    
192 dpavlin 28 printf("#define DYNTRANS_RUN_INSTR %s32_run_instr\n", a);
193     printf("#include \"cpu_dyntrans.c\"\n");
194     printf("#undef DYNTRANS_RUN_INSTR\n\n");
195    
196 dpavlin 14 printf("#endif /* DYNTRANS_DUALMODE_32 */\n\n\n");
197    
198    
199     printf("CPU_FAMILY_INIT(%s,\"%s\")\n\n", a, b);
200    
201     return 0;
202     }
203    
  ViewVC Help
Powered by ViewVC 1.1.26